diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-05-20 14:06:24 -0400 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2011-05-20 14:08:05 -0400 |
commit | 250f972d85effad5b6e10da4bbd877e6a4b503b6 (patch) | |
tree | 007393a6fc6439af7e0121dd99a6f9f9fb8405bc /arch/mips/mm/c-r4k.c | |
parent | 7372b0b122af0f6675f3ab65bfd91c8a438e0480 (diff) | |
parent | bbe7b8bef48c567f5ff3f6041c1fb011292e8f12 (diff) |
Merge branch 'timers/urgent' into timers/core
Reason: Get upstream fixes and kfree_rcu which is necessary for a
follow up patch.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r-- | arch/mips/mm/c-r4k.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index b4923a75cb4b..d9bc5d3593b6 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -1006,6 +1006,7 @@ static void __cpuinit probe_pcache(void) | |||
1006 | case CPU_25KF: | 1006 | case CPU_25KF: |
1007 | case CPU_SB1: | 1007 | case CPU_SB1: |
1008 | case CPU_SB1A: | 1008 | case CPU_SB1A: |
1009 | case CPU_XLR: | ||
1009 | c->dcache.flags |= MIPS_CACHE_PINDEX; | 1010 | c->dcache.flags |= MIPS_CACHE_PINDEX; |
1010 | break; | 1011 | break; |
1011 | 1012 | ||
@@ -1075,7 +1076,6 @@ static int __cpuinit probe_scache(void) | |||
1075 | unsigned long flags, addr, begin, end, pow2; | 1076 | unsigned long flags, addr, begin, end, pow2; |
1076 | unsigned int config = read_c0_config(); | 1077 | unsigned int config = read_c0_config(); |
1077 | struct cpuinfo_mips *c = ¤t_cpu_data; | 1078 | struct cpuinfo_mips *c = ¤t_cpu_data; |
1078 | int tmp; | ||
1079 | 1079 | ||
1080 | if (config & CONF_SC) | 1080 | if (config & CONF_SC) |
1081 | return 0; | 1081 | return 0; |
@@ -1108,7 +1108,6 @@ static int __cpuinit probe_scache(void) | |||
1108 | 1108 | ||
1109 | /* Now search for the wrap around point. */ | 1109 | /* Now search for the wrap around point. */ |
1110 | pow2 = (128 * 1024); | 1110 | pow2 = (128 * 1024); |
1111 | tmp = 0; | ||
1112 | for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) { | 1111 | for (addr = begin + (128 * 1024); addr < end; addr = begin + pow2) { |
1113 | cache_op(Index_Load_Tag_SD, addr); | 1112 | cache_op(Index_Load_Tag_SD, addr); |
1114 | __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */ | 1113 | __asm__ __volatile__("nop; nop; nop; nop;"); /* hazard... */ |