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authorChris Dearman <chris@mips.com>2006-04-14 19:31:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-04-27 10:13:50 -0400
commit7a8341969fe0df4a1fffa141435e742456270ffd (patch)
treeaccf4fa15fce1d32c4f57d5acd1a28a3bd49e1f4 /arch/mips/mips-boards/generic
parent2a2c3e451965aca35c2d0d1b2db1dbd1d839c75e (diff)
[MIPS] 24K LV: Add core card id.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/generic')
-rw-r--r--arch/mips/mips-boards/generic/init.c1
-rw-r--r--arch/mips/mips-boards/generic/pci.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index 17dfe6a8cab9..df4e94735604 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -337,6 +337,7 @@ void __init prom_init(void)
337 case MIPS_REVISION_CORID_CORE_MSC: 337 case MIPS_REVISION_CORID_CORE_MSC:
338 case MIPS_REVISION_CORID_CORE_FPGA2: 338 case MIPS_REVISION_CORID_CORE_FPGA2:
339 case MIPS_REVISION_CORID_CORE_FPGA3: 339 case MIPS_REVISION_CORID_CORE_FPGA3:
340 case MIPS_REVISION_CORID_CORE_24K:
340 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 341 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
341 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000); 342 _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
342 343
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index 1f6f9df74ab2..9337f6c8873a 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -198,6 +198,7 @@ void __init mips_pcibios_init(void)
198 case MIPS_REVISION_CORID_CORE_MSC: 198 case MIPS_REVISION_CORID_CORE_MSC:
199 case MIPS_REVISION_CORID_CORE_FPGA2: 199 case MIPS_REVISION_CORID_CORE_FPGA2:
200 case MIPS_REVISION_CORID_CORE_FPGA3: 200 case MIPS_REVISION_CORID_CORE_FPGA3:
201 case MIPS_REVISION_CORID_CORE_24K:
201 case MIPS_REVISION_CORID_CORE_EMUL_MSC: 202 case MIPS_REVISION_CORID_CORE_EMUL_MSC:
202 /* Set up resource ranges from the controller's registers. */ 203 /* Set up resource ranges from the controller's registers. */
203 MSC_READ(MSC01_PCI_SC2PMBASL, start); 204 MSC_READ(MSC01_PCI_SC2PMBASL, start);