MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions

MIPS R6 uses the <R6 ldc2 opcode for the new BEQZC and JIC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index d732100c99f0..f00af84f017d 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -679,6 +679,13 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                         dec_insn.next_pc_inc;
 
                 return 1;
+        case beqzcjic_op:
+                if (!cpu_has_mips_r6)
+                        break;
+                *contpc = regs->cp0_epc + dec_insn.pc_inc +
+                        dec_insn.next_pc_inc;
+
+                return 1;
 #endif
         case cop0_op:
         case cop1_op: