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authorDeng-Cheng Zhu <dengcheng.zhu@gmail.com>2010-10-12 07:37:21 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 14:08:48 -0400
commit7f788d2d53085815d474559cd51ef1f38b0a9bb8 (patch)
tree32c2b6af15da818a02502a678225ff4de754b542 /arch/mips/math-emu/cp1emu.c
parent6dbd972850c092e50e10bd14a3324e2abe88997a (diff)
MIPS: add support for software performance events
Software events are required as part of the measurable stuff by the Linux performance counter subsystem. Here is the list of events added by this patch: PERF_COUNT_SW_PAGE_FAULTS PERF_COUNT_SW_PAGE_FAULTS_MIN PERF_COUNT_SW_PAGE_FAULTS_MAJ PERF_COUNT_SW_ALIGNMENT_FAULTS PERF_COUNT_SW_EMULATION_FAULTS Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> To: linux-mips@linux-mips.org Cc: a.p.zijlstra@chello.nl Cc: paulus@samba.org Cc: mingo@elte.hu Cc: acme@redhat.com Cc: jamie.iles@picochip.com Acked-by: David Daney <ddaney@caviumnetworks.com> Reviewed-by: Matt Fleming <matt@console-pimps.org> Patchwork: https://patchwork.linux-mips.org/patch/1686/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/math-emu/cp1emu.c')
-rw-r--r--arch/mips/math-emu/cp1emu.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index ec3faa413f3b..b2ad1b0910ff 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -36,6 +36,7 @@
36#include <linux/sched.h> 36#include <linux/sched.h>
37#include <linux/module.h> 37#include <linux/module.h>
38#include <linux/debugfs.h> 38#include <linux/debugfs.h>
39#include <linux/perf_event.h>
39 40
40#include <asm/inst.h> 41#include <asm/inst.h>
41#include <asm/bootinfo.h> 42#include <asm/bootinfo.h>
@@ -258,6 +259,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
258 } 259 }
259 260
260 emul: 261 emul:
262 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,
263 1, 0, xcp, 0);
261 MIPS_FPU_EMU_INC_STATS(emulated); 264 MIPS_FPU_EMU_INC_STATS(emulated);
262 switch (MIPSInst_OPCODE(ir)) { 265 switch (MIPSInst_OPCODE(ir)) {
263 case ldc1_op:{ 266 case ldc1_op:{