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authorThomas Gleixner <tglx@linutronix.de>2010-02-17 12:27:37 -0500
committerThomas Gleixner <tglx@linutronix.de>2010-02-17 12:28:05 -0500
commitb7e56edba4b02f2079042c326a8cd72a44635817 (patch)
treeb5042002e9747cd8fb1278d61f86d8b92a74c018 /arch/mips/loongson/common/irq.c
parent13ca0fcaa33f6b1984c4111b6ec5df42689fea6f (diff)
parentb0483e78e5c4c9871fc5541875b3bc006846d46b (diff)
Merge branch 'linus' into x86/mm
x86/mm is on 32-rc4 and missing the spinlock namespace changes which are needed for further commits into this topic. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/loongson/common/irq.c')
-rw-r--r--arch/mips/loongson/common/irq.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c
index f368c735cbd3..20e732831978 100644
--- a/arch/mips/loongson/common/irq.c
+++ b/arch/mips/loongson/common/irq.c
@@ -20,21 +20,21 @@ void bonito_irqdispatch(void)
20 int i; 20 int i;
21 21
22 /* workaround the IO dma problem: let cpu looping to allow DMA finish */ 22 /* workaround the IO dma problem: let cpu looping to allow DMA finish */
23 int_status = BONITO_INTISR; 23 int_status = LOONGSON_INTISR;
24 if (int_status & (1 << 10)) { 24 if (int_status & (1 << 10)) {
25 while (int_status & (1 << 10)) { 25 while (int_status & (1 << 10)) {
26 udelay(1); 26 udelay(1);
27 int_status = BONITO_INTISR; 27 int_status = LOONGSON_INTISR;
28 } 28 }
29 } 29 }
30 30
31 /* Get pending sources, masked by current enables */ 31 /* Get pending sources, masked by current enables */
32 int_status = BONITO_INTISR & BONITO_INTEN; 32 int_status = LOONGSON_INTISR & LOONGSON_INTEN;
33 33
34 if (int_status != 0) { 34 if (int_status != 0) {
35 i = __ffs(int_status); 35 i = __ffs(int_status);
36 int_status &= ~(1 << i); 36 int_status &= ~(1 << i);
37 do_IRQ(BONITO_IRQ_BASE + i); 37 do_IRQ(LOONGSON_IRQ_BASE + i);
38 } 38 }
39} 39}
40 40
@@ -55,19 +55,18 @@ void __init arch_init_irq(void)
55 * int-handler is not on bootstrap 55 * int-handler is not on bootstrap
56 */ 56 */
57 clear_c0_status(ST0_IM | ST0_BEV); 57 clear_c0_status(ST0_IM | ST0_BEV);
58 local_irq_disable();
59 58
60 /* setting irq trigger mode */ 59 /* setting irq trigger mode */
61 set_irq_trigger_mode(); 60 set_irq_trigger_mode();
62 61
63 /* no steer */ 62 /* no steer */
64 BONITO_INTSTEER = 0; 63 LOONGSON_INTSTEER = 0;
65 64
66 /* 65 /*
67 * Mask out all interrupt by writing "1" to all bit position in 66 * Mask out all interrupt by writing "1" to all bit position in
68 * the interrupt reset reg. 67 * the interrupt reset reg.
69 */ 68 */
70 BONITO_INTENCLR = ~0; 69 LOONGSON_INTENCLR = ~0;
71 70
72 /* machine specific irq init */ 71 /* machine specific irq init */
73 mach_init_irq(); 72 mach_init_irq();