diff options
author | David Daney <david.daney@cavium.com> | 2013-05-13 16:56:44 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-16 14:35:42 -0400 |
commit | 48c4ac976ae995f263cde8f09578de86bc8e9f1d (patch) | |
tree | 48e9b3753b951ea2c276546679264c3030a8ea7d /arch/mips/lib/dump_tlb.c | |
parent | 8ea6cd7af124ad070b44a7f60e225e45e3f38f79 (diff) |
Revert "MIPS: Allow ASID size to be determined at boot time."
This reverts commit d532f3d26716a39dfd4b88d687bd344fbe77e390.
The original commit has several problems:
1) Doesn't work with 64-bit kernels.
2) Calls TLBMISS_HANDLER_SETUP() before the code is generated.
3) Calls TLBMISS_HANDLER_SETUP() twice in per_cpu_trap_init() when
only one call is needed.
[ralf@linux-mips.org: Also revert the bits of the ASID patch which were
hidden in the KVM merge.]
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: "Steven J. Hill" <Steven.Hill@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/5242/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib/dump_tlb.c')
-rw-r--r-- | arch/mips/lib/dump_tlb.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 8a12d00908e0..32b9f21bfd85 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <asm/page.h> | 11 | #include <asm/page.h> |
12 | #include <asm/pgtable.h> | 12 | #include <asm/pgtable.h> |
13 | #include <asm/tlbdebug.h> | 13 | #include <asm/tlbdebug.h> |
14 | #include <asm/mmu_context.h> | ||
15 | 14 | ||
16 | static inline const char *msk2str(unsigned int mask) | 15 | static inline const char *msk2str(unsigned int mask) |
17 | { | 16 | { |
@@ -56,7 +55,7 @@ static void dump_tlb(int first, int last) | |||
56 | s_pagemask = read_c0_pagemask(); | 55 | s_pagemask = read_c0_pagemask(); |
57 | s_entryhi = read_c0_entryhi(); | 56 | s_entryhi = read_c0_entryhi(); |
58 | s_index = read_c0_index(); | 57 | s_index = read_c0_index(); |
59 | asid = ASID_MASK(s_entryhi); | 58 | asid = s_entryhi & 0xff; |
60 | 59 | ||
61 | for (i = first; i <= last; i++) { | 60 | for (i = first; i <= last; i++) { |
62 | write_c0_index(i); | 61 | write_c0_index(i); |
@@ -86,7 +85,7 @@ static void dump_tlb(int first, int last) | |||
86 | 85 | ||
87 | printk("va=%0*lx asid=%02lx\n", | 86 | printk("va=%0*lx asid=%02lx\n", |
88 | width, (entryhi & ~0x1fffUL), | 87 | width, (entryhi & ~0x1fffUL), |
89 | ASID_MASK(entryhi)); | 88 | entryhi & 0xff); |
90 | printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ", | 89 | printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ", |
91 | width, | 90 | width, |
92 | (entrylo0 << 6) & PAGE_MASK, c0, | 91 | (entrylo0 << 6) & PAGE_MASK, c0, |