Merge branch '4.1-fp' into mips-for-linux-next

4 files changed, 35 insertions, 74 deletions

diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 750d67ac41e9..3ee1565c5be3 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -167,72 +167,6 @@ void output_thread_fpu_defines(void)
         OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
         OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
 
-        /* the least significant 64 bits of each FP register */
-        OFFSET(THREAD_FPR0_LS64, task_struct,
-               thread.fpu.fpr[0].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR1_LS64, task_struct,
-               thread.fpu.fpr[1].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR2_LS64, task_struct,
-               thread.fpu.fpr[2].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR3_LS64, task_struct,
-               thread.fpu.fpr[3].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR4_LS64, task_struct,
-               thread.fpu.fpr[4].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR5_LS64, task_struct,
-               thread.fpu.fpr[5].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR6_LS64, task_struct,
-               thread.fpu.fpr[6].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR7_LS64, task_struct,
-               thread.fpu.fpr[7].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR8_LS64, task_struct,
-               thread.fpu.fpr[8].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR9_LS64, task_struct,
-               thread.fpu.fpr[9].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR10_LS64, task_struct,
-               thread.fpu.fpr[10].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR11_LS64, task_struct,
-               thread.fpu.fpr[11].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR12_LS64, task_struct,
-               thread.fpu.fpr[12].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR13_LS64, task_struct,
-               thread.fpu.fpr[13].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR14_LS64, task_struct,
-               thread.fpu.fpr[14].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR15_LS64, task_struct,
-               thread.fpu.fpr[15].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR16_LS64, task_struct,
-               thread.fpu.fpr[16].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR17_LS64, task_struct,
-               thread.fpu.fpr[17].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR18_LS64, task_struct,
-               thread.fpu.fpr[18].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR19_LS64, task_struct,
-               thread.fpu.fpr[19].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR20_LS64, task_struct,
-               thread.fpu.fpr[20].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR21_LS64, task_struct,
-               thread.fpu.fpr[21].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR22_LS64, task_struct,
-               thread.fpu.fpr[22].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR23_LS64, task_struct,
-               thread.fpu.fpr[23].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR24_LS64, task_struct,
-               thread.fpu.fpr[24].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR25_LS64, task_struct,
-               thread.fpu.fpr[25].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR26_LS64, task_struct,
-               thread.fpu.fpr[26].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR27_LS64, task_struct,
-               thread.fpu.fpr[27].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR28_LS64, task_struct,
-               thread.fpu.fpr[28].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR29_LS64, task_struct,
-               thread.fpu.fpr[29].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR30_LS64, task_struct,
-               thread.fpu.fpr[30].val64[FPR_IDX(64, 0)]);
-        OFFSET(THREAD_FPR31_LS64, task_struct,
-               thread.fpu.fpr[31].val64[FPR_IDX(64, 0)]);
-
         OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
         OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr);
         BLANK();
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 07c4a25b16ea..50e9db6f6cba 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -368,6 +368,15 @@ NESTED(nmi_handler, PT_SIZE, sp)
         STI
         .endm
 
+        .macro  __build_clear_msa_fpe
+        _cfcmsa a1, MSA_CSR
+        li      a2, ~(0x3f << 12)
+        and     a1, a1, a2
+        _ctcmsa MSA_CSR, a1
+        TRACE_IRQS_ON
+        STI
+        .endm
+
         .macro  __build_clear_ade
         MFC0    t0, CP0_BADVADDR
         PTR_S   t0, PT_BVADDR(sp)
@@ -426,7 +435,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
         BUILD_HANDLER cpu cpu sti silent                /* #11 */
         BUILD_HANDLER ov ov sti silent                  /* #12 */
         BUILD_HANDLER tr tr sti silent                  /* #13 */
-        BUILD_HANDLER msa_fpe msa_fpe sti silent        /* #14 */
+        BUILD_HANDLER msa_fpe msa_fpe msa_fpe silent    /* #14 */
         BUILD_HANDLER fpe fpe fpe silent                /* #15 */
         BUILD_HANDLER ftlb ftlb none silent             /* #16 */
         BUILD_HANDLER msa msa sti silent                /* #21 */
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 6d1e3f8005f7..d544e774eea6 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -47,6 +47,26 @@
 #define CREATE_TRACE_POINTS
 #include <trace/events/syscalls.h>
 
+static void init_fp_ctx(struct task_struct *target)
+{
+        /* If FP has been used then the target already has context */
+        if (tsk_used_math(target))
+                return;
+
+        /* Begin with data registers set to all 1s... */
+        memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
+
+        /* ...and FCSR zeroed */
+        target->thread.fpu.fcr31 = 0;
+
+        /*
+         * Record that the target has "used" math, such that the context
+         * just initialised, and any modifications made by the caller,
+         * aren't discarded.
+         */
+        set_stopped_child_used_math(target);
+}
+
 /*
  * Called by kernel/ptrace.c when detaching..
  *
@@ -146,6 +166,7 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
         if (!access_ok(VERIFY_READ, data, 33 * 8))
                 return -EIO;
 
+        init_fp_ctx(child);
         fregs = get_fpu_regs(child);
 
         for (i = 0; i < 32; i++) {
@@ -445,6 +466,8 @@ static int fpr_set(struct task_struct *target,
 
         /* XXX fcr31  */
 
+        init_fp_ctx(target);
+
         if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
                                           &target->thread.fpu,
@@ -666,12 +689,7 @@ long arch_ptrace(struct task_struct *child, long request,
                 case FPR_BASE ... FPR_BASE + 31: {
                         union fpureg *fregs = get_fpu_regs(child);
 
-                        if (!tsk_used_math(child)) {
-                                /* FP not yet used  */
-                                memset(&child->thread.fpu, ~0,
-                                       sizeof(child->thread.fpu));
-                                child->thread.fpu.fcr31 = 0;
-                        }
+                        init_fp_ctx(child);
 #ifdef CONFIG_32BIT
                         if (test_thread_flag(TIF_32BIT_FPREGS)) {
                                 /*
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 676c5030a953..1d88af26ba82 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -34,7 +34,6 @@
         .endm
 
         .set    noreorder
-        .set    MIPS_ISA_ARCH_LEVEL_RAW
 
 LEAF(_save_fp_context)
         .set    push
@@ -103,6 +102,7 @@ LEAF(_save_fp_context)
         /* Save 32-bit process floating point context */
 LEAF(_save_fp_context32)
         .set push
+        .set MIPS_ISA_ARCH_LEVEL_RAW
         SET_HARDFLOAT
         cfc1    t1, fcr31