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authorSteven J. Hill <sjhill@mips.com>2012-12-06 22:51:04 -0500
committerJohn Crispin <blogic@openwrt.org>2013-02-16 19:25:21 -0500
commit778eeb1b199b85bec79b49ac483b013e270636ea (patch)
tree51a33ec4e5e81296f31fef98b89253855dc2368d /arch/mips/kernel
parent4cb764b4541fe9eacc237b6851198a4c8497b9c4 (diff)
MIPS: Add new GIC clocksource.
Add new clocksource that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4681/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/Makefile1
-rw-r--r--arch/mips/kernel/csrc-gic.c49
2 files changed, 50 insertions, 0 deletions
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 6c17e1f3d0ec..f416de34c9eb 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o
27obj-$(CONFIG_CSRC_POWERTV) += csrc-powertv.o 27obj-$(CONFIG_CSRC_POWERTV) += csrc-powertv.o
28obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o 28obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o
29obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o 29obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
30obj-$(CONFIG_CSRC_GIC) += csrc-gic.o
30obj-$(CONFIG_SYNC_R4K) += sync-r4k.o 31obj-$(CONFIG_SYNC_R4K) += sync-r4k.o
31 32
32obj-$(CONFIG_STACKTRACE) += stacktrace.o 33obj-$(CONFIG_STACKTRACE) += stacktrace.o
diff --git a/arch/mips/kernel/csrc-gic.c b/arch/mips/kernel/csrc-gic.c
new file mode 100644
index 000000000000..5dca24bce51b
--- /dev/null
+++ b/arch/mips/kernel/csrc-gic.c
@@ -0,0 +1,49 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
7 */
8#include <linux/clocksource.h>
9#include <linux/init.h>
10
11#include <asm/time.h>
12#include <asm/gic.h>
13
14static cycle_t gic_hpt_read(struct clocksource *cs)
15{
16 unsigned int hi, hi2, lo;
17
18 do {
19 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi);
20 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_31_00), lo);
21 GICREAD(GIC_REG(SHARED, GIC_SH_COUNTER_63_32), hi2);
22 } while (hi2 != hi);
23
24 return (((cycle_t) hi) << 32) + lo;
25}
26
27static struct clocksource gic_clocksource = {
28 .name = "GIC",
29 .read = gic_hpt_read,
30 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
31};
32
33void __init gic_clocksource_init(unsigned int frequency)
34{
35 unsigned int config, bits;
36
37 /* Calculate the clocksource mask. */
38 GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), config);
39 bits = 32 + ((config & GIC_SH_CONFIG_COUNTBITS_MSK) >>
40 (GIC_SH_CONFIG_COUNTBITS_SHF - 2));
41
42 /* Set clocksource mask. */
43 gic_clocksource.mask = CLOCKSOURCE_MASK(bits);
44
45 /* Calculate a somewhat reasonable rating value. */
46 gic_clocksource.rating = 200 + frequency / 10000000;
47
48 clocksource_register_hz(&gic_clocksource, frequency);
49}