diff options
author | David Daney <ddaney@caviumnetworks.com> | 2010-12-21 17:19:11 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-01-18 13:30:22 -0500 |
commit | 3d8bfdd0307223de678962f1c1907a7cec549136 (patch) | |
tree | 007146d1452d054e5e676b5a930d48292b0ae4b6 /arch/mips/kernel | |
parent | c42aef0947d717849f31965ecc0778707839bfe0 (diff) |
MIPS: Use C0_KScratch (if present) to hold PGD pointer.
Decide at runtime to use either Context or KScratch to hold the PGD
pointer.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1876/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/traps.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index e97104302541..71350f7f2d88 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -1592,7 +1592,6 @@ void __cpuinit per_cpu_trap_init(void) | |||
1592 | #endif /* CONFIG_MIPS_MT_SMTC */ | 1592 | #endif /* CONFIG_MIPS_MT_SMTC */ |
1593 | 1593 | ||
1594 | cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; | 1594 | cpu_data[cpu].asid_cache = ASID_FIRST_VERSION; |
1595 | TLBMISS_HANDLER_SETUP(); | ||
1596 | 1595 | ||
1597 | atomic_inc(&init_mm.mm_count); | 1596 | atomic_inc(&init_mm.mm_count); |
1598 | current->active_mm = &init_mm; | 1597 | current->active_mm = &init_mm; |
@@ -1614,6 +1613,7 @@ void __cpuinit per_cpu_trap_init(void) | |||
1614 | write_c0_wired(0); | 1613 | write_c0_wired(0); |
1615 | } | 1614 | } |
1616 | #endif /* CONFIG_MIPS_MT_SMTC */ | 1615 | #endif /* CONFIG_MIPS_MT_SMTC */ |
1616 | TLBMISS_HANDLER_SETUP(); | ||
1617 | } | 1617 | } |
1618 | 1618 | ||
1619 | /* Install CPU exception handler */ | 1619 | /* Install CPU exception handler */ |