Merge tag 'v3.12-rc4' into sched/core

Merge Linux v3.12-rc4 to fix a conflict and also to refresh the tree
before applying more scheduler patches.

Conflicts:
	arch/avr32/include/asm/Kbuild

Signed-off-by: Ingo Molnar <mingo@kernel.org>

4 files changed, 42 insertions, 23 deletions

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 37663c7862a5..5465dc183e5a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -20,6 +20,7 @@
 
 #include <asm/bugs.h>
 #include <asm/cpu.h>
+#include <asm/cpu-type.h>
 #include <asm/fpu.h>
 #include <asm/mipsregs.h>
 #include <asm/watch.h>
@@ -55,7 +56,7 @@ static inline void check_errata(void)
 {
         struct cpuinfo_mips *c = &current_cpu_data;
 
-        switch (c->cputype) {
+        switch (current_cpu_type()) {
         case CPU_34K:
                 /*
                  * Erratum "RPS May Cause Incorrect Instruction Execution"
@@ -122,7 +123,7 @@ static inline unsigned long cpu_get_fpu_id(void)
  */
 static inline int __cpu_has_fpu(void)
 {
-        return ((cpu_get_fpu_id() & 0xff00) != FPIR_IMP_NONE);
+        return ((cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE);
 }
 
 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
@@ -290,6 +291,17 @@ static inline unsigned int decode_config4(struct cpuinfo_mips *c)
         return config4 & MIPS_CONF_M;
 }
 
+static inline unsigned int decode_config5(struct cpuinfo_mips *c)
+{
+        unsigned int config5;
+
+        config5 = read_c0_config5();
+        config5 &= ~MIPS_CONF5_UFR;
+        write_c0_config5(config5);
+
+        return config5 & MIPS_CONF_M;
+}
+
 static void decode_configs(struct cpuinfo_mips *c)
 {
         int ok;
@@ -310,6 +322,8 @@ static void decode_configs(struct cpuinfo_mips *c)
                 ok = decode_config3(c);
         if (ok)
                 ok = decode_config4(c);
+        if (ok)
+                ok = decode_config5(c);
 
         mips_probe_watch_registers(c);
 
@@ -322,7 +336,7 @@ static void decode_configs(struct cpuinfo_mips *c)
 
 static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
 {
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_R2000:
                 c->cputype = CPU_R2000;
                 __cpu_name[cpu] = "R2000";
@@ -333,7 +347,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                 c->tlbsize = 64;
                 break;
         case PRID_IMP_R3000:
-                if ((c->processor_id & 0xff) == PRID_REV_R3000A) {
+                if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A) {
                         if (cpu_has_confreg()) {
                                 c->cputype = CPU_R3081E;
                                 __cpu_name[cpu] = "R3081";
@@ -353,7 +367,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                 break;
         case PRID_IMP_R4000:
                 if (read_c0_config() & CONF_SC) {
-                        if ((c->processor_id & 0xff) >= PRID_REV_R4400) {
+                        if ((c->processor_id & PRID_REV_MASK) >=
+                            PRID_REV_R4400) {
                                 c->cputype = CPU_R4400PC;
                                 __cpu_name[cpu] = "R4400PC";
                         } else {
@@ -361,7 +376,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                                 __cpu_name[cpu] = "R4000PC";
                         }
                 } else {
-                        if ((c->processor_id & 0xff) >= PRID_REV_R4400) {
+                        if ((c->processor_id & PRID_REV_MASK) >=
+                            PRID_REV_R4400) {
                                 c->cputype = CPU_R4400SC;
                                 __cpu_name[cpu] = "R4400SC";
                         } else {
@@ -454,7 +470,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
                         __cpu_name[cpu] = "TX3927";
                         c->tlbsize = 64;
                 } else {
-                        switch (c->processor_id & 0xff) {
+                        switch (c->processor_id & PRID_REV_MASK) {
                         case PRID_REV_TX3912:
                                 c->cputype = CPU_TX3912;
                                 __cpu_name[cpu] = "TX3912";
@@ -640,7 +656,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
 static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
 {
         decode_configs(c);
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_4KC:
                 c->cputype = CPU_4KC;
                 __cpu_name[cpu] = "MIPS 4Kc";
@@ -711,7 +727,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
 static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
 {
         decode_configs(c);
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_AU1_REV1:
         case PRID_IMP_AU1_REV2:
                 c->cputype = CPU_ALCHEMY;
@@ -730,7 +746,7 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu)
                         break;
                 case 4:
                         __cpu_name[cpu] = "Au1200";
-                        if ((c->processor_id & 0xff) == 2)
+                        if ((c->processor_id & PRID_REV_MASK) == 2)
                                 __cpu_name[cpu] = "Au1250";
                         break;
                 case 5:
@@ -748,12 +764,12 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu)
 {
         decode_configs(c);
 
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_SB1:
                 c->cputype = CPU_SB1;
                 __cpu_name[cpu] = "SiByte SB1";
                 /* FPU in pass1 is known to have issues. */
-                if ((c->processor_id & 0xff) < 0x02)
+                if ((c->processor_id & PRID_REV_MASK) < 0x02)
                         c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
                 break;
         case PRID_IMP_SB1A:
@@ -766,7 +782,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu)
 static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu)
 {
         decode_configs(c);
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_SR71000:
                 c->cputype = CPU_SR71000;
                 __cpu_name[cpu] = "Sandcraft SR71000";
@@ -779,7 +795,7 @@ static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu)
 static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu)
 {
         decode_configs(c);
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_PR4450:
                 c->cputype = CPU_PR4450;
                 __cpu_name[cpu] = "Philips PR4450";
@@ -791,7 +807,7 @@ static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu)
 static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
 {
         decode_configs(c);
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_BMIPS32_REV4:
         case PRID_IMP_BMIPS32_REV8:
                 c->cputype = CPU_BMIPS32;
@@ -806,7 +822,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
                 set_elf_platform(cpu, "bmips3300");
                 break;
         case PRID_IMP_BMIPS43XX: {
-                int rev = c->processor_id & 0xff;
+                int rev = c->processor_id & PRID_REV_MASK;
 
                 if (rev >= PRID_REV_BMIPS4380_LO &&
                                 rev <= PRID_REV_BMIPS4380_HI) {
@@ -832,7 +848,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
 static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
 {
         decode_configs(c);
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_CAVIUM_CN38XX:
         case PRID_IMP_CAVIUM_CN31XX:
         case PRID_IMP_CAVIUM_CN30XX:
@@ -875,7 +891,7 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu)
         decode_configs(c);
         /* JZRISC does not implement the CP0 counter. */
         c->options &= ~MIPS_CPU_COUNTER;
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_JZRISC:
                 c->cputype = CPU_JZRISC;
                 __cpu_name[cpu] = "Ingenic JZRISC";
@@ -890,7 +906,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
 {
         decode_configs(c);
 
-        if ((c->processor_id & 0xff00) == PRID_IMP_NETLOGIC_AU13XX) {
+        if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_NETLOGIC_AU13XX) {
                 c->cputype = CPU_ALCHEMY;
                 __cpu_name[cpu] = "Au1300";
                 /* following stuff is not for Alchemy */
@@ -905,7 +921,7 @@ static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu)
                         MIPS_CPU_EJTAG   |
                         MIPS_CPU_LLSC);
 
-        switch (c->processor_id & 0xff00) {
+        switch (c->processor_id & PRID_IMP_MASK) {
         case PRID_IMP_NETLOGIC_XLP2XX:
                 c->cputype = CPU_XLP;
                 __cpu_name[cpu] = "Broadcom XLPII";
@@ -984,7 +1000,7 @@ void cpu_probe(void)
         c->cputype      = CPU_UNKNOWN;
 
         c->processor_id = read_c0_prid();
-        switch (c->processor_id & 0xff0000) {
+        switch (c->processor_id & PRID_COMP_MASK) {
         case PRID_COMP_LEGACY:
                 cpu_probe_legacy(c, cpu);
                 break;
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 42f8875d2444..f7991d95bff9 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -18,6 +18,7 @@
 #include <linux/sched.h>
 #include <asm/cpu.h>
 #include <asm/cpu-info.h>
+#include <asm/cpu-type.h>
 #include <asm/idle.h>
 #include <asm/mipsregs.h>
 
@@ -136,7 +137,7 @@ void __init check_wait(void)
                 return;
         }
 
-        switch (c->cputype) {
+        switch (current_cpu_type()) {
         case CPU_R3081:
         case CPU_R3081E:
                 cpu_wait = r3081_wait;
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 364d26ae4215..dcb8e5d3bb8a 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -24,6 +24,7 @@
 #include <linux/export.h>
 
 #include <asm/cpu-features.h>
+#include <asm/cpu-type.h>
 #include <asm/div64.h>
 #include <asm/smtc_ipi.h>
 #include <asm/time.h>
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index aec3408edd4b..524841f02803 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -39,6 +39,7 @@
 #include <asm/break.h>
 #include <asm/cop2.h>
 #include <asm/cpu.h>
+#include <asm/cpu-type.h>
 #include <asm/dsp.h>
 #include <asm/fpu.h>
 #include <asm/fpu_emulator.h>
@@ -622,7 +623,7 @@ static int simulate_rdhwr(struct pt_regs *regs, int rd, int rt)
                 regs->regs[rt] = read_c0_count();
                 return 0;
         case 3:         /* Count register resolution */
-                switch (current_cpu_data.cputype) {
+                switch (current_cpu_type()) {
                 case CPU_20KC:
                 case CPU_25KF:
                         regs->regs[rt] = 1;