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authorRalf Baechle <ralf@linux-mips.org>2013-01-22 06:59:30 -0500
committerRalf Baechle <ralf@linux-mips.org>2013-02-01 04:00:22 -0500
commit7034228792cc561e79ff8600f02884bd4c80e287 (patch)
tree89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/kernel/traps.c
parent405ab01c70e18058d9c01a1256769a61fc65413e (diff)
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r--arch/mips/kernel/traps.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index e3a5f3ddab1a..08c07bdb7e6c 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -164,7 +164,7 @@ static void show_stacktrace(struct task_struct *task,
164 i = 0; 164 i = 0;
165 while ((unsigned long) sp & (PAGE_SIZE - 1)) { 165 while ((unsigned long) sp & (PAGE_SIZE - 1)) {
166 if (i && ((i % (64 / field)) == 0)) 166 if (i && ((i % (64 / field)) == 0))
167 printk("\n "); 167 printk("\n ");
168 if (i > 39) { 168 if (i > 39) {
169 printk(" ..."); 169 printk(" ...");
170 break; 170 break;
@@ -279,7 +279,7 @@ static void __show_regs(const struct pt_regs *regs)
279 printk("ra : %0*lx %pS\n", field, regs->regs[31], 279 printk("ra : %0*lx %pS\n", field, regs->regs[31],
280 (void *) regs->regs[31]); 280 (void *) regs->regs[31]);
281 281
282 printk("Status: %08x ", (uint32_t) regs->cp0_status); 282 printk("Status: %08x ", (uint32_t) regs->cp0_status);
283 283
284 if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) { 284 if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) {
285 if (regs->cp0_status & ST0_KUO) 285 if (regs->cp0_status & ST0_KUO)
@@ -441,7 +441,7 @@ asmlinkage void do_be(struct pt_regs *regs)
441 int data = regs->cp0_cause & 4; 441 int data = regs->cp0_cause & 4;
442 int action = MIPS_BE_FATAL; 442 int action = MIPS_BE_FATAL;
443 443
444 /* XXX For now. Fixme, this searches the wrong table ... */ 444 /* XXX For now. Fixme, this searches the wrong table ... */
445 if (data && !user_mode(regs)) 445 if (data && !user_mode(regs))
446 fixup = search_dbe_tables(exception_epc(regs)); 446 fixup = search_dbe_tables(exception_epc(regs));
447 447
@@ -739,7 +739,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
739 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X; 739 current->thread.fpu.fcr31 &= ~FPU_CSR_ALL_X;
740 740
741 /* Restore the hardware register state */ 741 /* Restore the hardware register state */
742 own_fpu(1); /* Using the FPU again. */ 742 own_fpu(1); /* Using the FPU again. */
743 743
744 /* If something went wrong, signal */ 744 /* If something went wrong, signal */
745 process_fpemu_return(sig, fault_addr); 745 process_fpemu_return(sig, fault_addr);
@@ -966,7 +966,7 @@ int cu2_notifier_call_chain(unsigned long val, void *v)
966} 966}
967 967
968static int default_cu2_call(struct notifier_block *nfb, unsigned long action, 968static int default_cu2_call(struct notifier_block *nfb, unsigned long action,
969 void *data) 969 void *data)
970{ 970{
971 struct pt_regs *regs = data; 971 struct pt_regs *regs = data;
972 972
@@ -974,7 +974,7 @@ static int default_cu2_call(struct notifier_block *nfb, unsigned long action,
974 default: 974 default:
975 die_if_kernel("Unhandled kernel unaligned access or invalid " 975 die_if_kernel("Unhandled kernel unaligned access or invalid "
976 "instruction", regs); 976 "instruction", regs);
977 /* Fall through */ 977 /* Fall through */
978 978
979 case CU2_EXCEPTION: 979 case CU2_EXCEPTION:
980 force_sig(SIGILL, current); 980 force_sig(SIGILL, current);
@@ -1029,10 +1029,10 @@ asmlinkage void do_cpu(struct pt_regs *regs)
1029 /* 1029 /*
1030 * Old (MIPS I and MIPS II) processors will set this code 1030 * Old (MIPS I and MIPS II) processors will set this code
1031 * for COP1X opcode instructions that replaced the original 1031 * for COP1X opcode instructions that replaced the original
1032 * COP3 space. We don't limit COP1 space instructions in 1032 * COP3 space. We don't limit COP1 space instructions in
1033 * the emulator according to the CPU ISA, so we want to 1033 * the emulator according to the CPU ISA, so we want to
1034 * treat COP1X instructions consistently regardless of which 1034 * treat COP1X instructions consistently regardless of which
1035 * code the CPU chose. Therefore we redirect this trap to 1035 * code the CPU chose. Therefore we redirect this trap to
1036 * the FP emulator too. 1036 * the FP emulator too.
1037 * 1037 *
1038 * Then some newer FPU-less processors use this code 1038 * Then some newer FPU-less processors use this code
@@ -1044,9 +1044,9 @@ asmlinkage void do_cpu(struct pt_regs *regs)
1044 /* Fall through. */ 1044 /* Fall through. */
1045 1045
1046 case 1: 1046 case 1:
1047 if (used_math()) /* Using the FPU again. */ 1047 if (used_math()) /* Using the FPU again. */
1048 own_fpu(1); 1048 own_fpu(1);
1049 else { /* First time FPU user. */ 1049 else { /* First time FPU user. */
1050 init_fpu(); 1050 init_fpu();
1051 set_used_math(); 1051 set_used_math();
1052 } 1052 }
@@ -1114,7 +1114,7 @@ asmlinkage void do_mcheck(struct pt_regs *regs)
1114 show_regs(regs); 1114 show_regs(regs);
1115 1115
1116 if (multi_match) { 1116 if (multi_match) {
1117 printk("Index : %0x\n", read_c0_index()); 1117 printk("Index : %0x\n", read_c0_index());
1118 printk("Pagemask: %0x\n", read_c0_pagemask()); 1118 printk("Pagemask: %0x\n", read_c0_pagemask());
1119 printk("EntryHi : %0*lx\n", field, read_c0_entryhi()); 1119 printk("EntryHi : %0*lx\n", field, read_c0_entryhi());
1120 printk("EntryLo0: %0*lx\n", field, read_c0_entrylo0()); 1120 printk("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
@@ -1181,7 +1181,7 @@ asmlinkage void do_dsp(struct pt_regs *regs)
1181asmlinkage void do_reserved(struct pt_regs *regs) 1181asmlinkage void do_reserved(struct pt_regs *regs)
1182{ 1182{
1183 /* 1183 /*
1184 * Game over - no way to handle this if it ever occurs. Most probably 1184 * Game over - no way to handle this if it ever occurs. Most probably
1185 * caused by a new unknown cpu type or after another deadly 1185 * caused by a new unknown cpu type or after another deadly
1186 * hard/software error. 1186 * hard/software error.
1187 */ 1187 */
@@ -1705,7 +1705,7 @@ void __init trap_init(void)
1705 1705
1706#if defined(CONFIG_KGDB) 1706#if defined(CONFIG_KGDB)
1707 if (kgdb_early_setup) 1707 if (kgdb_early_setup)
1708 return; /* Already done */ 1708 return; /* Already done */
1709#endif 1709#endif
1710 1710
1711 if (cpu_has_veic || cpu_has_vint) { 1711 if (cpu_has_veic || cpu_has_vint) {
@@ -1799,7 +1799,7 @@ void __init trap_init(void)
1799 * The R6000 is the only R-series CPU that features a machine 1799 * The R6000 is the only R-series CPU that features a machine
1800 * check exception (similar to the R4000 cache error) and 1800 * check exception (similar to the R4000 cache error) and
1801 * unaligned ldc1/sdc1 exception. The handlers have not been 1801 * unaligned ldc1/sdc1 exception. The handlers have not been
1802 * written yet. Well, anyway there is no R6000 machine on the 1802 * written yet. Well, anyway there is no R6000 machine on the
1803 * current list of targets for Linux/MIPS. 1803 * current list of targets for Linux/MIPS.
1804 * (Duh, crap, there is someone with a triple R6k machine) 1804 * (Duh, crap, there is someone with a triple R6k machine)
1805 */ 1805 */