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| author | Paul Mackerras <paulus@samba.org> | 2006-02-23 22:05:47 -0500 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-02-23 22:05:47 -0500 |
| commit | a00428f5b149e36b8225b2a0812742a6dfb07b8c (patch) | |
| tree | a78869cd67cf78a0eb091fb0ea5d397734bd6738 /arch/mips/kernel/smp_mt.c | |
| parent | 774fee58c465ea1c7e9775e347ec307bcf2deeb3 (diff) | |
| parent | fb5c594c2acc441f0d2d8f457484a0e0e9285db3 (diff) | |
Merge ../powerpc-merge
Diffstat (limited to 'arch/mips/kernel/smp_mt.c')
| -rw-r--r-- | arch/mips/kernel/smp_mt.c | 34 |
1 files changed, 5 insertions, 29 deletions
diff --git a/arch/mips/kernel/smp_mt.c b/arch/mips/kernel/smp_mt.c index 794a1c3de2a4..c930364830d0 100644 --- a/arch/mips/kernel/smp_mt.c +++ b/arch/mips/kernel/smp_mt.c | |||
| @@ -68,6 +68,8 @@ void __init sanitize_tlb_entries(void) | |||
| 68 | 68 | ||
| 69 | set_c0_mvpcontrol(MVPCONTROL_VPC); | 69 | set_c0_mvpcontrol(MVPCONTROL_VPC); |
| 70 | 70 | ||
| 71 | back_to_back_c0_hazard(); | ||
| 72 | |||
| 71 | /* Disable TLB sharing */ | 73 | /* Disable TLB sharing */ |
| 72 | clear_c0_mvpcontrol(MVPCONTROL_STLB); | 74 | clear_c0_mvpcontrol(MVPCONTROL_STLB); |
| 73 | 75 | ||
| @@ -102,35 +104,6 @@ void __init sanitize_tlb_entries(void) | |||
| 102 | clear_c0_mvpcontrol(MVPCONTROL_VPC); | 104 | clear_c0_mvpcontrol(MVPCONTROL_VPC); |
| 103 | } | 105 | } |
| 104 | 106 | ||
| 105 | #if 0 | ||
| 106 | /* | ||
| 107 | * Use c0_MVPConf0 to find out how many CPUs are available, setting up | ||
| 108 | * phys_cpu_present_map and the logical/physical mappings. | ||
| 109 | */ | ||
| 110 | void __init prom_build_cpu_map(void) | ||
| 111 | { | ||
| 112 | int i, num, ncpus; | ||
| 113 | |||
| 114 | cpus_clear(phys_cpu_present_map); | ||
| 115 | |||
| 116 | /* assume we boot on cpu 0.... */ | ||
| 117 | cpu_set(0, phys_cpu_present_map); | ||
| 118 | __cpu_number_map[0] = 0; | ||
| 119 | __cpu_logical_map[0] = 0; | ||
| 120 | |||
| 121 | if (cpu_has_mipsmt) { | ||
| 122 | ncpus = ((read_c0_mvpconf0() & (MVPCONF0_PVPE)) >> MVPCONF0_PVPE_SHIFT) + 1; | ||
| 123 | for (i=1, num=0; i< NR_CPUS && i<ncpus; i++) { | ||
| 124 | cpu_set(i, phys_cpu_present_map); | ||
| 125 | __cpu_number_map[i] = ++num; | ||
| 126 | __cpu_logical_map[num] = i; | ||
| 127 | } | ||
| 128 | |||
| 129 | printk(KERN_INFO "%i available secondary CPU(s)\n", num); | ||
| 130 | } | ||
| 131 | } | ||
| 132 | #endif | ||
| 133 | |||
| 134 | static void ipi_resched_dispatch (struct pt_regs *regs) | 107 | static void ipi_resched_dispatch (struct pt_regs *regs) |
| 135 | { | 108 | { |
| 136 | do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ, regs); | 109 | do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ, regs); |
| @@ -222,6 +195,9 @@ void prom_prepare_cpus(unsigned int max_cpus) | |||
| 222 | 195 | ||
| 223 | /* set config to be the same as vpe0, particularly kseg0 coherency alg */ | 196 | /* set config to be the same as vpe0, particularly kseg0 coherency alg */ |
| 224 | write_vpe_c0_config( read_c0_config()); | 197 | write_vpe_c0_config( read_c0_config()); |
| 198 | |||
| 199 | /* Propagate Config7 */ | ||
| 200 | write_vpe_c0_config7(read_c0_config7()); | ||
| 225 | } | 201 | } |
| 226 | 202 | ||
| 227 | } | 203 | } |
