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authorJon Fraser <jfraser@broadcom.com>2014-10-21 00:27:54 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 01:45:10 -0500
commitfa0106725923eba6497a7348424c97038a571ad9 (patch)
tree112f3b32e7d560fb569c61873bbf5328e18399f3 /arch/mips/kernel/smp-bmips.c
parentfc4557879320de99766061a38aaa345c0f72eb31 (diff)
MIPS: BMIPS: Allow BMIPS3300 to utilize SMP ebase relocation code
BMIPS3300 processors do not have the hardware to support SMP, but with a small tweak, the SMP ebase relocation code allows BMIPS3300-based platforms to reuse the S2/S3 power management code from BMIPS4380-based chips. Normally this is as simple as adding one line to prom_init(): board_ebase_setup = &bmips_ebase_setup; Signed-off-by: Jon Fraser <jfraser@broadcom.com> Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8159/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/smp-bmips.c')
-rw-r--r--arch/mips/kernel/smp-bmips.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index 8383fa460d42..887c3ea0ed57 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -541,6 +541,7 @@ void bmips_ebase_setup(void)
541 &bmips_smp_int_vec, 0x80); 541 &bmips_smp_int_vec, 0x80);
542 __sync(); 542 __sync();
543 return; 543 return;
544 case CPU_BMIPS3300:
544 case CPU_BMIPS4380: 545 case CPU_BMIPS4380:
545 /* 546 /*
546 * 0x8000_0000: reset/NMI (initially in kseg1) 547 * 0x8000_0000: reset/NMI (initially in kseg1)