[MIPS] MIPS32/MIPS64 secondary cache management

    
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 0 insertions, 2 deletions

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 8c2c359a05f4..e045aba4ebda 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -597,8 +597,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
                 break;
         case PRID_IMP_25KF:
                 c->cputype = CPU_25KF;
-                /* Probe for L2 cache */
-                c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
                 break;
         case PRID_IMP_34K:
                 c->cputype = CPU_34K;