diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
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committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/mips/jz4740/irq.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/mips/jz4740/irq.c')
-rw-r--r-- | arch/mips/jz4740/irq.c | 34 |
1 files changed, 21 insertions, 13 deletions
diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index 7d33ff83580f..d82c0c430e03 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c | |||
@@ -43,32 +43,37 @@ static uint32_t jz_intc_saved; | |||
43 | 43 | ||
44 | #define IRQ_BIT(x) BIT((x) - JZ4740_IRQ_BASE) | 44 | #define IRQ_BIT(x) BIT((x) - JZ4740_IRQ_BASE) |
45 | 45 | ||
46 | static void intc_irq_unmask(unsigned int irq) | 46 | static inline unsigned long intc_irq_bit(struct irq_data *data) |
47 | { | 47 | { |
48 | writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); | 48 | return (unsigned long)irq_data_get_irq_chip_data(data); |
49 | } | 49 | } |
50 | 50 | ||
51 | static void intc_irq_mask(unsigned int irq) | 51 | static void intc_irq_unmask(struct irq_data *data) |
52 | { | 52 | { |
53 | writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_SET_MASK); | 53 | writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); |
54 | } | 54 | } |
55 | 55 | ||
56 | static int intc_irq_set_wake(unsigned int irq, unsigned int on) | 56 | static void intc_irq_mask(struct irq_data *data) |
57 | { | ||
58 | writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_SET_MASK); | ||
59 | } | ||
60 | |||
61 | static int intc_irq_set_wake(struct irq_data *data, unsigned int on) | ||
57 | { | 62 | { |
58 | if (on) | 63 | if (on) |
59 | jz_intc_wakeup |= IRQ_BIT(irq); | 64 | jz_intc_wakeup |= intc_irq_bit(data); |
60 | else | 65 | else |
61 | jz_intc_wakeup &= ~IRQ_BIT(irq); | 66 | jz_intc_wakeup &= ~intc_irq_bit(data); |
62 | 67 | ||
63 | return 0; | 68 | return 0; |
64 | } | 69 | } |
65 | 70 | ||
66 | static struct irq_chip intc_irq_type = { | 71 | static struct irq_chip intc_irq_type = { |
67 | .name = "INTC", | 72 | .name = "INTC", |
68 | .mask = intc_irq_mask, | 73 | .irq_mask = intc_irq_mask, |
69 | .mask_ack = intc_irq_mask, | 74 | .irq_mask_ack = intc_irq_mask, |
70 | .unmask = intc_irq_unmask, | 75 | .irq_unmask = intc_irq_unmask, |
71 | .set_wake = intc_irq_set_wake, | 76 | .irq_set_wake = intc_irq_set_wake, |
72 | }; | 77 | }; |
73 | 78 | ||
74 | static irqreturn_t jz4740_cascade(int irq, void *data) | 79 | static irqreturn_t jz4740_cascade(int irq, void *data) |
@@ -95,9 +100,12 @@ void __init arch_init_irq(void) | |||
95 | 100 | ||
96 | jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14); | 101 | jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14); |
97 | 102 | ||
103 | /* Mask all irqs */ | ||
104 | writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK); | ||
105 | |||
98 | for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) { | 106 | for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) { |
99 | intc_irq_mask(i); | 107 | irq_set_chip_data(i, (void *)IRQ_BIT(i)); |
100 | set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq); | 108 | irq_set_chip_and_handler(i, &intc_irq_type, handle_level_irq); |
101 | } | 109 | } |
102 | 110 | ||
103 | setup_irq(2, &jz4740_cascade_action); | 111 | setup_irq(2, &jz4740_cascade_action); |