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authorRalf Baechle <ralf@linux-mips.org>2014-06-04 16:53:02 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-06-04 16:53:02 -0400
commitf8647b506d7116a1a3accd8d618184096e85f50b (patch)
treef10bc7201fda2a36c035548a0ea62210ad57adb6 /arch/mips/include
parent1d421ca9d7edbac1eb118631ee039d50ab54771e (diff)
parentf7a89f1b8eb598ac5da61c9795b3d847baa73d12 (diff)
Merge branch '3.15-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/cpu-info.h4
-rw-r--r--arch/mips/include/asm/msa.h2
-rw-r--r--arch/mips/include/uapi/asm/unistd.h6
3 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index 7ba0e07a9091..47d5967ce7ef 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -39,14 +39,14 @@ struct cache_desc {
39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ 39#define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
40 40
41struct cpuinfo_mips { 41struct cpuinfo_mips {
42 unsigned int udelay_val; 42 unsigned long asid_cache;
43 unsigned int asid_cache;
44 43
45 /* 44 /*
46 * Capability and feature descriptor structure for MIPS CPU 45 * Capability and feature descriptor structure for MIPS CPU
47 */ 46 */
48 unsigned long options; 47 unsigned long options;
49 unsigned long ases; 48 unsigned long ases;
49 unsigned int udelay_val;
50 unsigned int processor_id; 50 unsigned int processor_id;
51 unsigned int fpu_id; 51 unsigned int fpu_id;
52 unsigned int msa_id; 52 unsigned int msa_id;
diff --git a/arch/mips/include/asm/msa.h b/arch/mips/include/asm/msa.h
index 52450a040f44..538f6d482db8 100644
--- a/arch/mips/include/asm/msa.h
+++ b/arch/mips/include/asm/msa.h
@@ -84,7 +84,7 @@ static inline void write_msa_##name(unsigned int val) \
84 __asm__ __volatile__( \ 84 __asm__ __volatile__( \
85 " .set push\n" \ 85 " .set push\n" \
86 " .set msa\n" \ 86 " .set msa\n" \
87 " cfcmsa $" #cs ", %0\n" \ 87 " ctcmsa $" #cs ", %0\n" \
88 " .set pop\n" \ 88 " .set pop\n" \
89 : : "r"(val)); \ 89 : : "r"(val)); \
90} 90}
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index 2692abb28e36..5805414777e0 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -381,7 +381,7 @@
381#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 381#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
382 382
383#define __NR_O32_Linux 4000 383#define __NR_O32_Linux 4000
384#define __NR_O32_Linux_syscalls 350 384#define __NR_O32_Linux_syscalls 351
385 385
386#if _MIPS_SIM == _MIPS_SIM_ABI64 386#if _MIPS_SIM == _MIPS_SIM_ABI64
387 387
@@ -710,7 +710,7 @@
710#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ 710#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
711 711
712#define __NR_64_Linux 5000 712#define __NR_64_Linux 5000
713#define __NR_64_Linux_syscalls 310 713#define __NR_64_Linux_syscalls 311
714 714
715#if _MIPS_SIM == _MIPS_SIM_NABI32 715#if _MIPS_SIM == _MIPS_SIM_NABI32
716 716
@@ -1043,6 +1043,6 @@
1043#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ 1043#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1044 1044
1045#define __NR_N32_Linux 6000 1045#define __NR_N32_Linux 6000
1046#define __NR_N32_Linux_syscalls 314 1046#define __NR_N32_Linux_syscalls 315
1047 1047
1048#endif /* _UAPI_ASM_UNISTD_H */ 1048#endif /* _UAPI_ASM_UNISTD_H */