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authorHuacai Chen <chenhc@lemote.com>2014-11-04 01:13:26 -0500
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 01:45:01 -0500
commitec0f8d3fbb7ea12cfd10083e340381b96e7c34f8 (patch)
tree9550596fd52cccb8b7026c7135553255ddb0313d /arch/mips/include
parentf490682a6b21ffed5acd7a0d49d8371e5e625d7a (diff)
MIPS: Loongson: Allow booting from any core
By offering Logical->Physical core id mapping, so as to reserve some physical cores via mask. This allow booting from any core when core-0 has problems. Since the maximun cores supported by Loongson-3 is 16, 32-bit cpu_startup_core_id can be split to 16-bit cpu_startup_core_id and 16-bit reserved_cores_mask for compatibility. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/mach-loongson/boot_param.h5
-rw-r--r--arch/mips/include/asm/mach-loongson/irq.h3
-rw-r--r--arch/mips/include/asm/mach-loongson/topology.h2
3 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/include/asm/mach-loongson/boot_param.h b/arch/mips/include/asm/mach-loongson/boot_param.h
index 3388fc53599e..11ebf4ca2b41 100644
--- a/arch/mips/include/asm/mach-loongson/boot_param.h
+++ b/arch/mips/include/asm/mach-loongson/boot_param.h
@@ -42,7 +42,8 @@ struct efi_cpuinfo_loongson {
42 u32 processor_id; /* PRID, e.g. 6305, 6306 */ 42 u32 processor_id; /* PRID, e.g. 6305, 6306 */
43 u32 cputype; /* Loongson_3A/3B, etc. */ 43 u32 cputype; /* Loongson_3A/3B, etc. */
44 u32 total_node; /* num of total numa nodes */ 44 u32 total_node; /* num of total numa nodes */
45 u32 cpu_startup_core_id; /* Core id */ 45 u16 cpu_startup_core_id; /* Boot core id */
46 u16 reserved_cores_mask;
46 u32 cpu_clock_freq; /* cpu_clock */ 47 u32 cpu_clock_freq; /* cpu_clock */
47 u32 nr_cpus; 48 u32 nr_cpus;
48} __packed; 49} __packed;
@@ -149,6 +150,8 @@ struct loongson_system_configuration {
149 u32 nr_nodes; 150 u32 nr_nodes;
150 int cores_per_node; 151 int cores_per_node;
151 int cores_per_package; 152 int cores_per_package;
153 u16 boot_cpu_id;
154 u16 reserved_cpus_mask;
152 enum loongson_cpu_type cputype; 155 enum loongson_cpu_type cputype;
153 u64 ht_control_base; 156 u64 ht_control_base;
154 u64 pci_mem_start_addr; 157 u64 pci_mem_start_addr;
diff --git a/arch/mips/include/asm/mach-loongson/irq.h b/arch/mips/include/asm/mach-loongson/irq.h
index 34560bda6626..a281cca5f2fb 100644
--- a/arch/mips/include/asm/mach-loongson/irq.h
+++ b/arch/mips/include/asm/mach-loongson/irq.h
@@ -32,8 +32,7 @@
32#define LOONGSON_INT_ROUTER_LPC LOONGSON_INT_ROUTER_ENTRY(0x0a) 32#define LOONGSON_INT_ROUTER_LPC LOONGSON_INT_ROUTER_ENTRY(0x0a)
33#define LOONGSON_INT_ROUTER_HT1(n) LOONGSON_INT_ROUTER_ENTRY(n + 0x18) 33#define LOONGSON_INT_ROUTER_HT1(n) LOONGSON_INT_ROUTER_ENTRY(n + 0x18)
34 34
35#define LOONGSON_INT_CORE0_INT0 0x11 /* route to int 0 of core 0 */ 35#define LOONGSON_INT_COREx_INTy(x, y) (1<<(x) | 1<<(y+4)) /* route to int y of core x */
36#define LOONGSON_INT_CORE0_INT1 0x21 /* route to int 1 of core 0 */
37 36
38#endif 37#endif
39 38
diff --git a/arch/mips/include/asm/mach-loongson/topology.h b/arch/mips/include/asm/mach-loongson/topology.h
index 5598ba77d2ef..0d8f3b55bdbc 100644
--- a/arch/mips/include/asm/mach-loongson/topology.h
+++ b/arch/mips/include/asm/mach-loongson/topology.h
@@ -3,7 +3,7 @@
3 3
4#ifdef CONFIG_NUMA 4#ifdef CONFIG_NUMA
5 5
6#define cpu_to_node(cpu) ((cpu) >> 2) 6#define cpu_to_node(cpu) (cpu_logical_map(cpu) >> 2)
7#define parent_node(node) (node) 7#define parent_node(node) (node)
8#define cpumask_of_node(node) (&__node_data[(node)]->cpumask) 8#define cpumask_of_node(node) (&__node_data[(node)]->cpumask)
9 9