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authorSteven J. Hill <Steven.Hill@imgtec.com>2014-04-15 17:06:49 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-06-04 16:50:41 -0400
commitd96cc3d1ec5dcbb49a5a990d699239d590624799 (patch)
tree5e37b4ff0bb650e046b78a57e63f999a5b5c6ffd /arch/mips/include
parent8e9ecbc5e21bf82693e52ec75b1f45c1245a9bea (diff)
MIPS: Add microMIPS MSA support.
This patch adds support for the microMIPS implementation of the MSA instructions. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Reviewed-by: Paul Burton <Paul.Burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6763/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/asmmacro.h40
-rw-r--r--arch/mips/include/asm/msa.h13
2 files changed, 43 insertions, 10 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index f7db79a846bb..935543f14538 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -249,13 +249,35 @@
249 .set pop 249 .set pop
250 .endm 250 .endm
251#else 251#else
252
253#ifdef CONFIG_CPU_MICROMIPS
254#define CFC_MSA_INSN 0x587e0056
255#define CTC_MSA_INSN 0x583e0816
256#define LDD_MSA_INSN 0x58000837
257#define STD_MSA_INSN 0x5800083f
258#define COPY_UW_MSA_INSN 0x58f00056
259#define COPY_UD_MSA_INSN 0x58f80056
260#define INSERT_W_MSA_INSN 0x59300816
261#define INSERT_D_MSA_INSN 0x59380816
262#else
263#define CFC_MSA_INSN 0x787e0059
264#define CTC_MSA_INSN 0x783e0819
265#define LDD_MSA_INSN 0x78000823
266#define STD_MSA_INSN 0x78000827
267#define COPY_UW_MSA_INSN 0x78f00059
268#define COPY_UD_MSA_INSN 0x78f80059
269#define INSERT_W_MSA_INSN 0x79300819
270#define INSERT_D_MSA_INSN 0x79380819
271#endif
272
252 /* 273 /*
253 * Temporary until all toolchains in use include MSA support. 274 * Temporary until all toolchains in use include MSA support.
254 */ 275 */
255 .macro cfcmsa rd, cs 276 .macro cfcmsa rd, cs
256 .set push 277 .set push
257 .set noat 278 .set noat
258 .word 0x787e0059 | (\cs << 11) 279 .insn
280 .word CFC_MSA_INSN | (\cs << 11)
259 move \rd, $1 281 move \rd, $1
260 .set pop 282 .set pop
261 .endm 283 .endm
@@ -264,7 +286,7 @@
264 .set push 286 .set push
265 .set noat 287 .set noat
266 move $1, \rs 288 move $1, \rs
267 .word 0x783e0819 | (\cd << 6) 289 .word CTC_MSA_INSN | (\cd << 6)
268 .set pop 290 .set pop
269 .endm 291 .endm
270 292
@@ -272,7 +294,7 @@
272 .set push 294 .set push
273 .set noat 295 .set noat
274 add $1, \base, \off 296 add $1, \base, \off
275 .word 0x78000823 | (\wd << 6) 297 .word LDD_MSA_INSN | (\wd << 6)
276 .set pop 298 .set pop
277 .endm 299 .endm
278 300
@@ -280,14 +302,15 @@
280 .set push 302 .set push
281 .set noat 303 .set noat
282 add $1, \base, \off 304 add $1, \base, \off
283 .word 0x78000827 | (\wd << 6) 305 .word STD_MSA_INSN | (\wd << 6)
284 .set pop 306 .set pop
285 .endm 307 .endm
286 308
287 .macro copy_u_w rd, ws, n 309 .macro copy_u_w rd, ws, n
288 .set push 310 .set push
289 .set noat 311 .set noat
290 .word 0x78f00059 | (\n << 16) | (\ws << 11) 312 .insn
313 .word COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
291 /* move triggers an assembler bug... */ 314 /* move triggers an assembler bug... */
292 or \rd, $1, zero 315 or \rd, $1, zero
293 .set pop 316 .set pop
@@ -296,7 +319,8 @@
296 .macro copy_u_d rd, ws, n 319 .macro copy_u_d rd, ws, n
297 .set push 320 .set push
298 .set noat 321 .set noat
299 .word 0x78f80059 | (\n << 16) | (\ws << 11) 322 .insn
323 .word COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
300 /* move triggers an assembler bug... */ 324 /* move triggers an assembler bug... */
301 or \rd, $1, zero 325 or \rd, $1, zero
302 .set pop 326 .set pop
@@ -307,7 +331,7 @@
307 .set noat 331 .set noat
308 /* move triggers an assembler bug... */ 332 /* move triggers an assembler bug... */
309 or $1, \rs, zero 333 or $1, \rs, zero
310 .word 0x79300819 | (\n << 16) | (\wd << 6) 334 .word INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
311 .set pop 335 .set pop
312 .endm 336 .endm
313 337
@@ -316,7 +340,7 @@
316 .set noat 340 .set noat
317 /* move triggers an assembler bug... */ 341 /* move triggers an assembler bug... */
318 or $1, \rs, zero 342 or $1, \rs, zero
319 .word 0x79380819 | (\n << 16) | (\wd << 6) 343 .word INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
320 .set pop 344 .set pop
321 .endm 345 .endm
322#endif 346#endif
diff --git a/arch/mips/include/asm/msa.h b/arch/mips/include/asm/msa.h
index a2aba6c3ec05..52450a040f44 100644
--- a/arch/mips/include/asm/msa.h
+++ b/arch/mips/include/asm/msa.h
@@ -96,6 +96,13 @@ static inline void write_msa_##name(unsigned int val) \
96 * allow compilation with toolchains that do not support MSA. Once all 96 * allow compilation with toolchains that do not support MSA. Once all
97 * toolchains in use support MSA these can be removed. 97 * toolchains in use support MSA these can be removed.
98 */ 98 */
99#ifdef CONFIG_CPU_MICROMIPS
100#define CFC_MSA_INSN 0x587e0056
101#define CTC_MSA_INSN 0x583e0816
102#else
103#define CFC_MSA_INSN 0x787e0059
104#define CTC_MSA_INSN 0x783e0819
105#endif
99 106
100#define __BUILD_MSA_CTL_REG(name, cs) \ 107#define __BUILD_MSA_CTL_REG(name, cs) \
101static inline unsigned int read_msa_##name(void) \ 108static inline unsigned int read_msa_##name(void) \
@@ -104,7 +111,8 @@ static inline unsigned int read_msa_##name(void) \
104 __asm__ __volatile__( \ 111 __asm__ __volatile__( \
105 " .set push\n" \ 112 " .set push\n" \
106 " .set noat\n" \ 113 " .set noat\n" \
107 " .word 0x787e0059 | (" #cs " << 11)\n" \ 114 " .insn\n" \
115 " .word #CFC_MSA_INSN | (" #cs " << 11)\n" \
108 " move %0, $1\n" \ 116 " move %0, $1\n" \
109 " .set pop\n" \ 117 " .set pop\n" \
110 : "=r"(reg)); \ 118 : "=r"(reg)); \
@@ -117,7 +125,8 @@ static inline void write_msa_##name(unsigned int val) \
117 " .set push\n" \ 125 " .set push\n" \
118 " .set noat\n" \ 126 " .set noat\n" \
119 " move $1, %0\n" \ 127 " move $1, %0\n" \
120 " .word 0x783e0819 | (" #cs " << 6)\n" \ 128 " .insn\n" \
129 " .word #CTC_MSA_INSN | (" #cs " << 6)\n" \
121 " .set pop\n" \ 130 " .set pop\n" \
122 : : "r"(val)); \ 131 : : "r"(val)); \
123} 132}