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authorDavid VomLehn <dvomlehn@cisco.com>2009-12-23 20:34:46 -0500
committerRalf Baechle <ralf@linux-mips.org>2010-01-27 18:03:31 -0500
commit59dfa2fcaecc39fb88bfa196cb15adca7146867a (patch)
tree25a1e3541ec399110d7a53ac8162e1bbcbd5efc0 /arch/mips/include
parent9c4a6fce2032fcb5bb8339d53fd3dadfd7ddfb98 (diff)
MIPS: PowerTV: Streamline access to platform device registers
Pre-compute addresses for the basic ASIC registers. This speeds up access and allows memory for unused configurations to be freed. In addition, uninitialized register addresses will be returned as NULL to catch bad usage quickly. Signed-off-by: David VomLehn <dvomlehn@cisco.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/806/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/mach-powertv/asic_reg_map.h90
-rw-r--r--arch/mips/include/asm/mach-powertv/asic_regs.h135
2 files changed, 141 insertions, 84 deletions
diff --git a/arch/mips/include/asm/mach-powertv/asic_reg_map.h b/arch/mips/include/asm/mach-powertv/asic_reg_map.h
new file mode 100644
index 000000000000..6f26cb09828e
--- /dev/null
+++ b/arch/mips/include/asm/mach-powertv/asic_reg_map.h
@@ -0,0 +1,90 @@
1/*
2 * asic_reg_map.h
3 *
4 * A macro-enclosed list of the elements for the register_map structure for
5 * use in defining and manipulating the structure.
6 *
7 * Copyright (C) 2009 Cisco Systems, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24REGISTER_MAP_ELEMENT(eic_slow0_strt_add)
25REGISTER_MAP_ELEMENT(eic_cfg_bits)
26REGISTER_MAP_ELEMENT(eic_ready_status)
27REGISTER_MAP_ELEMENT(chipver3)
28REGISTER_MAP_ELEMENT(chipver2)
29REGISTER_MAP_ELEMENT(chipver1)
30REGISTER_MAP_ELEMENT(chipver0)
31REGISTER_MAP_ELEMENT(uart1_intstat)
32REGISTER_MAP_ELEMENT(uart1_inten)
33REGISTER_MAP_ELEMENT(uart1_config1)
34REGISTER_MAP_ELEMENT(uart1_config2)
35REGISTER_MAP_ELEMENT(uart1_divisorhi)
36REGISTER_MAP_ELEMENT(uart1_divisorlo)
37REGISTER_MAP_ELEMENT(uart1_data)
38REGISTER_MAP_ELEMENT(uart1_status)
39REGISTER_MAP_ELEMENT(int_stat_3)
40REGISTER_MAP_ELEMENT(int_stat_2)
41REGISTER_MAP_ELEMENT(int_stat_1)
42REGISTER_MAP_ELEMENT(int_stat_0)
43REGISTER_MAP_ELEMENT(int_config)
44REGISTER_MAP_ELEMENT(int_int_scan)
45REGISTER_MAP_ELEMENT(ien_int_3)
46REGISTER_MAP_ELEMENT(ien_int_2)
47REGISTER_MAP_ELEMENT(ien_int_1)
48REGISTER_MAP_ELEMENT(ien_int_0)
49REGISTER_MAP_ELEMENT(int_level_3_3)
50REGISTER_MAP_ELEMENT(int_level_3_2)
51REGISTER_MAP_ELEMENT(int_level_3_1)
52REGISTER_MAP_ELEMENT(int_level_3_0)
53REGISTER_MAP_ELEMENT(int_level_2_3)
54REGISTER_MAP_ELEMENT(int_level_2_2)
55REGISTER_MAP_ELEMENT(int_level_2_1)
56REGISTER_MAP_ELEMENT(int_level_2_0)
57REGISTER_MAP_ELEMENT(int_level_1_3)
58REGISTER_MAP_ELEMENT(int_level_1_2)
59REGISTER_MAP_ELEMENT(int_level_1_1)
60REGISTER_MAP_ELEMENT(int_level_1_0)
61REGISTER_MAP_ELEMENT(int_level_0_3)
62REGISTER_MAP_ELEMENT(int_level_0_2)
63REGISTER_MAP_ELEMENT(int_level_0_1)
64REGISTER_MAP_ELEMENT(int_level_0_0)
65REGISTER_MAP_ELEMENT(int_docsis_en)
66REGISTER_MAP_ELEMENT(mips_pll_setup)
67REGISTER_MAP_ELEMENT(usb_fs)
68REGISTER_MAP_ELEMENT(test_bus)
69REGISTER_MAP_ELEMENT(crt_spare)
70REGISTER_MAP_ELEMENT(usb2_ohci_int_mask)
71REGISTER_MAP_ELEMENT(usb2_strap)
72REGISTER_MAP_ELEMENT(ehci_hcapbase)
73REGISTER_MAP_ELEMENT(ohci_hc_revision)
74REGISTER_MAP_ELEMENT(bcm1_bs_lmi_steer)
75REGISTER_MAP_ELEMENT(usb2_control)
76REGISTER_MAP_ELEMENT(usb2_stbus_obc)
77REGISTER_MAP_ELEMENT(usb2_stbus_mess_size)
78REGISTER_MAP_ELEMENT(usb2_stbus_chunk_size)
79REGISTER_MAP_ELEMENT(pcie_regs)
80REGISTER_MAP_ELEMENT(tim_ch)
81REGISTER_MAP_ELEMENT(tim_cl)
82REGISTER_MAP_ELEMENT(gpio_dout)
83REGISTER_MAP_ELEMENT(gpio_din)
84REGISTER_MAP_ELEMENT(gpio_dir)
85REGISTER_MAP_ELEMENT(watchdog)
86REGISTER_MAP_ELEMENT(front_panel)
87REGISTER_MAP_ELEMENT(misc_clk_ctl1)
88REGISTER_MAP_ELEMENT(misc_clk_ctl2)
89REGISTER_MAP_ELEMENT(crt_ext_ctl)
90REGISTER_MAP_ELEMENT(register_maps)
diff --git a/arch/mips/include/asm/mach-powertv/asic_regs.h b/arch/mips/include/asm/mach-powertv/asic_regs.h
index 9a65c93782f9..1e11236c6dbc 100644
--- a/arch/mips/include/asm/mach-powertv/asic_regs.h
+++ b/arch/mips/include/asm/mach-powertv/asic_regs.h
@@ -35,11 +35,12 @@ enum asic_type {
35#define CRONUS_11 0x0B4C1C21 35#define CRONUS_11 0x0B4C1C21
36#define CRONUSLITE_10 0x0B4C1C40 36#define CRONUSLITE_10 0x0B4C1C40
37 37
38#define NAND_FLASH_BASE 0x03000000 38#define NAND_FLASH_BASE 0x03000000
39#define ZEUS_IO_BASE 0x09000000
40#define CALLIOPE_IO_BASE 0x08000000 39#define CALLIOPE_IO_BASE 0x08000000
41#define CRONUS_IO_BASE 0x09000000 40#define CRONUS_IO_BASE 0x09000000
42#define ASIC_IO_SIZE 0x01000000 41#define ZEUS_IO_BASE 0x09000000
42
43#define ASIC_IO_SIZE 0x01000000
43 44
44/* Definitions for backward compatibility */ 45/* Definitions for backward compatibility */
45#define UART1_INTSTAT uart1_intstat 46#define UART1_INTSTAT uart1_intstat
@@ -52,96 +53,62 @@ enum asic_type {
52#define UART1_STATUS uart1_status 53#define UART1_STATUS uart1_status
53 54
54/* ASIC register enumeration */ 55/* ASIC register enumeration */
56union register_map_entry {
57 unsigned long phys;
58 u32 *virt;
59};
60
61#define REGISTER_MAP_ELEMENT(x) union register_map_entry x;
55struct register_map { 62struct register_map {
56 u32 eic_slow0_strt_add; 63#include <asm/mach-powertv/asic_reg_map.h>
57 u32 eic_cfg_bits;
58 u32 eic_ready_status;
59
60 u32 chipver3;
61 u32 chipver2;
62 u32 chipver1;
63 u32 chipver0;
64
65 u32 uart1_intstat;
66 u32 uart1_inten;
67 u32 uart1_config1;
68 u32 uart1_config2;
69 u32 uart1_divisorhi;
70 u32 uart1_divisorlo;
71 u32 uart1_data;
72 u32 uart1_status;
73
74 u32 int_stat_3;
75 u32 int_stat_2;
76 u32 int_stat_1;
77 u32 int_stat_0;
78 u32 int_config;
79 u32 int_int_scan;
80 u32 ien_int_3;
81 u32 ien_int_2;
82 u32 ien_int_1;
83 u32 ien_int_0;
84 u32 int_level_3_3;
85 u32 int_level_3_2;
86 u32 int_level_3_1;
87 u32 int_level_3_0;
88 u32 int_level_2_3;
89 u32 int_level_2_2;
90 u32 int_level_2_1;
91 u32 int_level_2_0;
92 u32 int_level_1_3;
93 u32 int_level_1_2;
94 u32 int_level_1_1;
95 u32 int_level_1_0;
96 u32 int_level_0_3;
97 u32 int_level_0_2;
98 u32 int_level_0_1;
99 u32 int_level_0_0;
100 u32 int_docsis_en;
101
102 u32 mips_pll_setup;
103 u32 usb_fs;
104 u32 test_bus;
105 u32 crt_spare;
106 u32 usb2_ohci_int_mask;
107 u32 usb2_strap;
108 u32 ehci_hcapbase;
109 u32 ohci_hc_revision;
110 u32 bcm1_bs_lmi_steer;
111 u32 usb2_control;
112 u32 usb2_stbus_obc;
113 u32 usb2_stbus_mess_size;
114 u32 usb2_stbus_chunk_size;
115
116 u32 pcie_regs;
117 u32 tim_ch;
118 u32 tim_cl;
119 u32 gpio_dout;
120 u32 gpio_din;
121 u32 gpio_dir;
122 u32 watchdog;
123 u32 front_panel;
124
125 u32 register_maps;
126}; 64};
65#undef REGISTER_MAP_ELEMENT
66
67/**
68 * register_map_offset_phys - add an offset to the physical address
69 * @map: Pointer to the &struct register_map
70 * @offset: Value to add
71 *
72 * Only adds the base to non-zero physical addresses
73 */
74static inline void register_map_offset_phys(struct register_map *map,
75 unsigned long offset)
76{
77#define REGISTER_MAP_ELEMENT(x) do { \
78 if (map->x.phys != 0) \
79 map->x.phys += offset; \
80 } while (false);
81
82#include <asm/mach-powertv/asic_reg_map.h>
83#undef REGISTER_MAP_ELEMENT
84}
85
86/**
87 * register_map_virtualize - Convert &register_map to virtual addresses
88 * @map: Pointer to &register_map to virtualize
89 */
90static inline void register_map_virtualize(struct register_map *map)
91{
92#define REGISTER_MAP_ELEMENT(x) do { \
93 map->x.virt = (!map->x.phys) ? NULL : \
94 UNCAC_ADDR(phys_to_virt(map->x.phys)); \
95 } while (false);
96
97#include <asm/mach-powertv/asic_reg_map.h>
98#undef REGISTER_MAP_ELEMENT
99}
127 100
128extern enum asic_type asic; 101extern struct register_map _asic_register_map;
129extern const struct register_map *register_map;
130extern unsigned long asic_phy_base; /* Physical address of ASIC */
131extern unsigned long asic_base; /* Virtual address of ASIC */
132 102
133/* 103/*
134 * Macros to interface to registers through their ioremapped address 104 * Macros to interface to registers through their ioremapped address
135 * asic_reg_offset Returns the offset of a given register from the start
136 * of the ASIC address space
137 * asic_reg_phys_addr Returns the physical address of the given register 105 * asic_reg_phys_addr Returns the physical address of the given register
138 * asic_reg_addr Returns the iomapped virtual address of the given 106 * asic_reg_addr Returns the iomapped virtual address of the given
139 * register. 107 * register.
140 */ 108 */
141#define asic_reg_offset(x) (register_map->x) 109#define asic_reg_addr(x) (_asic_register_map.x.virt)
142#define asic_reg_phys_addr(x) (asic_phy_base + asic_reg_offset(x)) 110#define asic_reg_phys_addr(x) (virt_to_phys((void *) CAC_ADDR( \
143#define asic_reg_addr(x) \ 111 (unsigned long) asic_reg_addr(x))))
144 ((unsigned int *) (asic_base + asic_reg_offset(x)))
145 112
146/* 113/*
147 * The asic_reg macro is gone. It should be replaced by either asic_read or 114 * The asic_reg macro is gone. It should be replaced by either asic_read or
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-09 22:26:50 -0400