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authorRalf Baechle <ralf@linux-mips.org>2013-08-08 04:49:29 -0400
committerRalf Baechle <ralf@linux-mips.org>2013-08-26 09:31:55 -0400
commit43d309390349010cd384ab5a0feebf16b03b9a94 (patch)
tree679de335ae83b76ea9feefbcfcb535176b4f918c /arch/mips/include
parent7848ea79025d07a5b35bfebb700f11999e5be69e (diff)
MIPS: BMIPS: Fix compilation for BMIPS5000
Commit 02b849f7613003fe5f9e58bf233d49b0ebd4a5e8 ("MIPS: Get rid of the use of .macro in C code.") replaced the macro usage but missed the accessors in bmips.h, causing the following build error: CC arch/mips/kernel/smp-bmips.o {standard input}: Assembler messages: {standard input}:951: Error: Unrecognized opcode `_ssnop' {standard input}:952: Error: Unrecognized opcode `_ssnop' (...) make[6]: *** [arch/mips/kernel/smp-bmips.o] Error 1 Fix by rewriting the inline assembler using existing inline functions. The generated code should stay unchanged. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5644/ Reviewed-by: Jonas Gorski <jogo@openwrt.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/bmips.h55
1 files changed, 22 insertions, 33 deletions
diff --git a/arch/mips/include/asm/bmips.h b/arch/mips/include/asm/bmips.h
index 552a65a0cf2b..27bd060d716e 100644
--- a/arch/mips/include/asm/bmips.h
+++ b/arch/mips/include/asm/bmips.h
@@ -65,44 +65,33 @@ static inline unsigned long bmips_read_zscm_reg(unsigned int offset)
65{ 65{
66 unsigned long ret; 66 unsigned long ret;
67 67
68 __asm__ __volatile__( 68 barrier();
69 ".set push\n" 69 cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset);
70 ".set noreorder\n" 70 __sync();
71 "cache %1, 0(%2)\n" 71 _ssnop();
72 "sync\n" 72 _ssnop();
73 "_ssnop\n" 73 _ssnop();
74 "_ssnop\n" 74 _ssnop();
75 "_ssnop\n" 75 _ssnop();
76 "_ssnop\n" 76 _ssnop();
77 "_ssnop\n" 77 _ssnop();
78 "_ssnop\n" 78 ret = read_c0_ddatalo();
79 "_ssnop\n" 79 _ssnop();
80 "mfc0 %0, $28, 3\n" 80
81 "_ssnop\n"
82 ".set pop\n"
83 : "=&r" (ret)
84 : "i" (Index_Load_Tag_S), "r" (ZSCM_REG_BASE + offset)
85 : "memory");
86 return ret; 81 return ret;
87} 82}
88 83
89static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data) 84static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data)
90{ 85{
91 __asm__ __volatile__( 86 write_c0_ddatalo(data);
92 ".set push\n" 87 _ssnop();
93 ".set noreorder\n" 88 _ssnop();
94 "mtc0 %0, $28, 3\n" 89 _ssnop();
95 "_ssnop\n" 90 cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset);
96 "_ssnop\n" 91 _ssnop();
97 "_ssnop\n" 92 _ssnop();
98 "cache %1, 0(%2)\n" 93 _ssnop();
99 "_ssnop\n" 94 barrier();
100 "_ssnop\n"
101 "_ssnop\n"
102 : /* no outputs */
103 : "r" (data),
104 "i" (Index_Store_Tag_S), "r" (ZSCM_REG_BASE + offset)
105 : "memory");
106} 95}
107 96
108#endif /* !defined(__ASSEMBLY__) */ 97#endif /* !defined(__ASSEMBLY__) */