diff options
| author | James Hogan <james.hogan@imgtec.com> | 2015-01-27 16:45:47 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-03-31 06:04:12 -0400 |
| commit | 19971c0bcb45f264c83cb2fd2bce50457bd17cc4 (patch) | |
| tree | e20a24ff0fc188c1478d7cccb6c098e2fe8ba714 /arch/mips/include | |
| parent | c9d6c8b0eba2421b9bf812919bece0b82d923689 (diff) | |
MIPS: cevt-r4k: Move handle_perf_irq() out of header
Long ago, commit 8531a35e5e27 ("[MIPS] SMTC: Fix SMTC dyntick support.")
moved handle_perf_irq() out of cevt-r4k.c into a header so it could be
shared with cevt-smtc.c.
Slightly less long ago, commit b633648c5ad3 ("MIPS: MT: Remove SMTC
support") removed all traces of SMTC support, including cevt-smtc.c,
leaving cevt-r4k.c once again the sole user of handle_perf_irq(),
therefore move it back into cevt-r4k.c from the header.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9123/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/cevt-r4k.h | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/mips/include/asm/cevt-r4k.h b/arch/mips/include/asm/cevt-r4k.h index 65f9bdd02f1f..f0edf6fcd002 100644 --- a/arch/mips/include/asm/cevt-r4k.h +++ b/arch/mips/include/asm/cevt-r4k.h | |||
| @@ -27,23 +27,4 @@ irqreturn_t c0_compare_interrupt(int, void *); | |||
| 27 | extern struct irqaction c0_compare_irqaction; | 27 | extern struct irqaction c0_compare_irqaction; |
| 28 | extern int cp0_timer_irq_installed; | 28 | extern int cp0_timer_irq_installed; |
| 29 | 29 | ||
| 30 | /* | ||
| 31 | * Possibly handle a performance counter interrupt. | ||
| 32 | * Return true if the timer interrupt should not be checked | ||
| 33 | */ | ||
| 34 | |||
| 35 | static inline int handle_perf_irq(int r2) | ||
| 36 | { | ||
| 37 | /* | ||
| 38 | * The performance counter overflow interrupt may be shared with the | ||
| 39 | * timer interrupt (cp0_perfcount_irq < 0). If it is and a | ||
| 40 | * performance counter has overflowed (perf_irq() == IRQ_HANDLED) | ||
| 41 | * and we can't reliably determine if a counter interrupt has also | ||
| 42 | * happened (!r2) then don't check for a timer interrupt. | ||
| 43 | */ | ||
| 44 | return (cp0_perfcount_irq < 0) && | ||
| 45 | perf_irq() == IRQ_HANDLED && | ||
| 46 | !r2; | ||
| 47 | } | ||
| 48 | |||
| 49 | #endif /* __ASM_CEVT_R4K_H */ | 30 | #endif /* __ASM_CEVT_R4K_H */ |
