diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2014-12-19 07:04:46 -0500 |
|---|---|---|
| committer | Markos Chandras <markos.chandras@imgtec.com> | 2015-02-17 10:37:21 -0500 |
| commit | 123e4b3bbc0afd3cb596ecbe165533b368529a8e (patch) | |
| tree | 23f0f7f44d5073fb84edd04c0dec25088962b579 /arch/mips/include | |
| parent | 94bfb75ace81f7b09860400ba02ed1607a2e0e27 (diff) | |
MIPS: Use the new "ZC" constraint for MIPS R6
GCC versions supporting MIPS R6 use the ZC constraint to enforce a
9-bit offset for MIPS R6. We will use that for all MIPS R6 LL/SC
instructions.
Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/compiler.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h index 34ad65a7801f..e081a265f422 100644 --- a/arch/mips/include/asm/compiler.h +++ b/arch/mips/include/asm/compiler.h | |||
| @@ -16,13 +16,18 @@ | |||
| 16 | #define GCC_REG_ACCUM "accum" | 16 | #define GCC_REG_ACCUM "accum" |
| 17 | #endif | 17 | #endif |
| 18 | 18 | ||
| 19 | #ifdef CONFIG_CPU_MIPSR6 | ||
| 20 | /* All MIPS R6 toolchains support the ZC constrain */ | ||
| 21 | #define GCC_OFF_SMALL_ASM() "ZC" | ||
| 22 | #else | ||
| 19 | #ifndef CONFIG_CPU_MICROMIPS | 23 | #ifndef CONFIG_CPU_MICROMIPS |
| 20 | #define GCC_OFF_SMALL_ASM() "R" | 24 | #define GCC_OFF_SMALL_ASM() "R" |
| 21 | #elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) | 25 | #elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) |
| 22 | #define GCC_OFF_SMALL_ASM() "ZC" | 26 | #define GCC_OFF_SMALL_ASM() "ZC" |
| 23 | #else | 27 | #else |
| 24 | #error "microMIPS compilation unsupported with GCC older than 4.9" | 28 | #error "microMIPS compilation unsupported with GCC older than 4.9" |
| 25 | #endif | 29 | #endif /* CONFIG_CPU_MICROMIPS */ |
| 30 | #endif /* CONFIG_CPU_MIPSR6 */ | ||
| 26 | 31 | ||
| 27 | #ifdef CONFIG_CPU_MIPSR6 | 32 | #ifdef CONFIG_CPU_MIPSR6 |
| 28 | #define MIPS_ISA_LEVEL "mips64r6" | 33 | #define MIPS_ISA_LEVEL "mips64r6" |
