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authorGabor Juhos <juhosg@openwrt.org>2012-08-04 11:03:56 -0400
committerJohn Crispin <blogic@openwrt.org>2012-08-28 06:29:57 -0400
commit00ffed582fe8a3f7556593c0e8baaf3da3df85b0 (patch)
tree88912fae450552a2d4c05d25137193c687b1b377 /arch/mips/include
parent8d3e03e186cb94a333d0176fe8b22a6df200fcc7 (diff)
MIPS: ath79: add USB platform setup code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4172/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/mach-ath79/ar71xx_regs.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index dde504477fac..3ccae12cc7b3 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -63,6 +63,8 @@
63 63
64#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) 64#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
65#define AR934X_WMAC_SIZE 0x20000 65#define AR934X_WMAC_SIZE 0x20000
66#define AR934X_EHCI_BASE 0x1b000000
67#define AR934X_EHCI_SIZE 0x200
66 68
67/* 69/*
68 * DDR_CTRL block 70 * DDR_CTRL block
@@ -288,6 +290,11 @@
288#define AR933X_RESET_USB_PHY BIT(4) 290#define AR933X_RESET_USB_PHY BIT(4)
289#define AR933X_RESET_USBSUS_OVERRIDE BIT(3) 291#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
290 292
293#define AR934X_RESET_USB_PHY_ANALOG BIT(11)
294#define AR934X_RESET_USB_HOST BIT(5)
295#define AR934X_RESET_USB_PHY BIT(4)
296#define AR934X_RESET_USBSUS_OVERRIDE BIT(3)
297
291#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) 298#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
292 299
293#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) 300#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)