diff options
| author | Kelvin Cheung <keguang.zhang@gmail.com> | 2012-06-20 15:05:32 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-23 08:57:04 -0400 |
| commit | 2fa36399e63c911134f28b6878aada9b395c4209 (patch) | |
| tree | 929290ba3e73119e79d8a5a3392c8a65e86f37a6 /arch/mips/include/asm | |
| parent | 28a33cbc24e4256c143dce96c7d93bf423229f92 (diff) | |
MIPS: Add CPU support for Loongson1B
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology
(ICT) and the Chinese Academy of Sciences (CAS), which implements the
MIPS32 release 2 instruction set.
[ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device
which also is why it identifies itself with the Legacy Vendor ID in the
PrID register. When applying the patch I shoveled some code around to
keep things in alphabetical order and avoid forward declarations.]
Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: To: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: wuzhangjin@gmail.com
Cc: zhzhl555@gmail.com
Cc: Kelvin Cheung <keguang.zhang@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3976/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 3 | ||||
| -rw-r--r-- | arch/mips/include/asm/module.h | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 95e40c1e8ed1..f21b7c04e95a 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h | |||
| @@ -197,6 +197,7 @@ | |||
| 197 | #define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */ | 197 | #define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */ |
| 198 | #define PRID_REV_VR4130 0x0080 | 198 | #define PRID_REV_VR4130 0x0080 |
| 199 | #define PRID_REV_34K_V1_0_2 0x0022 | 199 | #define PRID_REV_34K_V1_0_2 0x0022 |
| 200 | #define PRID_REV_LOONGSON1B 0x0020 | ||
| 200 | #define PRID_REV_LOONGSON2E 0x0002 | 201 | #define PRID_REV_LOONGSON2E 0x0002 |
| 201 | #define PRID_REV_LOONGSON2F 0x0003 | 202 | #define PRID_REV_LOONGSON2F 0x0003 |
| 202 | 203 | ||
| @@ -261,7 +262,7 @@ enum cpu_type_enum { | |||
| 261 | */ | 262 | */ |
| 262 | CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, | 263 | CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, |
| 263 | CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, | 264 | CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, |
| 264 | CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_M14KC, | 265 | CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC, |
| 265 | 266 | ||
| 266 | /* | 267 | /* |
| 267 | * MIPS64 class processors | 268 | * MIPS64 class processors |
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h index 530008048c62..7531ecd654d6 100644 --- a/arch/mips/include/asm/module.h +++ b/arch/mips/include/asm/module.h | |||
| @@ -117,6 +117,8 @@ search_module_dbetables(unsigned long addr) | |||
| 117 | #define MODULE_PROC_FAMILY "RM9000 " | 117 | #define MODULE_PROC_FAMILY "RM9000 " |
| 118 | #elif defined CONFIG_CPU_SB1 | 118 | #elif defined CONFIG_CPU_SB1 |
| 119 | #define MODULE_PROC_FAMILY "SB1 " | 119 | #define MODULE_PROC_FAMILY "SB1 " |
| 120 | #elif defined CONFIG_CPU_LOONGSON1 | ||
| 121 | #define MODULE_PROC_FAMILY "LOONGSON1 " | ||
| 120 | #elif defined CONFIG_CPU_LOONGSON2 | 122 | #elif defined CONFIG_CPU_LOONGSON2 |
| 121 | #define MODULE_PROC_FAMILY "LOONGSON2 " | 123 | #define MODULE_PROC_FAMILY "LOONGSON2 " |
| 122 | #elif defined CONFIG_CPU_CAVIUM_OCTEON | 124 | #elif defined CONFIG_CPU_CAVIUM_OCTEON |