diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-17 15:50:54 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-17 15:50:54 -0400 |
commit | bfaf245022b4b8661af2e35f467cf0e91943c24c (patch) | |
tree | b5a6ee49a047557a791eb897c8c9545a155e36b7 /arch/mips/include/asm/pgtable.h | |
parent | 96d928ed75c4ba4253e82910a697ec7b06ace8b4 (diff) | |
parent | 3e20a26b02bd4f24945c87407df51948dd488620 (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"This is the main pull request for MIPS for Linux 4.1. Most
noteworthy:
- Add more Octeon-optimized crypto functions
- Octeon crypto preemption and locking fixes
- Little endian support for Octeon
- Use correct CSR to soft reset Octeons
- Support LEDs on the Octeon-based DSR-1000N
- Fix PCI interrupt mapping for the Octeon-based DSR-1000N
- Mark prom_free_prom_memory() as __init for a number of systems
- Support for Imagination's Pistachio SOC. This includes arch and
CLK bits. I'd like to merge pinctrl bits later
- Improve parallelism of csum_partial for certain pipelines
- Organize DTB files in subdirs like other architectures
- Implement read_sched_clock for all MIPS platforms other than
Octeon
- Massive series of 38 fixes and cleanups for the FPU emulator /
kernel
- Further FPU remulator work to support new features. This sits on a
separate branch which also has been pulled into the 4.1 KVM branch
- Clean up and fixes for the SEAD3 eval board; remove unused file
- Various updates for Netlogic platforms
- A number of small updates for Loongson 3 platforms
- Increase the memory limit for ATH79 platforms to 256MB
- A fair number of fixes and updates for BCM47xx platforms
- Finish the implementation of XPA support
- MIPS FDC support. No, not floppy controller but Fast Debug Channel :)
- Detect the R16000 used in SGI legacy platforms
- Fix Kconfig dependencies for the SSB bus support"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (265 commits)
MIPS: Makefile: Fix MIPS ASE detection code
MIPS: asm: elf: Set O32 default FPU flags
MIPS: BCM47XX: Fix detecting Microsoft MN-700 & Asus WL500G
MIPS: Kconfig: Disable SMP/CPS for 64-bit
MIPS: Hibernate: flush TLB entries earlier
MIPS: smp-cps: cpu_set FPU mask if FPU present
MIPS: lose_fpu(): Disable FPU when MSA enabled
MIPS: ralink: add missing symbol for RALINK_ILL_ACC
MIPS: ralink: Fix bad config symbol in PCI makefile.
SSB: fix Kconfig dependencies
MIPS: Malta: Detect and fix bad memsize values
Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores."
MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.
MIPS: Fix cpu_has_mips_r2_exec_hazard.
MIPS: kernel: entry.S: Set correct ISA level for mips_ihb
MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case
MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes
MIPS: Kconfig: Fix typo for the r2-to-r6 emulator kernel parameter
MIPS: unaligned: Fix regular load/store instruction emulation for EVA
MIPS: unaligned: Surround load/store macros in do {} while statements
...
Diffstat (limited to 'arch/mips/include/asm/pgtable.h')
-rw-r--r-- | arch/mips/include/asm/pgtable.h | 83 |
1 files changed, 38 insertions, 45 deletions
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index bef782c4a44b..819af9d057a8 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h | |||
@@ -24,17 +24,17 @@ struct mm_struct; | |||
24 | struct vm_area_struct; | 24 | struct vm_area_struct; |
25 | 25 | ||
26 | #define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) | 26 | #define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) |
27 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \ | 27 | #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | _PAGE_READ | \ |
28 | _page_cachable_default) | 28 | _page_cachable_default) |
29 | #define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \ | 29 | #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_NO_EXEC | \ |
30 | (cpu_has_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default) | 30 | _page_cachable_default) |
31 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \ | 31 | #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | \ |
32 | _page_cachable_default) | 32 | _page_cachable_default) |
33 | #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ | 33 | #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ |
34 | _PAGE_GLOBAL | _page_cachable_default) | 34 | _PAGE_GLOBAL | _page_cachable_default) |
35 | #define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ | 35 | #define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \ |
36 | _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT) | 36 | _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT) |
37 | #define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \ | 37 | #define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ |
38 | _page_cachable_default) | 38 | _page_cachable_default) |
39 | #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ | 39 | #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \ |
40 | __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED) | 40 | __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED) |
@@ -127,13 +127,9 @@ do { \ | |||
127 | } \ | 127 | } \ |
128 | } while(0) | 128 | } while(0) |
129 | 129 | ||
130 | |||
131 | extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, | ||
132 | pte_t pteval); | ||
133 | |||
134 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) | 130 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) |
135 | 131 | ||
136 | #define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL)) | 132 | #define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL)) |
137 | #define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT) | 133 | #define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT) |
138 | 134 | ||
139 | static inline void set_pte(pte_t *ptep, pte_t pte) | 135 | static inline void set_pte(pte_t *ptep, pte_t pte) |
@@ -142,18 +138,17 @@ static inline void set_pte(pte_t *ptep, pte_t pte) | |||
142 | smp_wmb(); | 138 | smp_wmb(); |
143 | ptep->pte_low = pte.pte_low; | 139 | ptep->pte_low = pte.pte_low; |
144 | 140 | ||
145 | if (pte.pte_low & _PAGE_GLOBAL) { | 141 | if (pte.pte_high & _PAGE_GLOBAL) { |
146 | pte_t *buddy = ptep_buddy(ptep); | 142 | pte_t *buddy = ptep_buddy(ptep); |
147 | /* | 143 | /* |
148 | * Make sure the buddy is global too (if it's !none, | 144 | * Make sure the buddy is global too (if it's !none, |
149 | * it better already be global) | 145 | * it better already be global) |
150 | */ | 146 | */ |
151 | if (pte_none(*buddy)) { | 147 | if (pte_none(*buddy)) |
152 | buddy->pte_low |= _PAGE_GLOBAL; | ||
153 | buddy->pte_high |= _PAGE_GLOBAL; | 148 | buddy->pte_high |= _PAGE_GLOBAL; |
154 | } | ||
155 | } | 149 | } |
156 | } | 150 | } |
151 | #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) | ||
157 | 152 | ||
158 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | 153 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
159 | { | 154 | { |
@@ -161,8 +156,8 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt | |||
161 | 156 | ||
162 | htw_stop(); | 157 | htw_stop(); |
163 | /* Preserve global status for the pair */ | 158 | /* Preserve global status for the pair */ |
164 | if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL) | 159 | if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL) |
165 | null.pte_low = null.pte_high = _PAGE_GLOBAL; | 160 | null.pte_high = _PAGE_GLOBAL; |
166 | 161 | ||
167 | set_pte_at(mm, addr, ptep, null); | 162 | set_pte_at(mm, addr, ptep, null); |
168 | htw_start(); | 163 | htw_start(); |
@@ -192,6 +187,7 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) | |||
192 | } | 187 | } |
193 | #endif | 188 | #endif |
194 | } | 189 | } |
190 | #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) | ||
195 | 191 | ||
196 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | 192 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) |
197 | { | 193 | { |
@@ -242,21 +238,21 @@ static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; } | |||
242 | 238 | ||
243 | static inline pte_t pte_wrprotect(pte_t pte) | 239 | static inline pte_t pte_wrprotect(pte_t pte) |
244 | { | 240 | { |
245 | pte.pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); | 241 | pte.pte_low &= ~_PAGE_WRITE; |
246 | pte.pte_high &= ~_PAGE_SILENT_WRITE; | 242 | pte.pte_high &= ~_PAGE_SILENT_WRITE; |
247 | return pte; | 243 | return pte; |
248 | } | 244 | } |
249 | 245 | ||
250 | static inline pte_t pte_mkclean(pte_t pte) | 246 | static inline pte_t pte_mkclean(pte_t pte) |
251 | { | 247 | { |
252 | pte.pte_low &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE); | 248 | pte.pte_low &= ~_PAGE_MODIFIED; |
253 | pte.pte_high &= ~_PAGE_SILENT_WRITE; | 249 | pte.pte_high &= ~_PAGE_SILENT_WRITE; |
254 | return pte; | 250 | return pte; |
255 | } | 251 | } |
256 | 252 | ||
257 | static inline pte_t pte_mkold(pte_t pte) | 253 | static inline pte_t pte_mkold(pte_t pte) |
258 | { | 254 | { |
259 | pte.pte_low &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ); | 255 | pte.pte_low &= ~_PAGE_ACCESSED; |
260 | pte.pte_high &= ~_PAGE_SILENT_READ; | 256 | pte.pte_high &= ~_PAGE_SILENT_READ; |
261 | return pte; | 257 | return pte; |
262 | } | 258 | } |
@@ -264,30 +260,24 @@ static inline pte_t pte_mkold(pte_t pte) | |||
264 | static inline pte_t pte_mkwrite(pte_t pte) | 260 | static inline pte_t pte_mkwrite(pte_t pte) |
265 | { | 261 | { |
266 | pte.pte_low |= _PAGE_WRITE; | 262 | pte.pte_low |= _PAGE_WRITE; |
267 | if (pte.pte_low & _PAGE_MODIFIED) { | 263 | if (pte.pte_low & _PAGE_MODIFIED) |
268 | pte.pte_low |= _PAGE_SILENT_WRITE; | ||
269 | pte.pte_high |= _PAGE_SILENT_WRITE; | 264 | pte.pte_high |= _PAGE_SILENT_WRITE; |
270 | } | ||
271 | return pte; | 265 | return pte; |
272 | } | 266 | } |
273 | 267 | ||
274 | static inline pte_t pte_mkdirty(pte_t pte) | 268 | static inline pte_t pte_mkdirty(pte_t pte) |
275 | { | 269 | { |
276 | pte.pte_low |= _PAGE_MODIFIED; | 270 | pte.pte_low |= _PAGE_MODIFIED; |
277 | if (pte.pte_low & _PAGE_WRITE) { | 271 | if (pte.pte_low & _PAGE_WRITE) |
278 | pte.pte_low |= _PAGE_SILENT_WRITE; | ||
279 | pte.pte_high |= _PAGE_SILENT_WRITE; | 272 | pte.pte_high |= _PAGE_SILENT_WRITE; |
280 | } | ||
281 | return pte; | 273 | return pte; |
282 | } | 274 | } |
283 | 275 | ||
284 | static inline pte_t pte_mkyoung(pte_t pte) | 276 | static inline pte_t pte_mkyoung(pte_t pte) |
285 | { | 277 | { |
286 | pte.pte_low |= _PAGE_ACCESSED; | 278 | pte.pte_low |= _PAGE_ACCESSED; |
287 | if (pte.pte_low & _PAGE_READ) { | 279 | if (pte.pte_low & _PAGE_READ) |
288 | pte.pte_low |= _PAGE_SILENT_READ; | ||
289 | pte.pte_high |= _PAGE_SILENT_READ; | 280 | pte.pte_high |= _PAGE_SILENT_READ; |
290 | } | ||
291 | return pte; | 281 | return pte; |
292 | } | 282 | } |
293 | #else | 283 | #else |
@@ -332,13 +322,13 @@ static inline pte_t pte_mkdirty(pte_t pte) | |||
332 | static inline pte_t pte_mkyoung(pte_t pte) | 322 | static inline pte_t pte_mkyoung(pte_t pte) |
333 | { | 323 | { |
334 | pte_val(pte) |= _PAGE_ACCESSED; | 324 | pte_val(pte) |= _PAGE_ACCESSED; |
335 | if (cpu_has_rixi) { | 325 | #ifdef CONFIG_CPU_MIPSR2 |
336 | if (!(pte_val(pte) & _PAGE_NO_READ)) | 326 | if (!(pte_val(pte) & _PAGE_NO_READ)) |
337 | pte_val(pte) |= _PAGE_SILENT_READ; | 327 | pte_val(pte) |= _PAGE_SILENT_READ; |
338 | } else { | 328 | else |
339 | if (pte_val(pte) & _PAGE_READ) | 329 | #endif |
340 | pte_val(pte) |= _PAGE_SILENT_READ; | 330 | if (pte_val(pte) & _PAGE_READ) |
341 | } | 331 | pte_val(pte) |= _PAGE_SILENT_READ; |
342 | return pte; | 332 | return pte; |
343 | } | 333 | } |
344 | 334 | ||
@@ -391,10 +381,10 @@ static inline pgprot_t pgprot_writecombine(pgprot_t _prot) | |||
391 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) | 381 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) |
392 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | 382 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
393 | { | 383 | { |
394 | pte.pte_low &= _PAGE_CHG_MASK; | 384 | pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK); |
395 | pte.pte_high &= (_PFN_MASK | _CACHE_MASK); | 385 | pte.pte_high &= (_PFN_MASK | _CACHE_MASK); |
396 | pte.pte_low |= pgprot_val(newprot); | 386 | pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK; |
397 | pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK); | 387 | pte.pte_high |= pgprot_val(newprot) & ~_PFN_MASK; |
398 | return pte; | 388 | return pte; |
399 | } | 389 | } |
400 | #else | 390 | #else |
@@ -407,12 +397,15 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | |||
407 | 397 | ||
408 | extern void __update_tlb(struct vm_area_struct *vma, unsigned long address, | 398 | extern void __update_tlb(struct vm_area_struct *vma, unsigned long address, |
409 | pte_t pte); | 399 | pte_t pte); |
400 | extern void __update_cache(struct vm_area_struct *vma, unsigned long address, | ||
401 | pte_t pte); | ||
410 | 402 | ||
411 | static inline void update_mmu_cache(struct vm_area_struct *vma, | 403 | static inline void update_mmu_cache(struct vm_area_struct *vma, |
412 | unsigned long address, pte_t *ptep) | 404 | unsigned long address, pte_t *ptep) |
413 | { | 405 | { |
414 | pte_t pte = *ptep; | 406 | pte_t pte = *ptep; |
415 | __update_tlb(vma, address, pte); | 407 | __update_tlb(vma, address, pte); |
408 | __update_cache(vma, address, pte); | ||
416 | } | 409 | } |
417 | 410 | ||
418 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, | 411 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, |
@@ -534,13 +527,13 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd) | |||
534 | { | 527 | { |
535 | pmd_val(pmd) |= _PAGE_ACCESSED; | 528 | pmd_val(pmd) |= _PAGE_ACCESSED; |
536 | 529 | ||
537 | if (cpu_has_rixi) { | 530 | #ifdef CONFIG_CPU_MIPSR2 |
538 | if (!(pmd_val(pmd) & _PAGE_NO_READ)) | 531 | if (!(pmd_val(pmd) & _PAGE_NO_READ)) |
539 | pmd_val(pmd) |= _PAGE_SILENT_READ; | 532 | pmd_val(pmd) |= _PAGE_SILENT_READ; |
540 | } else { | 533 | else |
541 | if (pmd_val(pmd) & _PAGE_READ) | 534 | #endif |
542 | pmd_val(pmd) |= _PAGE_SILENT_READ; | 535 | if (pmd_val(pmd) & _PAGE_READ) |
543 | } | 536 | pmd_val(pmd) |= _PAGE_SILENT_READ; |
544 | 537 | ||
545 | return pmd; | 538 | return pmd; |
546 | } | 539 | } |