diff options
author | Chris Zankel <chris@zankel.net> | 2015-04-13 23:51:35 -0400 |
---|---|---|
committer | Chris Zankel <chris@zankel.net> | 2015-04-13 23:51:35 -0400 |
commit | 7ead5b7e4a3cf4a16579a8f164022345b93fe972 (patch) | |
tree | 0a9b9497f53d1593c9e2ac197b2e686ea74a9975 /arch/mips/include/asm/pgtable-bits.h | |
parent | 834a316eeebcb75316c0a7d9088fa638c52dc584 (diff) | |
parent | 39a8804455fb23f09157341d3ba7db6d7ae6ee76 (diff) |
Merge tag 'v4.0' into for_next
Linux 4.0
Diffstat (limited to 'arch/mips/include/asm/pgtable-bits.h')
-rw-r--r-- | arch/mips/include/asm/pgtable-bits.h | 92 |
1 files changed, 32 insertions, 60 deletions
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h index ca11f14f40a3..91747c282bb3 100644 --- a/arch/mips/include/asm/pgtable-bits.h +++ b/arch/mips/include/asm/pgtable-bits.h | |||
@@ -35,7 +35,7 @@ | |||
35 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) | 35 | #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) |
36 | 36 | ||
37 | /* | 37 | /* |
38 | * The following bits are directly used by the TLB hardware | 38 | * The following bits are implemented by the TLB hardware |
39 | */ | 39 | */ |
40 | #define _PAGE_GLOBAL_SHIFT 0 | 40 | #define _PAGE_GLOBAL_SHIFT 0 |
41 | #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) | 41 | #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) |
@@ -48,8 +48,6 @@ | |||
48 | 48 | ||
49 | /* | 49 | /* |
50 | * The following bits are implemented in software | 50 | * The following bits are implemented in software |
51 | * | ||
52 | * _PAGE_FILE semantics: set:pagecache unset:swap | ||
53 | */ | 51 | */ |
54 | #define _PAGE_PRESENT_SHIFT (_CACHE_SHIFT + 3) | 52 | #define _PAGE_PRESENT_SHIFT (_CACHE_SHIFT + 3) |
55 | #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) | 53 | #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) |
@@ -62,48 +60,40 @@ | |||
62 | #define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1) | 60 | #define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1) |
63 | #define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) | 61 | #define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) |
64 | 62 | ||
65 | #define _PAGE_SILENT_READ _PAGE_VALID | ||
66 | #define _PAGE_SILENT_WRITE _PAGE_DIRTY | ||
67 | #define _PAGE_FILE _PAGE_MODIFIED | ||
68 | |||
69 | #define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3) | 63 | #define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3) |
70 | 64 | ||
71 | #elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) | 65 | #elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) |
72 | 66 | ||
73 | /* | 67 | /* |
74 | * The following are implemented by software | 68 | * The following bits are implemented in software |
75 | * | ||
76 | * _PAGE_FILE semantics: set:pagecache unset:swap | ||
77 | */ | 69 | */ |
78 | #define _PAGE_PRESENT_SHIFT 0 | 70 | #define _PAGE_PRESENT_SHIFT (0) |
79 | #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) | 71 | #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) |
80 | #define _PAGE_READ_SHIFT 1 | 72 | #define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1) |
81 | #define _PAGE_READ (1 << _PAGE_READ_SHIFT) | 73 | #define _PAGE_READ (1 << _PAGE_READ_SHIFT) |
82 | #define _PAGE_WRITE_SHIFT 2 | 74 | #define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1) |
83 | #define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT) | 75 | #define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT) |
84 | #define _PAGE_ACCESSED_SHIFT 3 | 76 | #define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1) |
85 | #define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT) | 77 | #define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT) |
86 | #define _PAGE_MODIFIED_SHIFT 4 | 78 | #define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1) |
87 | #define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) | 79 | #define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) |
88 | #define _PAGE_FILE_SHIFT 4 | ||
89 | #define _PAGE_FILE (1 << _PAGE_FILE_SHIFT) | ||
90 | 80 | ||
91 | /* | 81 | /* |
92 | * And these are the hardware TLB bits | 82 | * The following bits are implemented by the TLB hardware |
93 | */ | 83 | */ |
94 | #define _PAGE_GLOBAL_SHIFT 8 | 84 | #define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 4) |
95 | #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) | 85 | #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) |
96 | #define _PAGE_VALID_SHIFT 9 | 86 | #define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1) |
97 | #define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) | 87 | #define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) |
98 | #define _PAGE_SILENT_READ (1 << _PAGE_VALID_SHIFT) /* synonym */ | 88 | #define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1) |
99 | #define _PAGE_DIRTY_SHIFT 10 | ||
100 | #define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT) | 89 | #define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT) |
101 | #define _PAGE_SILENT_WRITE (1 << _PAGE_DIRTY_SHIFT) | 90 | #define _CACHE_UNCACHED_SHIFT (_PAGE_DIRTY_SHIFT + 1) |
102 | #define _CACHE_UNCACHED_SHIFT 11 | ||
103 | #define _CACHE_UNCACHED (1 << _CACHE_UNCACHED_SHIFT) | 91 | #define _CACHE_UNCACHED (1 << _CACHE_UNCACHED_SHIFT) |
104 | #define _CACHE_MASK (1 << _CACHE_UNCACHED_SHIFT) | 92 | #define _CACHE_MASK _CACHE_UNCACHED |
93 | |||
94 | #define _PFN_SHIFT PAGE_SHIFT | ||
105 | 95 | ||
106 | #else /* 'Normal' r4K case */ | 96 | #else |
107 | /* | 97 | /* |
108 | * When using the RI/XI bit support, we have 13 bits of flags below | 98 | * When using the RI/XI bit support, we have 13 bits of flags below |
109 | * the physical address. The RI/XI bits are placed such that a SRL 5 | 99 | * the physical address. The RI/XI bits are placed such that a SRL 5 |
@@ -114,11 +104,8 @@ | |||
114 | 104 | ||
115 | /* | 105 | /* |
116 | * The following bits are implemented in software | 106 | * The following bits are implemented in software |
117 | * | ||
118 | * _PAGE_READ / _PAGE_READ_SHIFT should be unused if cpu_has_rixi. | ||
119 | * _PAGE_FILE semantics: set:pagecache unset:swap | ||
120 | */ | 107 | */ |
121 | #define _PAGE_PRESENT_SHIFT (0) | 108 | #define _PAGE_PRESENT_SHIFT 0 |
122 | #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) | 109 | #define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) |
123 | #define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1) | 110 | #define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1) |
124 | #define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; }) | 111 | #define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; }) |
@@ -128,22 +115,16 @@ | |||
128 | #define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT) | 115 | #define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT) |
129 | #define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1) | 116 | #define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1) |
130 | #define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) | 117 | #define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) |
131 | #define _PAGE_FILE (_PAGE_MODIFIED) | ||
132 | 118 | ||
133 | #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT | 119 | #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT |
134 | /* huge tlb page */ | 120 | /* huge tlb page */ |
135 | #define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1) | 121 | #define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1) |
136 | #define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT) | 122 | #define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT) |
137 | #else | ||
138 | #define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT) | ||
139 | #define _PAGE_HUGE ({BUG(); 1; }) /* Dummy value */ | ||
140 | #endif | ||
141 | |||
142 | #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT | ||
143 | /* huge tlb page */ | ||
144 | #define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT + 1) | 123 | #define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT + 1) |
145 | #define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT) | 124 | #define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT) |
146 | #else | 125 | #else |
126 | #define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT) | ||
127 | #define _PAGE_HUGE ({BUG(); 1; }) /* Dummy value */ | ||
147 | #define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT) | 128 | #define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT) |
148 | #define _PAGE_SPLITTING ({BUG(); 1; }) /* Dummy value */ | 129 | #define _PAGE_SPLITTING ({BUG(); 1; }) /* Dummy value */ |
149 | #endif | 130 | #endif |
@@ -158,17 +139,10 @@ | |||
158 | 139 | ||
159 | #define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1) | 140 | #define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1) |
160 | #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) | 141 | #define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) |
161 | |||
162 | #define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1) | 142 | #define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1) |
163 | #define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) | 143 | #define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) |
164 | /* synonym */ | ||
165 | #define _PAGE_SILENT_READ (_PAGE_VALID) | ||
166 | |||
167 | /* The MIPS dirty bit */ | ||
168 | #define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1) | 144 | #define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1) |
169 | #define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT) | 145 | #define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT) |
170 | #define _PAGE_SILENT_WRITE (_PAGE_DIRTY) | ||
171 | |||
172 | #define _CACHE_SHIFT (_PAGE_DIRTY_SHIFT + 1) | 146 | #define _CACHE_SHIFT (_PAGE_DIRTY_SHIFT + 1) |
173 | #define _CACHE_MASK (7 << _CACHE_SHIFT) | 147 | #define _CACHE_MASK (7 << _CACHE_SHIFT) |
174 | 148 | ||
@@ -176,9 +150,9 @@ | |||
176 | 150 | ||
177 | #endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */ | 151 | #endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */ |
178 | 152 | ||
179 | #ifndef _PFN_SHIFT | 153 | #define _PAGE_SILENT_READ _PAGE_VALID |
180 | #define _PFN_SHIFT PAGE_SHIFT | 154 | #define _PAGE_SILENT_WRITE _PAGE_DIRTY |
181 | #endif | 155 | |
182 | #define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1)) | 156 | #define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1)) |
183 | 157 | ||
184 | #ifndef _PAGE_NO_READ | 158 | #ifndef _PAGE_NO_READ |
@@ -188,9 +162,6 @@ | |||
188 | #ifndef _PAGE_NO_EXEC | 162 | #ifndef _PAGE_NO_EXEC |
189 | #define _PAGE_NO_EXEC ({BUG(); 0; }) | 163 | #define _PAGE_NO_EXEC ({BUG(); 0; }) |
190 | #endif | 164 | #endif |
191 | #ifndef _PAGE_GLOBAL_SHIFT | ||
192 | #define _PAGE_GLOBAL_SHIFT ilog2(_PAGE_GLOBAL) | ||
193 | #endif | ||
194 | 165 | ||
195 | 166 | ||
196 | #ifndef __ASSEMBLY__ | 167 | #ifndef __ASSEMBLY__ |
@@ -275,8 +246,9 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val) | |||
275 | #endif | 246 | #endif |
276 | 247 | ||
277 | #define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ)) | 248 | #define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ)) |
278 | #define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) | 249 | #define __WRITEABLE (_PAGE_SILENT_WRITE | _PAGE_WRITE | _PAGE_MODIFIED) |
279 | 250 | ||
280 | #define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK) | 251 | #define _PAGE_CHG_MASK (_PAGE_ACCESSED | _PAGE_MODIFIED | \ |
252 | _PFN_MASK | _CACHE_MASK) | ||
281 | 253 | ||
282 | #endif /* _ASM_PGTABLE_BITS_H */ | 254 | #endif /* _ASM_PGTABLE_BITS_H */ |