diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2011-03-25 15:38:51 -0400 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-29 08:48:06 -0400 |
| commit | 0c3263870f5f80cf7b6cb322bd8e708ce568d36b (patch) | |
| tree | b1e2ed41a6b9b10a16fdb290f6f54cb148ccaf1a /arch/mips/include/asm/octeon/octeon.h | |
| parent | a458465641bf61a00f4ca54da7265202a911f975 (diff) | |
MIPS: Octeon: Rewrite interrupt handling code.
This includes conversion to new style irq_chip functions, and
correctly enabling/disabling per-CPU interrupts.
The hardware interrupt bit to irq number mapping is now done with a
flexible map, instead of by bit twiddling the irq number.
[ tglx: Adjusted to new irq_cpu_on/offline callbacks and
__irq_set_affinity_lock ]
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org
LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/mips/include/asm/octeon/octeon.h')
| -rw-r--r-- | arch/mips/include/asm/octeon/octeon.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 6b34afd0d4e7..f72f768cd3a4 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h | |||
| @@ -257,4 +257,6 @@ extern struct cvmx_bootinfo *octeon_bootinfo; | |||
| 257 | 257 | ||
| 258 | extern uint64_t octeon_bootloader_entry_addr; | 258 | extern uint64_t octeon_bootloader_entry_addr; |
| 259 | 259 | ||
| 260 | extern void (*octeon_irq_setup_secondary)(void); | ||
| 261 | |||
| 260 | #endif /* __ASM_OCTEON_OCTEON_H */ | 262 | #endif /* __ASM_OCTEON_OCTEON_H */ |