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authorDavid Daney <david.daney@cavium.com>2012-04-03 16:44:18 -0400
committerDavid Daney <david.daney@cavium.com>2012-08-31 13:46:53 -0400
commitc5aa59e88fe415b1c44d389387ec1e26450e672c (patch)
tree196de0c85f72170f6280de322cfa4c482efb2e20 /arch/mips/include/asm/octeon/cvmx-rnm-defs.h
parent5cf02e5554a429268e53fd4a19806644de73a82f (diff)
MIPS: OCTEON: Update register definitions.
Add support for cn68xx, cn61xx, cn63xx, cn66xx and cnf71XX. Add little-endian register layouts. Patch cvmx-interrupt-rsl.c for changed definition. Signed-off-by: David Daney <david.daney@cavium.com>
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-rnm-defs.h')
-rw-r--r--arch/mips/include/asm/octeon/cvmx-rnm-defs.h107
1 files changed, 101 insertions, 6 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
index c45da1f35ea7..87d6f92a548a 100644
--- a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
@@ -4,7 +4,7 @@
4 * Contact: support@caviumnetworks.com 4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK 5 * This file is part of the OCTEON SDK
6 * 6 *
7 * Copyright (c) 2003-2010 Cavium Networks 7 * Copyright (c) 2003-2012 Cavium Networks
8 * 8 *
9 * This file is free software; you can redistribute it and/or modify 9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as 10 * it under the terms of the GNU General Public License, Version 2, as
@@ -28,8 +28,6 @@
28#ifndef __CVMX_RNM_DEFS_H__ 28#ifndef __CVMX_RNM_DEFS_H__
29#define __CVMX_RNM_DEFS_H__ 29#define __CVMX_RNM_DEFS_H__
30 30
31#include <linux/types.h>
32
33#define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull)) 31#define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull))
34#define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull)) 32#define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull))
35#define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull)) 33#define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull))
@@ -39,9 +37,15 @@
39union cvmx_rnm_bist_status { 37union cvmx_rnm_bist_status {
40 uint64_t u64; 38 uint64_t u64;
41 struct cvmx_rnm_bist_status_s { 39 struct cvmx_rnm_bist_status_s {
40#ifdef __BIG_ENDIAN_BITFIELD
42 uint64_t reserved_2_63:62; 41 uint64_t reserved_2_63:62;
43 uint64_t rrc:1; 42 uint64_t rrc:1;
44 uint64_t mem:1; 43 uint64_t mem:1;
44#else
45 uint64_t mem:1;
46 uint64_t rrc:1;
47 uint64_t reserved_2_63:62;
48#endif
45 } s; 49 } s;
46 struct cvmx_rnm_bist_status_s cn30xx; 50 struct cvmx_rnm_bist_status_s cn30xx;
47 struct cvmx_rnm_bist_status_s cn31xx; 51 struct cvmx_rnm_bist_status_s cn31xx;
@@ -54,14 +58,21 @@ union cvmx_rnm_bist_status {
54 struct cvmx_rnm_bist_status_s cn56xxp1; 58 struct cvmx_rnm_bist_status_s cn56xxp1;
55 struct cvmx_rnm_bist_status_s cn58xx; 59 struct cvmx_rnm_bist_status_s cn58xx;
56 struct cvmx_rnm_bist_status_s cn58xxp1; 60 struct cvmx_rnm_bist_status_s cn58xxp1;
61 struct cvmx_rnm_bist_status_s cn61xx;
57 struct cvmx_rnm_bist_status_s cn63xx; 62 struct cvmx_rnm_bist_status_s cn63xx;
58 struct cvmx_rnm_bist_status_s cn63xxp1; 63 struct cvmx_rnm_bist_status_s cn63xxp1;
64 struct cvmx_rnm_bist_status_s cn66xx;
65 struct cvmx_rnm_bist_status_s cn68xx;
66 struct cvmx_rnm_bist_status_s cn68xxp1;
67 struct cvmx_rnm_bist_status_s cnf71xx;
59}; 68};
60 69
61union cvmx_rnm_ctl_status { 70union cvmx_rnm_ctl_status {
62 uint64_t u64; 71 uint64_t u64;
63 struct cvmx_rnm_ctl_status_s { 72 struct cvmx_rnm_ctl_status_s {
64 uint64_t reserved_11_63:53; 73#ifdef __BIG_ENDIAN_BITFIELD
74 uint64_t reserved_12_63:52;
75 uint64_t dis_mak:1;
65 uint64_t eer_lck:1; 76 uint64_t eer_lck:1;
66 uint64_t eer_val:1; 77 uint64_t eer_val:1;
67 uint64_t ent_sel:4; 78 uint64_t ent_sel:4;
@@ -70,18 +81,39 @@ union cvmx_rnm_ctl_status {
70 uint64_t rnm_rst:1; 81 uint64_t rnm_rst:1;
71 uint64_t rng_en:1; 82 uint64_t rng_en:1;
72 uint64_t ent_en:1; 83 uint64_t ent_en:1;
84#else
85 uint64_t ent_en:1;
86 uint64_t rng_en:1;
87 uint64_t rnm_rst:1;
88 uint64_t rng_rst:1;
89 uint64_t exp_ent:1;
90 uint64_t ent_sel:4;
91 uint64_t eer_val:1;
92 uint64_t eer_lck:1;
93 uint64_t dis_mak:1;
94 uint64_t reserved_12_63:52;
95#endif
73 } s; 96 } s;
74 struct cvmx_rnm_ctl_status_cn30xx { 97 struct cvmx_rnm_ctl_status_cn30xx {
98#ifdef __BIG_ENDIAN_BITFIELD
75 uint64_t reserved_4_63:60; 99 uint64_t reserved_4_63:60;
76 uint64_t rng_rst:1; 100 uint64_t rng_rst:1;
77 uint64_t rnm_rst:1; 101 uint64_t rnm_rst:1;
78 uint64_t rng_en:1; 102 uint64_t rng_en:1;
79 uint64_t ent_en:1; 103 uint64_t ent_en:1;
104#else
105 uint64_t ent_en:1;
106 uint64_t rng_en:1;
107 uint64_t rnm_rst:1;
108 uint64_t rng_rst:1;
109 uint64_t reserved_4_63:60;
110#endif
80 } cn30xx; 111 } cn30xx;
81 struct cvmx_rnm_ctl_status_cn30xx cn31xx; 112 struct cvmx_rnm_ctl_status_cn30xx cn31xx;
82 struct cvmx_rnm_ctl_status_cn30xx cn38xx; 113 struct cvmx_rnm_ctl_status_cn30xx cn38xx;
83 struct cvmx_rnm_ctl_status_cn30xx cn38xxp2; 114 struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
84 struct cvmx_rnm_ctl_status_cn50xx { 115 struct cvmx_rnm_ctl_status_cn50xx {
116#ifdef __BIG_ENDIAN_BITFIELD
85 uint64_t reserved_9_63:55; 117 uint64_t reserved_9_63:55;
86 uint64_t ent_sel:4; 118 uint64_t ent_sel:4;
87 uint64_t exp_ent:1; 119 uint64_t exp_ent:1;
@@ -89,6 +121,15 @@ union cvmx_rnm_ctl_status {
89 uint64_t rnm_rst:1; 121 uint64_t rnm_rst:1;
90 uint64_t rng_en:1; 122 uint64_t rng_en:1;
91 uint64_t ent_en:1; 123 uint64_t ent_en:1;
124#else
125 uint64_t ent_en:1;
126 uint64_t rng_en:1;
127 uint64_t rnm_rst:1;
128 uint64_t rng_rst:1;
129 uint64_t exp_ent:1;
130 uint64_t ent_sel:4;
131 uint64_t reserved_9_63:55;
132#endif
92 } cn50xx; 133 } cn50xx;
93 struct cvmx_rnm_ctl_status_cn50xx cn52xx; 134 struct cvmx_rnm_ctl_status_cn50xx cn52xx;
94 struct cvmx_rnm_ctl_status_cn50xx cn52xxp1; 135 struct cvmx_rnm_ctl_status_cn50xx cn52xxp1;
@@ -96,34 +137,88 @@ union cvmx_rnm_ctl_status {
96 struct cvmx_rnm_ctl_status_cn50xx cn56xxp1; 137 struct cvmx_rnm_ctl_status_cn50xx cn56xxp1;
97 struct cvmx_rnm_ctl_status_cn50xx cn58xx; 138 struct cvmx_rnm_ctl_status_cn50xx cn58xx;
98 struct cvmx_rnm_ctl_status_cn50xx cn58xxp1; 139 struct cvmx_rnm_ctl_status_cn50xx cn58xxp1;
99 struct cvmx_rnm_ctl_status_s cn63xx; 140 struct cvmx_rnm_ctl_status_s cn61xx;
100 struct cvmx_rnm_ctl_status_s cn63xxp1; 141 struct cvmx_rnm_ctl_status_cn63xx {
142#ifdef __BIG_ENDIAN_BITFIELD
143 uint64_t reserved_11_63:53;
144 uint64_t eer_lck:1;
145 uint64_t eer_val:1;
146 uint64_t ent_sel:4;
147 uint64_t exp_ent:1;
148 uint64_t rng_rst:1;
149 uint64_t rnm_rst:1;
150 uint64_t rng_en:1;
151 uint64_t ent_en:1;
152#else
153 uint64_t ent_en:1;
154 uint64_t rng_en:1;
155 uint64_t rnm_rst:1;
156 uint64_t rng_rst:1;
157 uint64_t exp_ent:1;
158 uint64_t ent_sel:4;
159 uint64_t eer_val:1;
160 uint64_t eer_lck:1;
161 uint64_t reserved_11_63:53;
162#endif
163 } cn63xx;
164 struct cvmx_rnm_ctl_status_cn63xx cn63xxp1;
165 struct cvmx_rnm_ctl_status_s cn66xx;
166 struct cvmx_rnm_ctl_status_cn63xx cn68xx;
167 struct cvmx_rnm_ctl_status_cn63xx cn68xxp1;
168 struct cvmx_rnm_ctl_status_s cnf71xx;
101}; 169};
102 170
103union cvmx_rnm_eer_dbg { 171union cvmx_rnm_eer_dbg {
104 uint64_t u64; 172 uint64_t u64;
105 struct cvmx_rnm_eer_dbg_s { 173 struct cvmx_rnm_eer_dbg_s {
174#ifdef __BIG_ENDIAN_BITFIELD
106 uint64_t dat:64; 175 uint64_t dat:64;
176#else
177 uint64_t dat:64;
178#endif
107 } s; 179 } s;
180 struct cvmx_rnm_eer_dbg_s cn61xx;
108 struct cvmx_rnm_eer_dbg_s cn63xx; 181 struct cvmx_rnm_eer_dbg_s cn63xx;
109 struct cvmx_rnm_eer_dbg_s cn63xxp1; 182 struct cvmx_rnm_eer_dbg_s cn63xxp1;
183 struct cvmx_rnm_eer_dbg_s cn66xx;
184 struct cvmx_rnm_eer_dbg_s cn68xx;
185 struct cvmx_rnm_eer_dbg_s cn68xxp1;
186 struct cvmx_rnm_eer_dbg_s cnf71xx;
110}; 187};
111 188
112union cvmx_rnm_eer_key { 189union cvmx_rnm_eer_key {
113 uint64_t u64; 190 uint64_t u64;
114 struct cvmx_rnm_eer_key_s { 191 struct cvmx_rnm_eer_key_s {
192#ifdef __BIG_ENDIAN_BITFIELD
193 uint64_t key:64;
194#else
115 uint64_t key:64; 195 uint64_t key:64;
196#endif
116 } s; 197 } s;
198 struct cvmx_rnm_eer_key_s cn61xx;
117 struct cvmx_rnm_eer_key_s cn63xx; 199 struct cvmx_rnm_eer_key_s cn63xx;
118 struct cvmx_rnm_eer_key_s cn63xxp1; 200 struct cvmx_rnm_eer_key_s cn63xxp1;
201 struct cvmx_rnm_eer_key_s cn66xx;
202 struct cvmx_rnm_eer_key_s cn68xx;
203 struct cvmx_rnm_eer_key_s cn68xxp1;
204 struct cvmx_rnm_eer_key_s cnf71xx;
119}; 205};
120 206
121union cvmx_rnm_serial_num { 207union cvmx_rnm_serial_num {
122 uint64_t u64; 208 uint64_t u64;
123 struct cvmx_rnm_serial_num_s { 209 struct cvmx_rnm_serial_num_s {
210#ifdef __BIG_ENDIAN_BITFIELD
211 uint64_t dat:64;
212#else
124 uint64_t dat:64; 213 uint64_t dat:64;
214#endif
125 } s; 215 } s;
216 struct cvmx_rnm_serial_num_s cn61xx;
126 struct cvmx_rnm_serial_num_s cn63xx; 217 struct cvmx_rnm_serial_num_s cn63xx;
218 struct cvmx_rnm_serial_num_s cn66xx;
219 struct cvmx_rnm_serial_num_s cn68xx;
220 struct cvmx_rnm_serial_num_s cn68xxp1;
221 struct cvmx_rnm_serial_num_s cnf71xx;
127}; 222};
128 223
129#endif 224#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-10 19:36:13 -0400