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authorDavid Daney <david.daney@cavium.com>2012-04-03 16:44:18 -0400
committerDavid Daney <david.daney@cavium.com>2012-08-31 13:46:53 -0400
commitc5aa59e88fe415b1c44d389387ec1e26450e672c (patch)
tree196de0c85f72170f6280de322cfa4c482efb2e20 /arch/mips/include/asm/octeon/cvmx-mio-defs.h
parent5cf02e5554a429268e53fd4a19806644de73a82f (diff)
MIPS: OCTEON: Update register definitions.
Add support for cn68xx, cn61xx, cn63xx, cn66xx and cnf71XX. Add little-endian register layouts. Patch cvmx-interrupt-rsl.c for changed definition. Signed-off-by: David Daney <david.daney@cavium.com>
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-mio-defs.h')
-rw-r--r--arch/mips/include/asm/octeon/cvmx-mio-defs.h1889
1 files changed, 1885 insertions, 4 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-mio-defs.h b/arch/mips/include/asm/octeon/cvmx-mio-defs.h
index b1774126736d..bb0ae338a460 100644
--- a/arch/mips/include/asm/octeon/cvmx-mio-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-mio-defs.h
@@ -4,7 +4,7 @@
4 * Contact: support@caviumnetworks.com 4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK 5 * This file is part of the OCTEON SDK
6 * 6 *
7 * Copyright (c) 2003-2010 Cavium Networks 7 * Copyright (c) 2003-2012 Cavium Networks
8 * 8 *
9 * This file is free software; you can redistribute it and/or modify 9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as 10 * it under the terms of the GNU General Public License, Version 2, as
@@ -94,6 +94,7 @@
94#define CVMX_MIO_PTP_CLOCK_HI (CVMX_ADD_IO_SEG(0x0001070000000F10ull)) 94#define CVMX_MIO_PTP_CLOCK_HI (CVMX_ADD_IO_SEG(0x0001070000000F10ull))
95#define CVMX_MIO_PTP_CLOCK_LO (CVMX_ADD_IO_SEG(0x0001070000000F08ull)) 95#define CVMX_MIO_PTP_CLOCK_LO (CVMX_ADD_IO_SEG(0x0001070000000F08ull))
96#define CVMX_MIO_PTP_EVT_CNT (CVMX_ADD_IO_SEG(0x0001070000000F28ull)) 96#define CVMX_MIO_PTP_EVT_CNT (CVMX_ADD_IO_SEG(0x0001070000000F28ull))
97#define CVMX_MIO_PTP_PHY_1PPS_IN (CVMX_ADD_IO_SEG(0x0001070000000F70ull))
97#define CVMX_MIO_PTP_PPS_HI_INCR (CVMX_ADD_IO_SEG(0x0001070000000F60ull)) 98#define CVMX_MIO_PTP_PPS_HI_INCR (CVMX_ADD_IO_SEG(0x0001070000000F60ull))
98#define CVMX_MIO_PTP_PPS_LO_INCR (CVMX_ADD_IO_SEG(0x0001070000000F68ull)) 99#define CVMX_MIO_PTP_PPS_LO_INCR (CVMX_ADD_IO_SEG(0x0001070000000F68ull))
99#define CVMX_MIO_PTP_PPS_THRESH_HI (CVMX_ADD_IO_SEG(0x0001070000000F58ull)) 100#define CVMX_MIO_PTP_PPS_THRESH_HI (CVMX_ADD_IO_SEG(0x0001070000000F58ull))
@@ -166,24 +167,44 @@
166union cvmx_mio_boot_bist_stat { 167union cvmx_mio_boot_bist_stat {
167 uint64_t u64; 168 uint64_t u64;
168 struct cvmx_mio_boot_bist_stat_s { 169 struct cvmx_mio_boot_bist_stat_s {
170#ifdef __BIG_ENDIAN_BITFIELD
169 uint64_t reserved_0_63:64; 171 uint64_t reserved_0_63:64;
172#else
173 uint64_t reserved_0_63:64;
174#endif
170 } s; 175 } s;
171 struct cvmx_mio_boot_bist_stat_cn30xx { 176 struct cvmx_mio_boot_bist_stat_cn30xx {
177#ifdef __BIG_ENDIAN_BITFIELD
172 uint64_t reserved_4_63:60; 178 uint64_t reserved_4_63:60;
173 uint64_t ncbo_1:1; 179 uint64_t ncbo_1:1;
174 uint64_t ncbo_0:1; 180 uint64_t ncbo_0:1;
175 uint64_t loc:1; 181 uint64_t loc:1;
176 uint64_t ncbi:1; 182 uint64_t ncbi:1;
183#else
184 uint64_t ncbi:1;
185 uint64_t loc:1;
186 uint64_t ncbo_0:1;
187 uint64_t ncbo_1:1;
188 uint64_t reserved_4_63:60;
189#endif
177 } cn30xx; 190 } cn30xx;
178 struct cvmx_mio_boot_bist_stat_cn30xx cn31xx; 191 struct cvmx_mio_boot_bist_stat_cn30xx cn31xx;
179 struct cvmx_mio_boot_bist_stat_cn38xx { 192 struct cvmx_mio_boot_bist_stat_cn38xx {
193#ifdef __BIG_ENDIAN_BITFIELD
180 uint64_t reserved_3_63:61; 194 uint64_t reserved_3_63:61;
181 uint64_t ncbo_0:1; 195 uint64_t ncbo_0:1;
182 uint64_t loc:1; 196 uint64_t loc:1;
183 uint64_t ncbi:1; 197 uint64_t ncbi:1;
198#else
199 uint64_t ncbi:1;
200 uint64_t loc:1;
201 uint64_t ncbo_0:1;
202 uint64_t reserved_3_63:61;
203#endif
184 } cn38xx; 204 } cn38xx;
185 struct cvmx_mio_boot_bist_stat_cn38xx cn38xxp2; 205 struct cvmx_mio_boot_bist_stat_cn38xx cn38xxp2;
186 struct cvmx_mio_boot_bist_stat_cn50xx { 206 struct cvmx_mio_boot_bist_stat_cn50xx {
207#ifdef __BIG_ENDIAN_BITFIELD
187 uint64_t reserved_6_63:58; 208 uint64_t reserved_6_63:58;
188 uint64_t pcm_1:1; 209 uint64_t pcm_1:1;
189 uint64_t pcm_0:1; 210 uint64_t pcm_0:1;
@@ -191,72 +212,132 @@ union cvmx_mio_boot_bist_stat {
191 uint64_t ncbo_0:1; 212 uint64_t ncbo_0:1;
192 uint64_t loc:1; 213 uint64_t loc:1;
193 uint64_t ncbi:1; 214 uint64_t ncbi:1;
215#else
216 uint64_t ncbi:1;
217 uint64_t loc:1;
218 uint64_t ncbo_0:1;
219 uint64_t ncbo_1:1;
220 uint64_t pcm_0:1;
221 uint64_t pcm_1:1;
222 uint64_t reserved_6_63:58;
223#endif
194 } cn50xx; 224 } cn50xx;
195 struct cvmx_mio_boot_bist_stat_cn52xx { 225 struct cvmx_mio_boot_bist_stat_cn52xx {
226#ifdef __BIG_ENDIAN_BITFIELD
196 uint64_t reserved_6_63:58; 227 uint64_t reserved_6_63:58;
197 uint64_t ndf:2; 228 uint64_t ndf:2;
198 uint64_t ncbo_0:1; 229 uint64_t ncbo_0:1;
199 uint64_t dma:1; 230 uint64_t dma:1;
200 uint64_t loc:1; 231 uint64_t loc:1;
201 uint64_t ncbi:1; 232 uint64_t ncbi:1;
233#else
234 uint64_t ncbi:1;
235 uint64_t loc:1;
236 uint64_t dma:1;
237 uint64_t ncbo_0:1;
238 uint64_t ndf:2;
239 uint64_t reserved_6_63:58;
240#endif
202 } cn52xx; 241 } cn52xx;
203 struct cvmx_mio_boot_bist_stat_cn52xxp1 { 242 struct cvmx_mio_boot_bist_stat_cn52xxp1 {
243#ifdef __BIG_ENDIAN_BITFIELD
204 uint64_t reserved_4_63:60; 244 uint64_t reserved_4_63:60;
205 uint64_t ncbo_0:1; 245 uint64_t ncbo_0:1;
206 uint64_t dma:1; 246 uint64_t dma:1;
207 uint64_t loc:1; 247 uint64_t loc:1;
208 uint64_t ncbi:1; 248 uint64_t ncbi:1;
249#else
250 uint64_t ncbi:1;
251 uint64_t loc:1;
252 uint64_t dma:1;
253 uint64_t ncbo_0:1;
254 uint64_t reserved_4_63:60;
255#endif
209 } cn52xxp1; 256 } cn52xxp1;
210 struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xx; 257 struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xx;
211 struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xxp1; 258 struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xxp1;
212 struct cvmx_mio_boot_bist_stat_cn38xx cn58xx; 259 struct cvmx_mio_boot_bist_stat_cn38xx cn58xx;
213 struct cvmx_mio_boot_bist_stat_cn38xx cn58xxp1; 260 struct cvmx_mio_boot_bist_stat_cn38xx cn58xxp1;
214 struct cvmx_mio_boot_bist_stat_cn61xx { 261 struct cvmx_mio_boot_bist_stat_cn61xx {
262#ifdef __BIG_ENDIAN_BITFIELD
215 uint64_t reserved_12_63:52; 263 uint64_t reserved_12_63:52;
216 uint64_t stat:12; 264 uint64_t stat:12;
265#else
266 uint64_t stat:12;
267 uint64_t reserved_12_63:52;
268#endif
217 } cn61xx; 269 } cn61xx;
218 struct cvmx_mio_boot_bist_stat_cn63xx { 270 struct cvmx_mio_boot_bist_stat_cn63xx {
271#ifdef __BIG_ENDIAN_BITFIELD
219 uint64_t reserved_9_63:55; 272 uint64_t reserved_9_63:55;
220 uint64_t stat:9; 273 uint64_t stat:9;
274#else
275 uint64_t stat:9;
276 uint64_t reserved_9_63:55;
277#endif
221 } cn63xx; 278 } cn63xx;
222 struct cvmx_mio_boot_bist_stat_cn63xx cn63xxp1; 279 struct cvmx_mio_boot_bist_stat_cn63xx cn63xxp1;
223 struct cvmx_mio_boot_bist_stat_cn66xx { 280 struct cvmx_mio_boot_bist_stat_cn66xx {
281#ifdef __BIG_ENDIAN_BITFIELD
224 uint64_t reserved_10_63:54; 282 uint64_t reserved_10_63:54;
225 uint64_t stat:10; 283 uint64_t stat:10;
284#else
285 uint64_t stat:10;
286 uint64_t reserved_10_63:54;
287#endif
226 } cn66xx; 288 } cn66xx;
227 struct cvmx_mio_boot_bist_stat_cn66xx cn68xx; 289 struct cvmx_mio_boot_bist_stat_cn66xx cn68xx;
228 struct cvmx_mio_boot_bist_stat_cn66xx cn68xxp1; 290 struct cvmx_mio_boot_bist_stat_cn66xx cn68xxp1;
291 struct cvmx_mio_boot_bist_stat_cn61xx cnf71xx;
229}; 292};
230 293
231union cvmx_mio_boot_comp { 294union cvmx_mio_boot_comp {
232 uint64_t u64; 295 uint64_t u64;
233 struct cvmx_mio_boot_comp_s { 296 struct cvmx_mio_boot_comp_s {
297#ifdef __BIG_ENDIAN_BITFIELD
234 uint64_t reserved_0_63:64; 298 uint64_t reserved_0_63:64;
299#else
300 uint64_t reserved_0_63:64;
301#endif
235 } s; 302 } s;
236 struct cvmx_mio_boot_comp_cn50xx { 303 struct cvmx_mio_boot_comp_cn50xx {
304#ifdef __BIG_ENDIAN_BITFIELD
237 uint64_t reserved_10_63:54; 305 uint64_t reserved_10_63:54;
238 uint64_t pctl:5; 306 uint64_t pctl:5;
239 uint64_t nctl:5; 307 uint64_t nctl:5;
308#else
309 uint64_t nctl:5;
310 uint64_t pctl:5;
311 uint64_t reserved_10_63:54;
312#endif
240 } cn50xx; 313 } cn50xx;
241 struct cvmx_mio_boot_comp_cn50xx cn52xx; 314 struct cvmx_mio_boot_comp_cn50xx cn52xx;
242 struct cvmx_mio_boot_comp_cn50xx cn52xxp1; 315 struct cvmx_mio_boot_comp_cn50xx cn52xxp1;
243 struct cvmx_mio_boot_comp_cn50xx cn56xx; 316 struct cvmx_mio_boot_comp_cn50xx cn56xx;
244 struct cvmx_mio_boot_comp_cn50xx cn56xxp1; 317 struct cvmx_mio_boot_comp_cn50xx cn56xxp1;
245 struct cvmx_mio_boot_comp_cn61xx { 318 struct cvmx_mio_boot_comp_cn61xx {
319#ifdef __BIG_ENDIAN_BITFIELD
246 uint64_t reserved_12_63:52; 320 uint64_t reserved_12_63:52;
247 uint64_t pctl:6; 321 uint64_t pctl:6;
248 uint64_t nctl:6; 322 uint64_t nctl:6;
323#else
324 uint64_t nctl:6;
325 uint64_t pctl:6;
326 uint64_t reserved_12_63:52;
327#endif
249 } cn61xx; 328 } cn61xx;
250 struct cvmx_mio_boot_comp_cn61xx cn63xx; 329 struct cvmx_mio_boot_comp_cn61xx cn63xx;
251 struct cvmx_mio_boot_comp_cn61xx cn63xxp1; 330 struct cvmx_mio_boot_comp_cn61xx cn63xxp1;
252 struct cvmx_mio_boot_comp_cn61xx cn66xx; 331 struct cvmx_mio_boot_comp_cn61xx cn66xx;
253 struct cvmx_mio_boot_comp_cn61xx cn68xx; 332 struct cvmx_mio_boot_comp_cn61xx cn68xx;
254 struct cvmx_mio_boot_comp_cn61xx cn68xxp1; 333 struct cvmx_mio_boot_comp_cn61xx cn68xxp1;
334 struct cvmx_mio_boot_comp_cn61xx cnf71xx;
255}; 335};
256 336
257union cvmx_mio_boot_dma_cfgx { 337union cvmx_mio_boot_dma_cfgx {
258 uint64_t u64; 338 uint64_t u64;
259 struct cvmx_mio_boot_dma_cfgx_s { 339 struct cvmx_mio_boot_dma_cfgx_s {
340#ifdef __BIG_ENDIAN_BITFIELD
260 uint64_t en:1; 341 uint64_t en:1;
261 uint64_t rw:1; 342 uint64_t rw:1;
262 uint64_t clr:1; 343 uint64_t clr:1;
@@ -267,6 +348,18 @@ union cvmx_mio_boot_dma_cfgx {
267 uint64_t endian:1; 348 uint64_t endian:1;
268 uint64_t size:20; 349 uint64_t size:20;
269 uint64_t adr:36; 350 uint64_t adr:36;
351#else
352 uint64_t adr:36;
353 uint64_t size:20;
354 uint64_t endian:1;
355 uint64_t swap8:1;
356 uint64_t swap16:1;
357 uint64_t swap32:1;
358 uint64_t reserved_60_60:1;
359 uint64_t clr:1;
360 uint64_t rw:1;
361 uint64_t en:1;
362#endif
270 } s; 363 } s;
271 struct cvmx_mio_boot_dma_cfgx_s cn52xx; 364 struct cvmx_mio_boot_dma_cfgx_s cn52xx;
272 struct cvmx_mio_boot_dma_cfgx_s cn52xxp1; 365 struct cvmx_mio_boot_dma_cfgx_s cn52xxp1;
@@ -278,14 +371,21 @@ union cvmx_mio_boot_dma_cfgx {
278 struct cvmx_mio_boot_dma_cfgx_s cn66xx; 371 struct cvmx_mio_boot_dma_cfgx_s cn66xx;
279 struct cvmx_mio_boot_dma_cfgx_s cn68xx; 372 struct cvmx_mio_boot_dma_cfgx_s cn68xx;
280 struct cvmx_mio_boot_dma_cfgx_s cn68xxp1; 373 struct cvmx_mio_boot_dma_cfgx_s cn68xxp1;
374 struct cvmx_mio_boot_dma_cfgx_s cnf71xx;
281}; 375};
282 376
283union cvmx_mio_boot_dma_intx { 377union cvmx_mio_boot_dma_intx {
284 uint64_t u64; 378 uint64_t u64;
285 struct cvmx_mio_boot_dma_intx_s { 379 struct cvmx_mio_boot_dma_intx_s {
380#ifdef __BIG_ENDIAN_BITFIELD
286 uint64_t reserved_2_63:62; 381 uint64_t reserved_2_63:62;
287 uint64_t dmarq:1; 382 uint64_t dmarq:1;
288 uint64_t done:1; 383 uint64_t done:1;
384#else
385 uint64_t done:1;
386 uint64_t dmarq:1;
387 uint64_t reserved_2_63:62;
388#endif
289 } s; 389 } s;
290 struct cvmx_mio_boot_dma_intx_s cn52xx; 390 struct cvmx_mio_boot_dma_intx_s cn52xx;
291 struct cvmx_mio_boot_dma_intx_s cn52xxp1; 391 struct cvmx_mio_boot_dma_intx_s cn52xxp1;
@@ -297,14 +397,21 @@ union cvmx_mio_boot_dma_intx {
297 struct cvmx_mio_boot_dma_intx_s cn66xx; 397 struct cvmx_mio_boot_dma_intx_s cn66xx;
298 struct cvmx_mio_boot_dma_intx_s cn68xx; 398 struct cvmx_mio_boot_dma_intx_s cn68xx;
299 struct cvmx_mio_boot_dma_intx_s cn68xxp1; 399 struct cvmx_mio_boot_dma_intx_s cn68xxp1;
400 struct cvmx_mio_boot_dma_intx_s cnf71xx;
300}; 401};
301 402
302union cvmx_mio_boot_dma_int_enx { 403union cvmx_mio_boot_dma_int_enx {
303 uint64_t u64; 404 uint64_t u64;
304 struct cvmx_mio_boot_dma_int_enx_s { 405 struct cvmx_mio_boot_dma_int_enx_s {
406#ifdef __BIG_ENDIAN_BITFIELD
305 uint64_t reserved_2_63:62; 407 uint64_t reserved_2_63:62;
306 uint64_t dmarq:1; 408 uint64_t dmarq:1;
307 uint64_t done:1; 409 uint64_t done:1;
410#else
411 uint64_t done:1;
412 uint64_t dmarq:1;
413 uint64_t reserved_2_63:62;
414#endif
308 } s; 415 } s;
309 struct cvmx_mio_boot_dma_int_enx_s cn52xx; 416 struct cvmx_mio_boot_dma_int_enx_s cn52xx;
310 struct cvmx_mio_boot_dma_int_enx_s cn52xxp1; 417 struct cvmx_mio_boot_dma_int_enx_s cn52xxp1;
@@ -316,11 +423,13 @@ union cvmx_mio_boot_dma_int_enx {
316 struct cvmx_mio_boot_dma_int_enx_s cn66xx; 423 struct cvmx_mio_boot_dma_int_enx_s cn66xx;
317 struct cvmx_mio_boot_dma_int_enx_s cn68xx; 424 struct cvmx_mio_boot_dma_int_enx_s cn68xx;
318 struct cvmx_mio_boot_dma_int_enx_s cn68xxp1; 425 struct cvmx_mio_boot_dma_int_enx_s cn68xxp1;
426 struct cvmx_mio_boot_dma_int_enx_s cnf71xx;
319}; 427};
320 428
321union cvmx_mio_boot_dma_timx { 429union cvmx_mio_boot_dma_timx {
322 uint64_t u64; 430 uint64_t u64;
323 struct cvmx_mio_boot_dma_timx_s { 431 struct cvmx_mio_boot_dma_timx_s {
432#ifdef __BIG_ENDIAN_BITFIELD
324 uint64_t dmack_pi:1; 433 uint64_t dmack_pi:1;
325 uint64_t dmarq_pi:1; 434 uint64_t dmarq_pi:1;
326 uint64_t tim_mult:2; 435 uint64_t tim_mult:2;
@@ -336,6 +445,23 @@ union cvmx_mio_boot_dma_timx {
336 uint64_t oe_a:6; 445 uint64_t oe_a:6;
337 uint64_t dmack_s:6; 446 uint64_t dmack_s:6;
338 uint64_t dmarq:6; 447 uint64_t dmarq:6;
448#else
449 uint64_t dmarq:6;
450 uint64_t dmack_s:6;
451 uint64_t oe_a:6;
452 uint64_t oe_n:6;
453 uint64_t we_a:6;
454 uint64_t we_n:6;
455 uint64_t dmack_h:6;
456 uint64_t pause:6;
457 uint64_t reserved_48_54:7;
458 uint64_t width:1;
459 uint64_t ddr:1;
460 uint64_t rd_dly:3;
461 uint64_t tim_mult:2;
462 uint64_t dmarq_pi:1;
463 uint64_t dmack_pi:1;
464#endif
339 } s; 465 } s;
340 struct cvmx_mio_boot_dma_timx_s cn52xx; 466 struct cvmx_mio_boot_dma_timx_s cn52xx;
341 struct cvmx_mio_boot_dma_timx_s cn52xxp1; 467 struct cvmx_mio_boot_dma_timx_s cn52xxp1;
@@ -347,14 +473,21 @@ union cvmx_mio_boot_dma_timx {
347 struct cvmx_mio_boot_dma_timx_s cn66xx; 473 struct cvmx_mio_boot_dma_timx_s cn66xx;
348 struct cvmx_mio_boot_dma_timx_s cn68xx; 474 struct cvmx_mio_boot_dma_timx_s cn68xx;
349 struct cvmx_mio_boot_dma_timx_s cn68xxp1; 475 struct cvmx_mio_boot_dma_timx_s cn68xxp1;
476 struct cvmx_mio_boot_dma_timx_s cnf71xx;
350}; 477};
351 478
352union cvmx_mio_boot_err { 479union cvmx_mio_boot_err {
353 uint64_t u64; 480 uint64_t u64;
354 struct cvmx_mio_boot_err_s { 481 struct cvmx_mio_boot_err_s {
482#ifdef __BIG_ENDIAN_BITFIELD
355 uint64_t reserved_2_63:62; 483 uint64_t reserved_2_63:62;
356 uint64_t wait_err:1; 484 uint64_t wait_err:1;
357 uint64_t adr_err:1; 485 uint64_t adr_err:1;
486#else
487 uint64_t adr_err:1;
488 uint64_t wait_err:1;
489 uint64_t reserved_2_63:62;
490#endif
358 } s; 491 } s;
359 struct cvmx_mio_boot_err_s cn30xx; 492 struct cvmx_mio_boot_err_s cn30xx;
360 struct cvmx_mio_boot_err_s cn31xx; 493 struct cvmx_mio_boot_err_s cn31xx;
@@ -373,14 +506,21 @@ union cvmx_mio_boot_err {
373 struct cvmx_mio_boot_err_s cn66xx; 506 struct cvmx_mio_boot_err_s cn66xx;
374 struct cvmx_mio_boot_err_s cn68xx; 507 struct cvmx_mio_boot_err_s cn68xx;
375 struct cvmx_mio_boot_err_s cn68xxp1; 508 struct cvmx_mio_boot_err_s cn68xxp1;
509 struct cvmx_mio_boot_err_s cnf71xx;
376}; 510};
377 511
378union cvmx_mio_boot_int { 512union cvmx_mio_boot_int {
379 uint64_t u64; 513 uint64_t u64;
380 struct cvmx_mio_boot_int_s { 514 struct cvmx_mio_boot_int_s {
515#ifdef __BIG_ENDIAN_BITFIELD
381 uint64_t reserved_2_63:62; 516 uint64_t reserved_2_63:62;
382 uint64_t wait_int:1; 517 uint64_t wait_int:1;
383 uint64_t adr_int:1; 518 uint64_t adr_int:1;
519#else
520 uint64_t adr_int:1;
521 uint64_t wait_int:1;
522 uint64_t reserved_2_63:62;
523#endif
384 } s; 524 } s;
385 struct cvmx_mio_boot_int_s cn30xx; 525 struct cvmx_mio_boot_int_s cn30xx;
386 struct cvmx_mio_boot_int_s cn31xx; 526 struct cvmx_mio_boot_int_s cn31xx;
@@ -399,14 +539,21 @@ union cvmx_mio_boot_int {
399 struct cvmx_mio_boot_int_s cn66xx; 539 struct cvmx_mio_boot_int_s cn66xx;
400 struct cvmx_mio_boot_int_s cn68xx; 540 struct cvmx_mio_boot_int_s cn68xx;
401 struct cvmx_mio_boot_int_s cn68xxp1; 541 struct cvmx_mio_boot_int_s cn68xxp1;
542 struct cvmx_mio_boot_int_s cnf71xx;
402}; 543};
403 544
404union cvmx_mio_boot_loc_adr { 545union cvmx_mio_boot_loc_adr {
405 uint64_t u64; 546 uint64_t u64;
406 struct cvmx_mio_boot_loc_adr_s { 547 struct cvmx_mio_boot_loc_adr_s {
548#ifdef __BIG_ENDIAN_BITFIELD
407 uint64_t reserved_8_63:56; 549 uint64_t reserved_8_63:56;
408 uint64_t adr:5; 550 uint64_t adr:5;
409 uint64_t reserved_0_2:3; 551 uint64_t reserved_0_2:3;
552#else
553 uint64_t reserved_0_2:3;
554 uint64_t adr:5;
555 uint64_t reserved_8_63:56;
556#endif
410 } s; 557 } s;
411 struct cvmx_mio_boot_loc_adr_s cn30xx; 558 struct cvmx_mio_boot_loc_adr_s cn30xx;
412 struct cvmx_mio_boot_loc_adr_s cn31xx; 559 struct cvmx_mio_boot_loc_adr_s cn31xx;
@@ -425,16 +572,25 @@ union cvmx_mio_boot_loc_adr {
425 struct cvmx_mio_boot_loc_adr_s cn66xx; 572 struct cvmx_mio_boot_loc_adr_s cn66xx;
426 struct cvmx_mio_boot_loc_adr_s cn68xx; 573 struct cvmx_mio_boot_loc_adr_s cn68xx;
427 struct cvmx_mio_boot_loc_adr_s cn68xxp1; 574 struct cvmx_mio_boot_loc_adr_s cn68xxp1;
575 struct cvmx_mio_boot_loc_adr_s cnf71xx;
428}; 576};
429 577
430union cvmx_mio_boot_loc_cfgx { 578union cvmx_mio_boot_loc_cfgx {
431 uint64_t u64; 579 uint64_t u64;
432 struct cvmx_mio_boot_loc_cfgx_s { 580 struct cvmx_mio_boot_loc_cfgx_s {
581#ifdef __BIG_ENDIAN_BITFIELD
433 uint64_t reserved_32_63:32; 582 uint64_t reserved_32_63:32;
434 uint64_t en:1; 583 uint64_t en:1;
435 uint64_t reserved_28_30:3; 584 uint64_t reserved_28_30:3;
436 uint64_t base:25; 585 uint64_t base:25;
437 uint64_t reserved_0_2:3; 586 uint64_t reserved_0_2:3;
587#else
588 uint64_t reserved_0_2:3;
589 uint64_t base:25;
590 uint64_t reserved_28_30:3;
591 uint64_t en:1;
592 uint64_t reserved_32_63:32;
593#endif
438 } s; 594 } s;
439 struct cvmx_mio_boot_loc_cfgx_s cn30xx; 595 struct cvmx_mio_boot_loc_cfgx_s cn30xx;
440 struct cvmx_mio_boot_loc_cfgx_s cn31xx; 596 struct cvmx_mio_boot_loc_cfgx_s cn31xx;
@@ -453,12 +609,17 @@ union cvmx_mio_boot_loc_cfgx {
453 struct cvmx_mio_boot_loc_cfgx_s cn66xx; 609 struct cvmx_mio_boot_loc_cfgx_s cn66xx;
454 struct cvmx_mio_boot_loc_cfgx_s cn68xx; 610 struct cvmx_mio_boot_loc_cfgx_s cn68xx;
455 struct cvmx_mio_boot_loc_cfgx_s cn68xxp1; 611 struct cvmx_mio_boot_loc_cfgx_s cn68xxp1;
612 struct cvmx_mio_boot_loc_cfgx_s cnf71xx;
456}; 613};
457 614
458union cvmx_mio_boot_loc_dat { 615union cvmx_mio_boot_loc_dat {
459 uint64_t u64; 616 uint64_t u64;
460 struct cvmx_mio_boot_loc_dat_s { 617 struct cvmx_mio_boot_loc_dat_s {
618#ifdef __BIG_ENDIAN_BITFIELD
461 uint64_t data:64; 619 uint64_t data:64;
620#else
621 uint64_t data:64;
622#endif
462 } s; 623 } s;
463 struct cvmx_mio_boot_loc_dat_s cn30xx; 624 struct cvmx_mio_boot_loc_dat_s cn30xx;
464 struct cvmx_mio_boot_loc_dat_s cn31xx; 625 struct cvmx_mio_boot_loc_dat_s cn31xx;
@@ -477,11 +638,13 @@ union cvmx_mio_boot_loc_dat {
477 struct cvmx_mio_boot_loc_dat_s cn66xx; 638 struct cvmx_mio_boot_loc_dat_s cn66xx;
478 struct cvmx_mio_boot_loc_dat_s cn68xx; 639 struct cvmx_mio_boot_loc_dat_s cn68xx;
479 struct cvmx_mio_boot_loc_dat_s cn68xxp1; 640 struct cvmx_mio_boot_loc_dat_s cn68xxp1;
641 struct cvmx_mio_boot_loc_dat_s cnf71xx;
480}; 642};
481 643
482union cvmx_mio_boot_pin_defs { 644union cvmx_mio_boot_pin_defs {
483 uint64_t u64; 645 uint64_t u64;
484 struct cvmx_mio_boot_pin_defs_s { 646 struct cvmx_mio_boot_pin_defs_s {
647#ifdef __BIG_ENDIAN_BITFIELD
485 uint64_t reserved_32_63:32; 648 uint64_t reserved_32_63:32;
486 uint64_t user1:16; 649 uint64_t user1:16;
487 uint64_t ale:1; 650 uint64_t ale:1;
@@ -492,8 +655,21 @@ union cvmx_mio_boot_pin_defs {
492 uint64_t term:2; 655 uint64_t term:2;
493 uint64_t nand:1; 656 uint64_t nand:1;
494 uint64_t user0:8; 657 uint64_t user0:8;
658#else
659 uint64_t user0:8;
660 uint64_t nand:1;
661 uint64_t term:2;
662 uint64_t dmack_p0:1;
663 uint64_t dmack_p1:1;
664 uint64_t dmack_p2:1;
665 uint64_t width:1;
666 uint64_t ale:1;
667 uint64_t user1:16;
668 uint64_t reserved_32_63:32;
669#endif
495 } s; 670 } s;
496 struct cvmx_mio_boot_pin_defs_cn52xx { 671 struct cvmx_mio_boot_pin_defs_cn52xx {
672#ifdef __BIG_ENDIAN_BITFIELD
497 uint64_t reserved_16_63:48; 673 uint64_t reserved_16_63:48;
498 uint64_t ale:1; 674 uint64_t ale:1;
499 uint64_t width:1; 675 uint64_t width:1;
@@ -503,8 +679,20 @@ union cvmx_mio_boot_pin_defs {
503 uint64_t term:2; 679 uint64_t term:2;
504 uint64_t nand:1; 680 uint64_t nand:1;
505 uint64_t reserved_0_7:8; 681 uint64_t reserved_0_7:8;
682#else
683 uint64_t reserved_0_7:8;
684 uint64_t nand:1;
685 uint64_t term:2;
686 uint64_t dmack_p0:1;
687 uint64_t dmack_p1:1;
688 uint64_t reserved_13_13:1;
689 uint64_t width:1;
690 uint64_t ale:1;
691 uint64_t reserved_16_63:48;
692#endif
506 } cn52xx; 693 } cn52xx;
507 struct cvmx_mio_boot_pin_defs_cn56xx { 694 struct cvmx_mio_boot_pin_defs_cn56xx {
695#ifdef __BIG_ENDIAN_BITFIELD
508 uint64_t reserved_16_63:48; 696 uint64_t reserved_16_63:48;
509 uint64_t ale:1; 697 uint64_t ale:1;
510 uint64_t width:1; 698 uint64_t width:1;
@@ -513,8 +701,19 @@ union cvmx_mio_boot_pin_defs {
513 uint64_t dmack_p0:1; 701 uint64_t dmack_p0:1;
514 uint64_t term:2; 702 uint64_t term:2;
515 uint64_t reserved_0_8:9; 703 uint64_t reserved_0_8:9;
704#else
705 uint64_t reserved_0_8:9;
706 uint64_t term:2;
707 uint64_t dmack_p0:1;
708 uint64_t dmack_p1:1;
709 uint64_t dmack_p2:1;
710 uint64_t width:1;
711 uint64_t ale:1;
712 uint64_t reserved_16_63:48;
713#endif
516 } cn56xx; 714 } cn56xx;
517 struct cvmx_mio_boot_pin_defs_cn61xx { 715 struct cvmx_mio_boot_pin_defs_cn61xx {
716#ifdef __BIG_ENDIAN_BITFIELD
518 uint64_t reserved_32_63:32; 717 uint64_t reserved_32_63:32;
519 uint64_t user1:16; 718 uint64_t user1:16;
520 uint64_t ale:1; 719 uint64_t ale:1;
@@ -525,17 +724,31 @@ union cvmx_mio_boot_pin_defs {
525 uint64_t term:2; 724 uint64_t term:2;
526 uint64_t nand:1; 725 uint64_t nand:1;
527 uint64_t user0:8; 726 uint64_t user0:8;
727#else
728 uint64_t user0:8;
729 uint64_t nand:1;
730 uint64_t term:2;
731 uint64_t dmack_p0:1;
732 uint64_t dmack_p1:1;
733 uint64_t reserved_13_13:1;
734 uint64_t width:1;
735 uint64_t ale:1;
736 uint64_t user1:16;
737 uint64_t reserved_32_63:32;
738#endif
528 } cn61xx; 739 } cn61xx;
529 struct cvmx_mio_boot_pin_defs_cn52xx cn63xx; 740 struct cvmx_mio_boot_pin_defs_cn52xx cn63xx;
530 struct cvmx_mio_boot_pin_defs_cn52xx cn63xxp1; 741 struct cvmx_mio_boot_pin_defs_cn52xx cn63xxp1;
531 struct cvmx_mio_boot_pin_defs_cn52xx cn66xx; 742 struct cvmx_mio_boot_pin_defs_cn52xx cn66xx;
532 struct cvmx_mio_boot_pin_defs_cn52xx cn68xx; 743 struct cvmx_mio_boot_pin_defs_cn52xx cn68xx;
533 struct cvmx_mio_boot_pin_defs_cn52xx cn68xxp1; 744 struct cvmx_mio_boot_pin_defs_cn52xx cn68xxp1;
745 struct cvmx_mio_boot_pin_defs_cn61xx cnf71xx;
534}; 746};
535 747
536union cvmx_mio_boot_reg_cfgx { 748union cvmx_mio_boot_reg_cfgx {
537 uint64_t u64; 749 uint64_t u64;
538 struct cvmx_mio_boot_reg_cfgx_s { 750 struct cvmx_mio_boot_reg_cfgx_s {
751#ifdef __BIG_ENDIAN_BITFIELD
539 uint64_t reserved_44_63:20; 752 uint64_t reserved_44_63:20;
540 uint64_t dmack:2; 753 uint64_t dmack:2;
541 uint64_t tim_mult:2; 754 uint64_t tim_mult:2;
@@ -549,8 +762,24 @@ union cvmx_mio_boot_reg_cfgx {
549 uint64_t width:1; 762 uint64_t width:1;
550 uint64_t size:12; 763 uint64_t size:12;
551 uint64_t base:16; 764 uint64_t base:16;
765#else
766 uint64_t base:16;
767 uint64_t size:12;
768 uint64_t width:1;
769 uint64_t ale:1;
770 uint64_t orbit:1;
771 uint64_t en:1;
772 uint64_t oe_ext:2;
773 uint64_t we_ext:2;
774 uint64_t sam:1;
775 uint64_t rd_dly:3;
776 uint64_t tim_mult:2;
777 uint64_t dmack:2;
778 uint64_t reserved_44_63:20;
779#endif
552 } s; 780 } s;
553 struct cvmx_mio_boot_reg_cfgx_cn30xx { 781 struct cvmx_mio_boot_reg_cfgx_cn30xx {
782#ifdef __BIG_ENDIAN_BITFIELD
554 uint64_t reserved_37_63:27; 783 uint64_t reserved_37_63:27;
555 uint64_t sam:1; 784 uint64_t sam:1;
556 uint64_t we_ext:2; 785 uint64_t we_ext:2;
@@ -561,18 +790,40 @@ union cvmx_mio_boot_reg_cfgx {
561 uint64_t width:1; 790 uint64_t width:1;
562 uint64_t size:12; 791 uint64_t size:12;
563 uint64_t base:16; 792 uint64_t base:16;
793#else
794 uint64_t base:16;
795 uint64_t size:12;
796 uint64_t width:1;
797 uint64_t ale:1;
798 uint64_t orbit:1;
799 uint64_t en:1;
800 uint64_t oe_ext:2;
801 uint64_t we_ext:2;
802 uint64_t sam:1;
803 uint64_t reserved_37_63:27;
804#endif
564 } cn30xx; 805 } cn30xx;
565 struct cvmx_mio_boot_reg_cfgx_cn30xx cn31xx; 806 struct cvmx_mio_boot_reg_cfgx_cn30xx cn31xx;
566 struct cvmx_mio_boot_reg_cfgx_cn38xx { 807 struct cvmx_mio_boot_reg_cfgx_cn38xx {
808#ifdef __BIG_ENDIAN_BITFIELD
567 uint64_t reserved_32_63:32; 809 uint64_t reserved_32_63:32;
568 uint64_t en:1; 810 uint64_t en:1;
569 uint64_t orbit:1; 811 uint64_t orbit:1;
570 uint64_t reserved_28_29:2; 812 uint64_t reserved_28_29:2;
571 uint64_t size:12; 813 uint64_t size:12;
572 uint64_t base:16; 814 uint64_t base:16;
815#else
816 uint64_t base:16;
817 uint64_t size:12;
818 uint64_t reserved_28_29:2;
819 uint64_t orbit:1;
820 uint64_t en:1;
821 uint64_t reserved_32_63:32;
822#endif
573 } cn38xx; 823 } cn38xx;
574 struct cvmx_mio_boot_reg_cfgx_cn38xx cn38xxp2; 824 struct cvmx_mio_boot_reg_cfgx_cn38xx cn38xxp2;
575 struct cvmx_mio_boot_reg_cfgx_cn50xx { 825 struct cvmx_mio_boot_reg_cfgx_cn50xx {
826#ifdef __BIG_ENDIAN_BITFIELD
576 uint64_t reserved_42_63:22; 827 uint64_t reserved_42_63:22;
577 uint64_t tim_mult:2; 828 uint64_t tim_mult:2;
578 uint64_t rd_dly:3; 829 uint64_t rd_dly:3;
@@ -585,6 +836,20 @@ union cvmx_mio_boot_reg_cfgx {
585 uint64_t width:1; 836 uint64_t width:1;
586 uint64_t size:12; 837 uint64_t size:12;
587 uint64_t base:16; 838 uint64_t base:16;
839#else
840 uint64_t base:16;
841 uint64_t size:12;
842 uint64_t width:1;
843 uint64_t ale:1;
844 uint64_t orbit:1;
845 uint64_t en:1;
846 uint64_t oe_ext:2;
847 uint64_t we_ext:2;
848 uint64_t sam:1;
849 uint64_t rd_dly:3;
850 uint64_t tim_mult:2;
851 uint64_t reserved_42_63:22;
852#endif
588 } cn50xx; 853 } cn50xx;
589 struct cvmx_mio_boot_reg_cfgx_s cn52xx; 854 struct cvmx_mio_boot_reg_cfgx_s cn52xx;
590 struct cvmx_mio_boot_reg_cfgx_s cn52xxp1; 855 struct cvmx_mio_boot_reg_cfgx_s cn52xxp1;
@@ -598,11 +863,13 @@ union cvmx_mio_boot_reg_cfgx {
598 struct cvmx_mio_boot_reg_cfgx_s cn66xx; 863 struct cvmx_mio_boot_reg_cfgx_s cn66xx;
599 struct cvmx_mio_boot_reg_cfgx_s cn68xx; 864 struct cvmx_mio_boot_reg_cfgx_s cn68xx;
600 struct cvmx_mio_boot_reg_cfgx_s cn68xxp1; 865 struct cvmx_mio_boot_reg_cfgx_s cn68xxp1;
866 struct cvmx_mio_boot_reg_cfgx_s cnf71xx;
601}; 867};
602 868
603union cvmx_mio_boot_reg_timx { 869union cvmx_mio_boot_reg_timx {
604 uint64_t u64; 870 uint64_t u64;
605 struct cvmx_mio_boot_reg_timx_s { 871 struct cvmx_mio_boot_reg_timx_s {
872#ifdef __BIG_ENDIAN_BITFIELD
606 uint64_t pagem:1; 873 uint64_t pagem:1;
607 uint64_t waitm:1; 874 uint64_t waitm:1;
608 uint64_t pages:2; 875 uint64_t pages:2;
@@ -616,10 +883,26 @@ union cvmx_mio_boot_reg_timx {
616 uint64_t oe:6; 883 uint64_t oe:6;
617 uint64_t ce:6; 884 uint64_t ce:6;
618 uint64_t adr:6; 885 uint64_t adr:6;
886#else
887 uint64_t adr:6;
888 uint64_t ce:6;
889 uint64_t oe:6;
890 uint64_t we:6;
891 uint64_t rd_hld:6;
892 uint64_t wr_hld:6;
893 uint64_t pause:6;
894 uint64_t wait:6;
895 uint64_t page:6;
896 uint64_t ale:6;
897 uint64_t pages:2;
898 uint64_t waitm:1;
899 uint64_t pagem:1;
900#endif
619 } s; 901 } s;
620 struct cvmx_mio_boot_reg_timx_s cn30xx; 902 struct cvmx_mio_boot_reg_timx_s cn30xx;
621 struct cvmx_mio_boot_reg_timx_s cn31xx; 903 struct cvmx_mio_boot_reg_timx_s cn31xx;
622 struct cvmx_mio_boot_reg_timx_cn38xx { 904 struct cvmx_mio_boot_reg_timx_cn38xx {
905#ifdef __BIG_ENDIAN_BITFIELD
623 uint64_t pagem:1; 906 uint64_t pagem:1;
624 uint64_t waitm:1; 907 uint64_t waitm:1;
625 uint64_t pages:2; 908 uint64_t pages:2;
@@ -633,6 +916,21 @@ union cvmx_mio_boot_reg_timx {
633 uint64_t oe:6; 916 uint64_t oe:6;
634 uint64_t ce:6; 917 uint64_t ce:6;
635 uint64_t adr:6; 918 uint64_t adr:6;
919#else
920 uint64_t adr:6;
921 uint64_t ce:6;
922 uint64_t oe:6;
923 uint64_t we:6;
924 uint64_t rd_hld:6;
925 uint64_t wr_hld:6;
926 uint64_t pause:6;
927 uint64_t wait:6;
928 uint64_t page:6;
929 uint64_t reserved_54_59:6;
930 uint64_t pages:2;
931 uint64_t waitm:1;
932 uint64_t pagem:1;
933#endif
636 } cn38xx; 934 } cn38xx;
637 struct cvmx_mio_boot_reg_timx_cn38xx cn38xxp2; 935 struct cvmx_mio_boot_reg_timx_cn38xx cn38xxp2;
638 struct cvmx_mio_boot_reg_timx_s cn50xx; 936 struct cvmx_mio_boot_reg_timx_s cn50xx;
@@ -648,23 +946,40 @@ union cvmx_mio_boot_reg_timx {
648 struct cvmx_mio_boot_reg_timx_s cn66xx; 946 struct cvmx_mio_boot_reg_timx_s cn66xx;
649 struct cvmx_mio_boot_reg_timx_s cn68xx; 947 struct cvmx_mio_boot_reg_timx_s cn68xx;
650 struct cvmx_mio_boot_reg_timx_s cn68xxp1; 948 struct cvmx_mio_boot_reg_timx_s cn68xxp1;
949 struct cvmx_mio_boot_reg_timx_s cnf71xx;
651}; 950};
652 951
653union cvmx_mio_boot_thr { 952union cvmx_mio_boot_thr {
654 uint64_t u64; 953 uint64_t u64;
655 struct cvmx_mio_boot_thr_s { 954 struct cvmx_mio_boot_thr_s {
955#ifdef __BIG_ENDIAN_BITFIELD
656 uint64_t reserved_22_63:42; 956 uint64_t reserved_22_63:42;
657 uint64_t dma_thr:6; 957 uint64_t dma_thr:6;
658 uint64_t reserved_14_15:2; 958 uint64_t reserved_14_15:2;
659 uint64_t fif_cnt:6; 959 uint64_t fif_cnt:6;
660 uint64_t reserved_6_7:2; 960 uint64_t reserved_6_7:2;
661 uint64_t fif_thr:6; 961 uint64_t fif_thr:6;
962#else
963 uint64_t fif_thr:6;
964 uint64_t reserved_6_7:2;
965 uint64_t fif_cnt:6;
966 uint64_t reserved_14_15:2;
967 uint64_t dma_thr:6;
968 uint64_t reserved_22_63:42;
969#endif
662 } s; 970 } s;
663 struct cvmx_mio_boot_thr_cn30xx { 971 struct cvmx_mio_boot_thr_cn30xx {
972#ifdef __BIG_ENDIAN_BITFIELD
664 uint64_t reserved_14_63:50; 973 uint64_t reserved_14_63:50;
665 uint64_t fif_cnt:6; 974 uint64_t fif_cnt:6;
666 uint64_t reserved_6_7:2; 975 uint64_t reserved_6_7:2;
667 uint64_t fif_thr:6; 976 uint64_t fif_thr:6;
977#else
978 uint64_t fif_thr:6;
979 uint64_t reserved_6_7:2;
980 uint64_t fif_cnt:6;
981 uint64_t reserved_14_63:50;
982#endif
668 } cn30xx; 983 } cn30xx;
669 struct cvmx_mio_boot_thr_cn30xx cn31xx; 984 struct cvmx_mio_boot_thr_cn30xx cn31xx;
670 struct cvmx_mio_boot_thr_cn30xx cn38xx; 985 struct cvmx_mio_boot_thr_cn30xx cn38xx;
@@ -682,42 +997,66 @@ union cvmx_mio_boot_thr {
682 struct cvmx_mio_boot_thr_s cn66xx; 997 struct cvmx_mio_boot_thr_s cn66xx;
683 struct cvmx_mio_boot_thr_s cn68xx; 998 struct cvmx_mio_boot_thr_s cn68xx;
684 struct cvmx_mio_boot_thr_s cn68xxp1; 999 struct cvmx_mio_boot_thr_s cn68xxp1;
1000 struct cvmx_mio_boot_thr_s cnf71xx;
685}; 1001};
686 1002
687union cvmx_mio_emm_buf_dat { 1003union cvmx_mio_emm_buf_dat {
688 uint64_t u64; 1004 uint64_t u64;
689 struct cvmx_mio_emm_buf_dat_s { 1005 struct cvmx_mio_emm_buf_dat_s {
1006#ifdef __BIG_ENDIAN_BITFIELD
690 uint64_t dat:64; 1007 uint64_t dat:64;
1008#else
1009 uint64_t dat:64;
1010#endif
691 } s; 1011 } s;
692 struct cvmx_mio_emm_buf_dat_s cn61xx; 1012 struct cvmx_mio_emm_buf_dat_s cn61xx;
1013 struct cvmx_mio_emm_buf_dat_s cnf71xx;
693}; 1014};
694 1015
695union cvmx_mio_emm_buf_idx { 1016union cvmx_mio_emm_buf_idx {
696 uint64_t u64; 1017 uint64_t u64;
697 struct cvmx_mio_emm_buf_idx_s { 1018 struct cvmx_mio_emm_buf_idx_s {
1019#ifdef __BIG_ENDIAN_BITFIELD
698 uint64_t reserved_17_63:47; 1020 uint64_t reserved_17_63:47;
699 uint64_t inc:1; 1021 uint64_t inc:1;
700 uint64_t reserved_7_15:9; 1022 uint64_t reserved_7_15:9;
701 uint64_t buf_num:1; 1023 uint64_t buf_num:1;
702 uint64_t offset:6; 1024 uint64_t offset:6;
1025#else
1026 uint64_t offset:6;
1027 uint64_t buf_num:1;
1028 uint64_t reserved_7_15:9;
1029 uint64_t inc:1;
1030 uint64_t reserved_17_63:47;
1031#endif
703 } s; 1032 } s;
704 struct cvmx_mio_emm_buf_idx_s cn61xx; 1033 struct cvmx_mio_emm_buf_idx_s cn61xx;
1034 struct cvmx_mio_emm_buf_idx_s cnf71xx;
705}; 1035};
706 1036
707union cvmx_mio_emm_cfg { 1037union cvmx_mio_emm_cfg {
708 uint64_t u64; 1038 uint64_t u64;
709 struct cvmx_mio_emm_cfg_s { 1039 struct cvmx_mio_emm_cfg_s {
1040#ifdef __BIG_ENDIAN_BITFIELD
710 uint64_t reserved_17_63:47; 1041 uint64_t reserved_17_63:47;
711 uint64_t boot_fail:1; 1042 uint64_t boot_fail:1;
712 uint64_t reserved_4_15:12; 1043 uint64_t reserved_4_15:12;
713 uint64_t bus_ena:4; 1044 uint64_t bus_ena:4;
1045#else
1046 uint64_t bus_ena:4;
1047 uint64_t reserved_4_15:12;
1048 uint64_t boot_fail:1;
1049 uint64_t reserved_17_63:47;
1050#endif
714 } s; 1051 } s;
715 struct cvmx_mio_emm_cfg_s cn61xx; 1052 struct cvmx_mio_emm_cfg_s cn61xx;
1053 struct cvmx_mio_emm_cfg_s cnf71xx;
716}; 1054};
717 1055
718union cvmx_mio_emm_cmd { 1056union cvmx_mio_emm_cmd {
719 uint64_t u64; 1057 uint64_t u64;
720 struct cvmx_mio_emm_cmd_s { 1058 struct cvmx_mio_emm_cmd_s {
1059#ifdef __BIG_ENDIAN_BITFIELD
721 uint64_t reserved_62_63:2; 1060 uint64_t reserved_62_63:2;
722 uint64_t bus_id:2; 1061 uint64_t bus_id:2;
723 uint64_t cmd_val:1; 1062 uint64_t cmd_val:1;
@@ -729,13 +1068,28 @@ union cvmx_mio_emm_cmd {
729 uint64_t rtype_xor:3; 1068 uint64_t rtype_xor:3;
730 uint64_t cmd_idx:6; 1069 uint64_t cmd_idx:6;
731 uint64_t arg:32; 1070 uint64_t arg:32;
1071#else
1072 uint64_t arg:32;
1073 uint64_t cmd_idx:6;
1074 uint64_t rtype_xor:3;
1075 uint64_t ctype_xor:2;
1076 uint64_t reserved_43_48:6;
1077 uint64_t offset:6;
1078 uint64_t dbuf:1;
1079 uint64_t reserved_56_58:3;
1080 uint64_t cmd_val:1;
1081 uint64_t bus_id:2;
1082 uint64_t reserved_62_63:2;
1083#endif
732 } s; 1084 } s;
733 struct cvmx_mio_emm_cmd_s cn61xx; 1085 struct cvmx_mio_emm_cmd_s cn61xx;
1086 struct cvmx_mio_emm_cmd_s cnf71xx;
734}; 1087};
735 1088
736union cvmx_mio_emm_dma { 1089union cvmx_mio_emm_dma {
737 uint64_t u64; 1090 uint64_t u64;
738 struct cvmx_mio_emm_dma_s { 1091 struct cvmx_mio_emm_dma_s {
1092#ifdef __BIG_ENDIAN_BITFIELD
739 uint64_t reserved_62_63:2; 1093 uint64_t reserved_62_63:2;
740 uint64_t bus_id:2; 1094 uint64_t bus_id:2;
741 uint64_t dma_val:1; 1095 uint64_t dma_val:1;
@@ -747,13 +1101,28 @@ union cvmx_mio_emm_dma {
747 uint64_t multi:1; 1101 uint64_t multi:1;
748 uint64_t block_cnt:16; 1102 uint64_t block_cnt:16;
749 uint64_t card_addr:32; 1103 uint64_t card_addr:32;
1104#else
1105 uint64_t card_addr:32;
1106 uint64_t block_cnt:16;
1107 uint64_t multi:1;
1108 uint64_t rw:1;
1109 uint64_t rel_wr:1;
1110 uint64_t thres:6;
1111 uint64_t dat_null:1;
1112 uint64_t sector:1;
1113 uint64_t dma_val:1;
1114 uint64_t bus_id:2;
1115 uint64_t reserved_62_63:2;
1116#endif
750 } s; 1117 } s;
751 struct cvmx_mio_emm_dma_s cn61xx; 1118 struct cvmx_mio_emm_dma_s cn61xx;
1119 struct cvmx_mio_emm_dma_s cnf71xx;
752}; 1120};
753 1121
754union cvmx_mio_emm_int { 1122union cvmx_mio_emm_int {
755 uint64_t u64; 1123 uint64_t u64;
756 struct cvmx_mio_emm_int_s { 1124 struct cvmx_mio_emm_int_s {
1125#ifdef __BIG_ENDIAN_BITFIELD
757 uint64_t reserved_7_63:57; 1126 uint64_t reserved_7_63:57;
758 uint64_t switch_err:1; 1127 uint64_t switch_err:1;
759 uint64_t switch_done:1; 1128 uint64_t switch_done:1;
@@ -762,13 +1131,25 @@ union cvmx_mio_emm_int {
762 uint64_t dma_done:1; 1131 uint64_t dma_done:1;
763 uint64_t cmd_done:1; 1132 uint64_t cmd_done:1;
764 uint64_t buf_done:1; 1133 uint64_t buf_done:1;
1134#else
1135 uint64_t buf_done:1;
1136 uint64_t cmd_done:1;
1137 uint64_t dma_done:1;
1138 uint64_t cmd_err:1;
1139 uint64_t dma_err:1;
1140 uint64_t switch_done:1;
1141 uint64_t switch_err:1;
1142 uint64_t reserved_7_63:57;
1143#endif
765 } s; 1144 } s;
766 struct cvmx_mio_emm_int_s cn61xx; 1145 struct cvmx_mio_emm_int_s cn61xx;
1146 struct cvmx_mio_emm_int_s cnf71xx;
767}; 1147};
768 1148
769union cvmx_mio_emm_int_en { 1149union cvmx_mio_emm_int_en {
770 uint64_t u64; 1150 uint64_t u64;
771 struct cvmx_mio_emm_int_en_s { 1151 struct cvmx_mio_emm_int_en_s {
1152#ifdef __BIG_ENDIAN_BITFIELD
772 uint64_t reserved_7_63:57; 1153 uint64_t reserved_7_63:57;
773 uint64_t switch_err:1; 1154 uint64_t switch_err:1;
774 uint64_t switch_done:1; 1155 uint64_t switch_done:1;
@@ -777,13 +1158,25 @@ union cvmx_mio_emm_int_en {
777 uint64_t dma_done:1; 1158 uint64_t dma_done:1;
778 uint64_t cmd_done:1; 1159 uint64_t cmd_done:1;
779 uint64_t buf_done:1; 1160 uint64_t buf_done:1;
1161#else
1162 uint64_t buf_done:1;
1163 uint64_t cmd_done:1;
1164 uint64_t dma_done:1;
1165 uint64_t cmd_err:1;
1166 uint64_t dma_err:1;
1167 uint64_t switch_done:1;
1168 uint64_t switch_err:1;
1169 uint64_t reserved_7_63:57;
1170#endif
780 } s; 1171 } s;
781 struct cvmx_mio_emm_int_en_s cn61xx; 1172 struct cvmx_mio_emm_int_en_s cn61xx;
1173 struct cvmx_mio_emm_int_en_s cnf71xx;
782}; 1174};
783 1175
784union cvmx_mio_emm_modex { 1176union cvmx_mio_emm_modex {
785 uint64_t u64; 1177 uint64_t u64;
786 struct cvmx_mio_emm_modex_s { 1178 struct cvmx_mio_emm_modex_s {
1179#ifdef __BIG_ENDIAN_BITFIELD
787 uint64_t reserved_49_63:15; 1180 uint64_t reserved_49_63:15;
788 uint64_t hs_timing:1; 1181 uint64_t hs_timing:1;
789 uint64_t reserved_43_47:5; 1182 uint64_t reserved_43_47:5;
@@ -792,38 +1185,66 @@ union cvmx_mio_emm_modex {
792 uint64_t power_class:4; 1185 uint64_t power_class:4;
793 uint64_t clk_hi:16; 1186 uint64_t clk_hi:16;
794 uint64_t clk_lo:16; 1187 uint64_t clk_lo:16;
1188#else
1189 uint64_t clk_lo:16;
1190 uint64_t clk_hi:16;
1191 uint64_t power_class:4;
1192 uint64_t reserved_36_39:4;
1193 uint64_t bus_width:3;
1194 uint64_t reserved_43_47:5;
1195 uint64_t hs_timing:1;
1196 uint64_t reserved_49_63:15;
1197#endif
795 } s; 1198 } s;
796 struct cvmx_mio_emm_modex_s cn61xx; 1199 struct cvmx_mio_emm_modex_s cn61xx;
1200 struct cvmx_mio_emm_modex_s cnf71xx;
797}; 1201};
798 1202
799union cvmx_mio_emm_rca { 1203union cvmx_mio_emm_rca {
800 uint64_t u64; 1204 uint64_t u64;
801 struct cvmx_mio_emm_rca_s { 1205 struct cvmx_mio_emm_rca_s {
1206#ifdef __BIG_ENDIAN_BITFIELD
802 uint64_t reserved_16_63:48; 1207 uint64_t reserved_16_63:48;
803 uint64_t card_rca:16; 1208 uint64_t card_rca:16;
1209#else
1210 uint64_t card_rca:16;
1211 uint64_t reserved_16_63:48;
1212#endif
804 } s; 1213 } s;
805 struct cvmx_mio_emm_rca_s cn61xx; 1214 struct cvmx_mio_emm_rca_s cn61xx;
1215 struct cvmx_mio_emm_rca_s cnf71xx;
806}; 1216};
807 1217
808union cvmx_mio_emm_rsp_hi { 1218union cvmx_mio_emm_rsp_hi {
809 uint64_t u64; 1219 uint64_t u64;
810 struct cvmx_mio_emm_rsp_hi_s { 1220 struct cvmx_mio_emm_rsp_hi_s {
1221#ifdef __BIG_ENDIAN_BITFIELD
1222 uint64_t dat:64;
1223#else
811 uint64_t dat:64; 1224 uint64_t dat:64;
1225#endif
812 } s; 1226 } s;
813 struct cvmx_mio_emm_rsp_hi_s cn61xx; 1227 struct cvmx_mio_emm_rsp_hi_s cn61xx;
1228 struct cvmx_mio_emm_rsp_hi_s cnf71xx;
814}; 1229};
815 1230
816union cvmx_mio_emm_rsp_lo { 1231union cvmx_mio_emm_rsp_lo {
817 uint64_t u64; 1232 uint64_t u64;
818 struct cvmx_mio_emm_rsp_lo_s { 1233 struct cvmx_mio_emm_rsp_lo_s {
1234#ifdef __BIG_ENDIAN_BITFIELD
819 uint64_t dat:64; 1235 uint64_t dat:64;
1236#else
1237 uint64_t dat:64;
1238#endif
820 } s; 1239 } s;
821 struct cvmx_mio_emm_rsp_lo_s cn61xx; 1240 struct cvmx_mio_emm_rsp_lo_s cn61xx;
1241 struct cvmx_mio_emm_rsp_lo_s cnf71xx;
822}; 1242};
823 1243
824union cvmx_mio_emm_rsp_sts { 1244union cvmx_mio_emm_rsp_sts {
825 uint64_t u64; 1245 uint64_t u64;
826 struct cvmx_mio_emm_rsp_sts_s { 1246 struct cvmx_mio_emm_rsp_sts_s {
1247#ifdef __BIG_ENDIAN_BITFIELD
827 uint64_t reserved_62_63:2; 1248 uint64_t reserved_62_63:2;
828 uint64_t bus_id:2; 1249 uint64_t bus_id:2;
829 uint64_t cmd_val:1; 1250 uint64_t cmd_val:1;
@@ -849,33 +1270,76 @@ union cvmx_mio_emm_rsp_sts {
849 uint64_t cmd_type:2; 1270 uint64_t cmd_type:2;
850 uint64_t cmd_idx:6; 1271 uint64_t cmd_idx:6;
851 uint64_t cmd_done:1; 1272 uint64_t cmd_done:1;
1273#else
1274 uint64_t cmd_done:1;
1275 uint64_t cmd_idx:6;
1276 uint64_t cmd_type:2;
1277 uint64_t rsp_type:3;
1278 uint64_t rsp_val:1;
1279 uint64_t rsp_bad_sts:1;
1280 uint64_t rsp_crc_err:1;
1281 uint64_t rsp_timeout:1;
1282 uint64_t stp_val:1;
1283 uint64_t stp_bad_sts:1;
1284 uint64_t stp_crc_err:1;
1285 uint64_t stp_timeout:1;
1286 uint64_t rsp_busybit:1;
1287 uint64_t blk_crc_err:1;
1288 uint64_t blk_timeout:1;
1289 uint64_t dbuf:1;
1290 uint64_t reserved_24_27:4;
1291 uint64_t dbuf_err:1;
1292 uint64_t reserved_29_55:27;
1293 uint64_t dma_pend:1;
1294 uint64_t dma_val:1;
1295 uint64_t switch_val:1;
1296 uint64_t cmd_val:1;
1297 uint64_t bus_id:2;
1298 uint64_t reserved_62_63:2;
1299#endif
852 } s; 1300 } s;
853 struct cvmx_mio_emm_rsp_sts_s cn61xx; 1301 struct cvmx_mio_emm_rsp_sts_s cn61xx;
1302 struct cvmx_mio_emm_rsp_sts_s cnf71xx;
854}; 1303};
855 1304
856union cvmx_mio_emm_sample { 1305union cvmx_mio_emm_sample {
857 uint64_t u64; 1306 uint64_t u64;
858 struct cvmx_mio_emm_sample_s { 1307 struct cvmx_mio_emm_sample_s {
1308#ifdef __BIG_ENDIAN_BITFIELD
859 uint64_t reserved_26_63:38; 1309 uint64_t reserved_26_63:38;
860 uint64_t cmd_cnt:10; 1310 uint64_t cmd_cnt:10;
861 uint64_t reserved_10_15:6; 1311 uint64_t reserved_10_15:6;
862 uint64_t dat_cnt:10; 1312 uint64_t dat_cnt:10;
1313#else
1314 uint64_t dat_cnt:10;
1315 uint64_t reserved_10_15:6;
1316 uint64_t cmd_cnt:10;
1317 uint64_t reserved_26_63:38;
1318#endif
863 } s; 1319 } s;
864 struct cvmx_mio_emm_sample_s cn61xx; 1320 struct cvmx_mio_emm_sample_s cn61xx;
1321 struct cvmx_mio_emm_sample_s cnf71xx;
865}; 1322};
866 1323
867union cvmx_mio_emm_sts_mask { 1324union cvmx_mio_emm_sts_mask {
868 uint64_t u64; 1325 uint64_t u64;
869 struct cvmx_mio_emm_sts_mask_s { 1326 struct cvmx_mio_emm_sts_mask_s {
1327#ifdef __BIG_ENDIAN_BITFIELD
870 uint64_t reserved_32_63:32; 1328 uint64_t reserved_32_63:32;
871 uint64_t sts_msk:32; 1329 uint64_t sts_msk:32;
1330#else
1331 uint64_t sts_msk:32;
1332 uint64_t reserved_32_63:32;
1333#endif
872 } s; 1334 } s;
873 struct cvmx_mio_emm_sts_mask_s cn61xx; 1335 struct cvmx_mio_emm_sts_mask_s cn61xx;
1336 struct cvmx_mio_emm_sts_mask_s cnf71xx;
874}; 1337};
875 1338
876union cvmx_mio_emm_switch { 1339union cvmx_mio_emm_switch {
877 uint64_t u64; 1340 uint64_t u64;
878 struct cvmx_mio_emm_switch_s { 1341 struct cvmx_mio_emm_switch_s {
1342#ifdef __BIG_ENDIAN_BITFIELD
879 uint64_t reserved_62_63:2; 1343 uint64_t reserved_62_63:2;
880 uint64_t bus_id:2; 1344 uint64_t bus_id:2;
881 uint64_t switch_exe:1; 1345 uint64_t switch_exe:1;
@@ -890,23 +1354,50 @@ union cvmx_mio_emm_switch {
890 uint64_t power_class:4; 1354 uint64_t power_class:4;
891 uint64_t clk_hi:16; 1355 uint64_t clk_hi:16;
892 uint64_t clk_lo:16; 1356 uint64_t clk_lo:16;
1357#else
1358 uint64_t clk_lo:16;
1359 uint64_t clk_hi:16;
1360 uint64_t power_class:4;
1361 uint64_t reserved_36_39:4;
1362 uint64_t bus_width:3;
1363 uint64_t reserved_43_47:5;
1364 uint64_t hs_timing:1;
1365 uint64_t reserved_49_55:7;
1366 uint64_t switch_err2:1;
1367 uint64_t switch_err1:1;
1368 uint64_t switch_err0:1;
1369 uint64_t switch_exe:1;
1370 uint64_t bus_id:2;
1371 uint64_t reserved_62_63:2;
1372#endif
893 } s; 1373 } s;
894 struct cvmx_mio_emm_switch_s cn61xx; 1374 struct cvmx_mio_emm_switch_s cn61xx;
1375 struct cvmx_mio_emm_switch_s cnf71xx;
895}; 1376};
896 1377
897union cvmx_mio_emm_wdog { 1378union cvmx_mio_emm_wdog {
898 uint64_t u64; 1379 uint64_t u64;
899 struct cvmx_mio_emm_wdog_s { 1380 struct cvmx_mio_emm_wdog_s {
1381#ifdef __BIG_ENDIAN_BITFIELD
900 uint64_t reserved_26_63:38; 1382 uint64_t reserved_26_63:38;
901 uint64_t clk_cnt:26; 1383 uint64_t clk_cnt:26;
1384#else
1385 uint64_t clk_cnt:26;
1386 uint64_t reserved_26_63:38;
1387#endif
902 } s; 1388 } s;
903 struct cvmx_mio_emm_wdog_s cn61xx; 1389 struct cvmx_mio_emm_wdog_s cn61xx;
1390 struct cvmx_mio_emm_wdog_s cnf71xx;
904}; 1391};
905 1392
906union cvmx_mio_fus_bnk_datx { 1393union cvmx_mio_fus_bnk_datx {
907 uint64_t u64; 1394 uint64_t u64;
908 struct cvmx_mio_fus_bnk_datx_s { 1395 struct cvmx_mio_fus_bnk_datx_s {
1396#ifdef __BIG_ENDIAN_BITFIELD
1397 uint64_t dat:64;
1398#else
909 uint64_t dat:64; 1399 uint64_t dat:64;
1400#endif
910 } s; 1401 } s;
911 struct cvmx_mio_fus_bnk_datx_s cn50xx; 1402 struct cvmx_mio_fus_bnk_datx_s cn50xx;
912 struct cvmx_mio_fus_bnk_datx_s cn52xx; 1403 struct cvmx_mio_fus_bnk_datx_s cn52xx;
@@ -921,13 +1412,19 @@ union cvmx_mio_fus_bnk_datx {
921 struct cvmx_mio_fus_bnk_datx_s cn66xx; 1412 struct cvmx_mio_fus_bnk_datx_s cn66xx;
922 struct cvmx_mio_fus_bnk_datx_s cn68xx; 1413 struct cvmx_mio_fus_bnk_datx_s cn68xx;
923 struct cvmx_mio_fus_bnk_datx_s cn68xxp1; 1414 struct cvmx_mio_fus_bnk_datx_s cn68xxp1;
1415 struct cvmx_mio_fus_bnk_datx_s cnf71xx;
924}; 1416};
925 1417
926union cvmx_mio_fus_dat0 { 1418union cvmx_mio_fus_dat0 {
927 uint64_t u64; 1419 uint64_t u64;
928 struct cvmx_mio_fus_dat0_s { 1420 struct cvmx_mio_fus_dat0_s {
1421#ifdef __BIG_ENDIAN_BITFIELD
929 uint64_t reserved_32_63:32; 1422 uint64_t reserved_32_63:32;
930 uint64_t man_info:32; 1423 uint64_t man_info:32;
1424#else
1425 uint64_t man_info:32;
1426 uint64_t reserved_32_63:32;
1427#endif
931 } s; 1428 } s;
932 struct cvmx_mio_fus_dat0_s cn30xx; 1429 struct cvmx_mio_fus_dat0_s cn30xx;
933 struct cvmx_mio_fus_dat0_s cn31xx; 1430 struct cvmx_mio_fus_dat0_s cn31xx;
@@ -946,13 +1443,19 @@ union cvmx_mio_fus_dat0 {
946 struct cvmx_mio_fus_dat0_s cn66xx; 1443 struct cvmx_mio_fus_dat0_s cn66xx;
947 struct cvmx_mio_fus_dat0_s cn68xx; 1444 struct cvmx_mio_fus_dat0_s cn68xx;
948 struct cvmx_mio_fus_dat0_s cn68xxp1; 1445 struct cvmx_mio_fus_dat0_s cn68xxp1;
1446 struct cvmx_mio_fus_dat0_s cnf71xx;
949}; 1447};
950 1448
951union cvmx_mio_fus_dat1 { 1449union cvmx_mio_fus_dat1 {
952 uint64_t u64; 1450 uint64_t u64;
953 struct cvmx_mio_fus_dat1_s { 1451 struct cvmx_mio_fus_dat1_s {
1452#ifdef __BIG_ENDIAN_BITFIELD
954 uint64_t reserved_32_63:32; 1453 uint64_t reserved_32_63:32;
955 uint64_t man_info:32; 1454 uint64_t man_info:32;
1455#else
1456 uint64_t man_info:32;
1457 uint64_t reserved_32_63:32;
1458#endif
956 } s; 1459 } s;
957 struct cvmx_mio_fus_dat1_s cn30xx; 1460 struct cvmx_mio_fus_dat1_s cn30xx;
958 struct cvmx_mio_fus_dat1_s cn31xx; 1461 struct cvmx_mio_fus_dat1_s cn31xx;
@@ -971,11 +1474,13 @@ union cvmx_mio_fus_dat1 {
971 struct cvmx_mio_fus_dat1_s cn66xx; 1474 struct cvmx_mio_fus_dat1_s cn66xx;
972 struct cvmx_mio_fus_dat1_s cn68xx; 1475 struct cvmx_mio_fus_dat1_s cn68xx;
973 struct cvmx_mio_fus_dat1_s cn68xxp1; 1476 struct cvmx_mio_fus_dat1_s cn68xxp1;
1477 struct cvmx_mio_fus_dat1_s cnf71xx;
974}; 1478};
975 1479
976union cvmx_mio_fus_dat2 { 1480union cvmx_mio_fus_dat2 {
977 uint64_t u64; 1481 uint64_t u64;
978 struct cvmx_mio_fus_dat2_s { 1482 struct cvmx_mio_fus_dat2_s {
1483#ifdef __BIG_ENDIAN_BITFIELD
979 uint64_t reserved_48_63:16; 1484 uint64_t reserved_48_63:16;
980 uint64_t fus118:1; 1485 uint64_t fus118:1;
981 uint64_t rom_info:10; 1486 uint64_t rom_info:10;
@@ -992,8 +1497,27 @@ union cvmx_mio_fus_dat2 {
992 uint64_t bist_dis:1; 1497 uint64_t bist_dis:1;
993 uint64_t chip_id:8; 1498 uint64_t chip_id:8;
994 uint64_t reserved_0_15:16; 1499 uint64_t reserved_0_15:16;
1500#else
1501 uint64_t reserved_0_15:16;
1502 uint64_t chip_id:8;
1503 uint64_t bist_dis:1;
1504 uint64_t rst_sht:1;
1505 uint64_t nocrypto:1;
1506 uint64_t nomul:1;
1507 uint64_t nodfa_cp2:1;
1508 uint64_t nokasu:1;
1509 uint64_t reserved_30_31:2;
1510 uint64_t raid_en:1;
1511 uint64_t fus318:1;
1512 uint64_t dorm_crypto:1;
1513 uint64_t power_limit:2;
1514 uint64_t rom_info:10;
1515 uint64_t fus118:1;
1516 uint64_t reserved_48_63:16;
1517#endif
995 } s; 1518 } s;
996 struct cvmx_mio_fus_dat2_cn30xx { 1519 struct cvmx_mio_fus_dat2_cn30xx {
1520#ifdef __BIG_ENDIAN_BITFIELD
997 uint64_t reserved_29_63:35; 1521 uint64_t reserved_29_63:35;
998 uint64_t nodfa_cp2:1; 1522 uint64_t nodfa_cp2:1;
999 uint64_t nomul:1; 1523 uint64_t nomul:1;
@@ -1004,8 +1528,21 @@ union cvmx_mio_fus_dat2 {
1004 uint64_t pll_off:4; 1528 uint64_t pll_off:4;
1005 uint64_t reserved_1_11:11; 1529 uint64_t reserved_1_11:11;
1006 uint64_t pp_dis:1; 1530 uint64_t pp_dis:1;
1531#else
1532 uint64_t pp_dis:1;
1533 uint64_t reserved_1_11:11;
1534 uint64_t pll_off:4;
1535 uint64_t chip_id:8;
1536 uint64_t bist_dis:1;
1537 uint64_t rst_sht:1;
1538 uint64_t nocrypto:1;
1539 uint64_t nomul:1;
1540 uint64_t nodfa_cp2:1;
1541 uint64_t reserved_29_63:35;
1542#endif
1007 } cn30xx; 1543 } cn30xx;
1008 struct cvmx_mio_fus_dat2_cn31xx { 1544 struct cvmx_mio_fus_dat2_cn31xx {
1545#ifdef __BIG_ENDIAN_BITFIELD
1009 uint64_t reserved_29_63:35; 1546 uint64_t reserved_29_63:35;
1010 uint64_t nodfa_cp2:1; 1547 uint64_t nodfa_cp2:1;
1011 uint64_t nomul:1; 1548 uint64_t nomul:1;
@@ -1016,8 +1553,21 @@ union cvmx_mio_fus_dat2 {
1016 uint64_t pll_off:4; 1553 uint64_t pll_off:4;
1017 uint64_t reserved_2_11:10; 1554 uint64_t reserved_2_11:10;
1018 uint64_t pp_dis:2; 1555 uint64_t pp_dis:2;
1556#else
1557 uint64_t pp_dis:2;
1558 uint64_t reserved_2_11:10;
1559 uint64_t pll_off:4;
1560 uint64_t chip_id:8;
1561 uint64_t bist_dis:1;
1562 uint64_t rst_sht:1;
1563 uint64_t nocrypto:1;
1564 uint64_t nomul:1;
1565 uint64_t nodfa_cp2:1;
1566 uint64_t reserved_29_63:35;
1567#endif
1019 } cn31xx; 1568 } cn31xx;
1020 struct cvmx_mio_fus_dat2_cn38xx { 1569 struct cvmx_mio_fus_dat2_cn38xx {
1570#ifdef __BIG_ENDIAN_BITFIELD
1021 uint64_t reserved_29_63:35; 1571 uint64_t reserved_29_63:35;
1022 uint64_t nodfa_cp2:1; 1572 uint64_t nodfa_cp2:1;
1023 uint64_t nomul:1; 1573 uint64_t nomul:1;
@@ -1026,9 +1576,20 @@ union cvmx_mio_fus_dat2 {
1026 uint64_t bist_dis:1; 1576 uint64_t bist_dis:1;
1027 uint64_t chip_id:8; 1577 uint64_t chip_id:8;
1028 uint64_t pp_dis:16; 1578 uint64_t pp_dis:16;
1579#else
1580 uint64_t pp_dis:16;
1581 uint64_t chip_id:8;
1582 uint64_t bist_dis:1;
1583 uint64_t rst_sht:1;
1584 uint64_t nocrypto:1;
1585 uint64_t nomul:1;
1586 uint64_t nodfa_cp2:1;
1587 uint64_t reserved_29_63:35;
1588#endif
1029 } cn38xx; 1589 } cn38xx;
1030 struct cvmx_mio_fus_dat2_cn38xx cn38xxp2; 1590 struct cvmx_mio_fus_dat2_cn38xx cn38xxp2;
1031 struct cvmx_mio_fus_dat2_cn50xx { 1591 struct cvmx_mio_fus_dat2_cn50xx {
1592#ifdef __BIG_ENDIAN_BITFIELD
1032 uint64_t reserved_34_63:30; 1593 uint64_t reserved_34_63:30;
1033 uint64_t fus318:1; 1594 uint64_t fus318:1;
1034 uint64_t raid_en:1; 1595 uint64_t raid_en:1;
@@ -1042,8 +1603,24 @@ union cvmx_mio_fus_dat2 {
1042 uint64_t chip_id:8; 1603 uint64_t chip_id:8;
1043 uint64_t reserved_2_15:14; 1604 uint64_t reserved_2_15:14;
1044 uint64_t pp_dis:2; 1605 uint64_t pp_dis:2;
1606#else
1607 uint64_t pp_dis:2;
1608 uint64_t reserved_2_15:14;
1609 uint64_t chip_id:8;
1610 uint64_t bist_dis:1;
1611 uint64_t rst_sht:1;
1612 uint64_t nocrypto:1;
1613 uint64_t nomul:1;
1614 uint64_t nodfa_cp2:1;
1615 uint64_t nokasu:1;
1616 uint64_t reserved_30_31:2;
1617 uint64_t raid_en:1;
1618 uint64_t fus318:1;
1619 uint64_t reserved_34_63:30;
1620#endif
1045 } cn50xx; 1621 } cn50xx;
1046 struct cvmx_mio_fus_dat2_cn52xx { 1622 struct cvmx_mio_fus_dat2_cn52xx {
1623#ifdef __BIG_ENDIAN_BITFIELD
1047 uint64_t reserved_34_63:30; 1624 uint64_t reserved_34_63:30;
1048 uint64_t fus318:1; 1625 uint64_t fus318:1;
1049 uint64_t raid_en:1; 1626 uint64_t raid_en:1;
@@ -1057,9 +1634,25 @@ union cvmx_mio_fus_dat2 {
1057 uint64_t chip_id:8; 1634 uint64_t chip_id:8;
1058 uint64_t reserved_4_15:12; 1635 uint64_t reserved_4_15:12;
1059 uint64_t pp_dis:4; 1636 uint64_t pp_dis:4;
1637#else
1638 uint64_t pp_dis:4;
1639 uint64_t reserved_4_15:12;
1640 uint64_t chip_id:8;
1641 uint64_t bist_dis:1;
1642 uint64_t rst_sht:1;
1643 uint64_t nocrypto:1;
1644 uint64_t nomul:1;
1645 uint64_t nodfa_cp2:1;
1646 uint64_t nokasu:1;
1647 uint64_t reserved_30_31:2;
1648 uint64_t raid_en:1;
1649 uint64_t fus318:1;
1650 uint64_t reserved_34_63:30;
1651#endif
1060 } cn52xx; 1652 } cn52xx;
1061 struct cvmx_mio_fus_dat2_cn52xx cn52xxp1; 1653 struct cvmx_mio_fus_dat2_cn52xx cn52xxp1;
1062 struct cvmx_mio_fus_dat2_cn56xx { 1654 struct cvmx_mio_fus_dat2_cn56xx {
1655#ifdef __BIG_ENDIAN_BITFIELD
1063 uint64_t reserved_34_63:30; 1656 uint64_t reserved_34_63:30;
1064 uint64_t fus318:1; 1657 uint64_t fus318:1;
1065 uint64_t raid_en:1; 1658 uint64_t raid_en:1;
@@ -1073,9 +1666,25 @@ union cvmx_mio_fus_dat2 {
1073 uint64_t chip_id:8; 1666 uint64_t chip_id:8;
1074 uint64_t reserved_12_15:4; 1667 uint64_t reserved_12_15:4;
1075 uint64_t pp_dis:12; 1668 uint64_t pp_dis:12;
1669#else
1670 uint64_t pp_dis:12;
1671 uint64_t reserved_12_15:4;
1672 uint64_t chip_id:8;
1673 uint64_t bist_dis:1;
1674 uint64_t rst_sht:1;
1675 uint64_t nocrypto:1;
1676 uint64_t nomul:1;
1677 uint64_t nodfa_cp2:1;
1678 uint64_t nokasu:1;
1679 uint64_t reserved_30_31:2;
1680 uint64_t raid_en:1;
1681 uint64_t fus318:1;
1682 uint64_t reserved_34_63:30;
1683#endif
1076 } cn56xx; 1684 } cn56xx;
1077 struct cvmx_mio_fus_dat2_cn56xx cn56xxp1; 1685 struct cvmx_mio_fus_dat2_cn56xx cn56xxp1;
1078 struct cvmx_mio_fus_dat2_cn58xx { 1686 struct cvmx_mio_fus_dat2_cn58xx {
1687#ifdef __BIG_ENDIAN_BITFIELD
1079 uint64_t reserved_30_63:34; 1688 uint64_t reserved_30_63:34;
1080 uint64_t nokasu:1; 1689 uint64_t nokasu:1;
1081 uint64_t nodfa_cp2:1; 1690 uint64_t nodfa_cp2:1;
@@ -1085,9 +1694,21 @@ union cvmx_mio_fus_dat2 {
1085 uint64_t bist_dis:1; 1694 uint64_t bist_dis:1;
1086 uint64_t chip_id:8; 1695 uint64_t chip_id:8;
1087 uint64_t pp_dis:16; 1696 uint64_t pp_dis:16;
1697#else
1698 uint64_t pp_dis:16;
1699 uint64_t chip_id:8;
1700 uint64_t bist_dis:1;
1701 uint64_t rst_sht:1;
1702 uint64_t nocrypto:1;
1703 uint64_t nomul:1;
1704 uint64_t nodfa_cp2:1;
1705 uint64_t nokasu:1;
1706 uint64_t reserved_30_63:34;
1707#endif
1088 } cn58xx; 1708 } cn58xx;
1089 struct cvmx_mio_fus_dat2_cn58xx cn58xxp1; 1709 struct cvmx_mio_fus_dat2_cn58xx cn58xxp1;
1090 struct cvmx_mio_fus_dat2_cn61xx { 1710 struct cvmx_mio_fus_dat2_cn61xx {
1711#ifdef __BIG_ENDIAN_BITFIELD
1091 uint64_t reserved_48_63:16; 1712 uint64_t reserved_48_63:16;
1092 uint64_t fus118:1; 1713 uint64_t fus118:1;
1093 uint64_t rom_info:10; 1714 uint64_t rom_info:10;
@@ -1103,8 +1724,26 @@ union cvmx_mio_fus_dat2 {
1103 uint64_t chip_id:8; 1724 uint64_t chip_id:8;
1104 uint64_t reserved_4_15:12; 1725 uint64_t reserved_4_15:12;
1105 uint64_t pp_dis:4; 1726 uint64_t pp_dis:4;
1727#else
1728 uint64_t pp_dis:4;
1729 uint64_t reserved_4_15:12;
1730 uint64_t chip_id:8;
1731 uint64_t reserved_24_25:2;
1732 uint64_t nocrypto:1;
1733 uint64_t nomul:1;
1734 uint64_t nodfa_cp2:1;
1735 uint64_t reserved_29_31:3;
1736 uint64_t raid_en:1;
1737 uint64_t fus318:1;
1738 uint64_t dorm_crypto:1;
1739 uint64_t power_limit:2;
1740 uint64_t rom_info:10;
1741 uint64_t fus118:1;
1742 uint64_t reserved_48_63:16;
1743#endif
1106 } cn61xx; 1744 } cn61xx;
1107 struct cvmx_mio_fus_dat2_cn63xx { 1745 struct cvmx_mio_fus_dat2_cn63xx {
1746#ifdef __BIG_ENDIAN_BITFIELD
1108 uint64_t reserved_35_63:29; 1747 uint64_t reserved_35_63:29;
1109 uint64_t dorm_crypto:1; 1748 uint64_t dorm_crypto:1;
1110 uint64_t fus318:1; 1749 uint64_t fus318:1;
@@ -1117,9 +1756,24 @@ union cvmx_mio_fus_dat2 {
1117 uint64_t chip_id:8; 1756 uint64_t chip_id:8;
1118 uint64_t reserved_6_15:10; 1757 uint64_t reserved_6_15:10;
1119 uint64_t pp_dis:6; 1758 uint64_t pp_dis:6;
1759#else
1760 uint64_t pp_dis:6;
1761 uint64_t reserved_6_15:10;
1762 uint64_t chip_id:8;
1763 uint64_t reserved_24_25:2;
1764 uint64_t nocrypto:1;
1765 uint64_t nomul:1;
1766 uint64_t nodfa_cp2:1;
1767 uint64_t reserved_29_31:3;
1768 uint64_t raid_en:1;
1769 uint64_t fus318:1;
1770 uint64_t dorm_crypto:1;
1771 uint64_t reserved_35_63:29;
1772#endif
1120 } cn63xx; 1773 } cn63xx;
1121 struct cvmx_mio_fus_dat2_cn63xx cn63xxp1; 1774 struct cvmx_mio_fus_dat2_cn63xx cn63xxp1;
1122 struct cvmx_mio_fus_dat2_cn66xx { 1775 struct cvmx_mio_fus_dat2_cn66xx {
1776#ifdef __BIG_ENDIAN_BITFIELD
1123 uint64_t reserved_48_63:16; 1777 uint64_t reserved_48_63:16;
1124 uint64_t fus118:1; 1778 uint64_t fus118:1;
1125 uint64_t rom_info:10; 1779 uint64_t rom_info:10;
@@ -1135,8 +1789,26 @@ union cvmx_mio_fus_dat2 {
1135 uint64_t chip_id:8; 1789 uint64_t chip_id:8;
1136 uint64_t reserved_10_15:6; 1790 uint64_t reserved_10_15:6;
1137 uint64_t pp_dis:10; 1791 uint64_t pp_dis:10;
1792#else
1793 uint64_t pp_dis:10;
1794 uint64_t reserved_10_15:6;
1795 uint64_t chip_id:8;
1796 uint64_t reserved_24_25:2;
1797 uint64_t nocrypto:1;
1798 uint64_t nomul:1;
1799 uint64_t nodfa_cp2:1;
1800 uint64_t reserved_29_31:3;
1801 uint64_t raid_en:1;
1802 uint64_t fus318:1;
1803 uint64_t dorm_crypto:1;
1804 uint64_t power_limit:2;
1805 uint64_t rom_info:10;
1806 uint64_t fus118:1;
1807 uint64_t reserved_48_63:16;
1808#endif
1138 } cn66xx; 1809 } cn66xx;
1139 struct cvmx_mio_fus_dat2_cn68xx { 1810 struct cvmx_mio_fus_dat2_cn68xx {
1811#ifdef __BIG_ENDIAN_BITFIELD
1140 uint64_t reserved_37_63:27; 1812 uint64_t reserved_37_63:27;
1141 uint64_t power_limit:2; 1813 uint64_t power_limit:2;
1142 uint64_t dorm_crypto:1; 1814 uint64_t dorm_crypto:1;
@@ -1149,13 +1821,29 @@ union cvmx_mio_fus_dat2 {
1149 uint64_t reserved_24_25:2; 1821 uint64_t reserved_24_25:2;
1150 uint64_t chip_id:8; 1822 uint64_t chip_id:8;
1151 uint64_t reserved_0_15:16; 1823 uint64_t reserved_0_15:16;
1824#else
1825 uint64_t reserved_0_15:16;
1826 uint64_t chip_id:8;
1827 uint64_t reserved_24_25:2;
1828 uint64_t nocrypto:1;
1829 uint64_t nomul:1;
1830 uint64_t nodfa_cp2:1;
1831 uint64_t reserved_29_31:3;
1832 uint64_t raid_en:1;
1833 uint64_t fus318:1;
1834 uint64_t dorm_crypto:1;
1835 uint64_t power_limit:2;
1836 uint64_t reserved_37_63:27;
1837#endif
1152 } cn68xx; 1838 } cn68xx;
1153 struct cvmx_mio_fus_dat2_cn68xx cn68xxp1; 1839 struct cvmx_mio_fus_dat2_cn68xx cn68xxp1;
1840 struct cvmx_mio_fus_dat2_cn61xx cnf71xx;
1154}; 1841};
1155 1842
1156union cvmx_mio_fus_dat3 { 1843union cvmx_mio_fus_dat3 {
1157 uint64_t u64; 1844 uint64_t u64;
1158 struct cvmx_mio_fus_dat3_s { 1845 struct cvmx_mio_fus_dat3_s {
1846#ifdef __BIG_ENDIAN_BITFIELD
1159 uint64_t reserved_58_63:6; 1847 uint64_t reserved_58_63:6;
1160 uint64_t pll_ctl:10; 1848 uint64_t pll_ctl:10;
1161 uint64_t dfa_info_dte:3; 1849 uint64_t dfa_info_dte:3;
@@ -1174,8 +1862,29 @@ union cvmx_mio_fus_dat3 {
1174 uint64_t nozip:1; 1862 uint64_t nozip:1;
1175 uint64_t nodfa_dte:1; 1863 uint64_t nodfa_dte:1;
1176 uint64_t icache:24; 1864 uint64_t icache:24;
1865#else
1866 uint64_t icache:24;
1867 uint64_t nodfa_dte:1;
1868 uint64_t nozip:1;
1869 uint64_t efus_ign:1;
1870 uint64_t efus_lck:1;
1871 uint64_t bar2_en:1;
1872 uint64_t reserved_29_30:2;
1873 uint64_t pll_div4:1;
1874 uint64_t l2c_crip:3;
1875 uint64_t pll_half_dis:1;
1876 uint64_t efus_lck_man:1;
1877 uint64_t efus_lck_rsv:1;
1878 uint64_t ema:2;
1879 uint64_t reserved_40_40:1;
1880 uint64_t dfa_info_clm:4;
1881 uint64_t dfa_info_dte:3;
1882 uint64_t pll_ctl:10;
1883 uint64_t reserved_58_63:6;
1884#endif
1177 } s; 1885 } s;
1178 struct cvmx_mio_fus_dat3_cn30xx { 1886 struct cvmx_mio_fus_dat3_cn30xx {
1887#ifdef __BIG_ENDIAN_BITFIELD
1179 uint64_t reserved_32_63:32; 1888 uint64_t reserved_32_63:32;
1180 uint64_t pll_div4:1; 1889 uint64_t pll_div4:1;
1181 uint64_t reserved_29_30:2; 1890 uint64_t reserved_29_30:2;
@@ -1185,8 +1894,20 @@ union cvmx_mio_fus_dat3 {
1185 uint64_t nozip:1; 1894 uint64_t nozip:1;
1186 uint64_t nodfa_dte:1; 1895 uint64_t nodfa_dte:1;
1187 uint64_t icache:24; 1896 uint64_t icache:24;
1897#else
1898 uint64_t icache:24;
1899 uint64_t nodfa_dte:1;
1900 uint64_t nozip:1;
1901 uint64_t efus_ign:1;
1902 uint64_t efus_lck:1;
1903 uint64_t bar2_en:1;
1904 uint64_t reserved_29_30:2;
1905 uint64_t pll_div4:1;
1906 uint64_t reserved_32_63:32;
1907#endif
1188 } cn30xx; 1908 } cn30xx;
1189 struct cvmx_mio_fus_dat3_cn31xx { 1909 struct cvmx_mio_fus_dat3_cn31xx {
1910#ifdef __BIG_ENDIAN_BITFIELD
1190 uint64_t reserved_32_63:32; 1911 uint64_t reserved_32_63:32;
1191 uint64_t pll_div4:1; 1912 uint64_t pll_div4:1;
1192 uint64_t zip_crip:2; 1913 uint64_t zip_crip:2;
@@ -1196,8 +1917,20 @@ union cvmx_mio_fus_dat3 {
1196 uint64_t nozip:1; 1917 uint64_t nozip:1;
1197 uint64_t nodfa_dte:1; 1918 uint64_t nodfa_dte:1;
1198 uint64_t icache:24; 1919 uint64_t icache:24;
1920#else
1921 uint64_t icache:24;
1922 uint64_t nodfa_dte:1;
1923 uint64_t nozip:1;
1924 uint64_t efus_ign:1;
1925 uint64_t efus_lck:1;
1926 uint64_t bar2_en:1;
1927 uint64_t zip_crip:2;
1928 uint64_t pll_div4:1;
1929 uint64_t reserved_32_63:32;
1930#endif
1199 } cn31xx; 1931 } cn31xx;
1200 struct cvmx_mio_fus_dat3_cn38xx { 1932 struct cvmx_mio_fus_dat3_cn38xx {
1933#ifdef __BIG_ENDIAN_BITFIELD
1201 uint64_t reserved_31_63:33; 1934 uint64_t reserved_31_63:33;
1202 uint64_t zip_crip:2; 1935 uint64_t zip_crip:2;
1203 uint64_t bar2_en:1; 1936 uint64_t bar2_en:1;
@@ -1206,8 +1939,19 @@ union cvmx_mio_fus_dat3 {
1206 uint64_t nozip:1; 1939 uint64_t nozip:1;
1207 uint64_t nodfa_dte:1; 1940 uint64_t nodfa_dte:1;
1208 uint64_t icache:24; 1941 uint64_t icache:24;
1942#else
1943 uint64_t icache:24;
1944 uint64_t nodfa_dte:1;
1945 uint64_t nozip:1;
1946 uint64_t efus_ign:1;
1947 uint64_t efus_lck:1;
1948 uint64_t bar2_en:1;
1949 uint64_t zip_crip:2;
1950 uint64_t reserved_31_63:33;
1951#endif
1209 } cn38xx; 1952 } cn38xx;
1210 struct cvmx_mio_fus_dat3_cn38xxp2 { 1953 struct cvmx_mio_fus_dat3_cn38xxp2 {
1954#ifdef __BIG_ENDIAN_BITFIELD
1211 uint64_t reserved_29_63:35; 1955 uint64_t reserved_29_63:35;
1212 uint64_t bar2_en:1; 1956 uint64_t bar2_en:1;
1213 uint64_t efus_lck:1; 1957 uint64_t efus_lck:1;
@@ -1215,6 +1959,15 @@ union cvmx_mio_fus_dat3 {
1215 uint64_t nozip:1; 1959 uint64_t nozip:1;
1216 uint64_t nodfa_dte:1; 1960 uint64_t nodfa_dte:1;
1217 uint64_t icache:24; 1961 uint64_t icache:24;
1962#else
1963 uint64_t icache:24;
1964 uint64_t nodfa_dte:1;
1965 uint64_t nozip:1;
1966 uint64_t efus_ign:1;
1967 uint64_t efus_lck:1;
1968 uint64_t bar2_en:1;
1969 uint64_t reserved_29_63:35;
1970#endif
1218 } cn38xxp2; 1971 } cn38xxp2;
1219 struct cvmx_mio_fus_dat3_cn38xx cn50xx; 1972 struct cvmx_mio_fus_dat3_cn38xx cn50xx;
1220 struct cvmx_mio_fus_dat3_cn38xx cn52xx; 1973 struct cvmx_mio_fus_dat3_cn38xx cn52xx;
@@ -1224,6 +1977,7 @@ union cvmx_mio_fus_dat3 {
1224 struct cvmx_mio_fus_dat3_cn38xx cn58xx; 1977 struct cvmx_mio_fus_dat3_cn38xx cn58xx;
1225 struct cvmx_mio_fus_dat3_cn38xx cn58xxp1; 1978 struct cvmx_mio_fus_dat3_cn38xx cn58xxp1;
1226 struct cvmx_mio_fus_dat3_cn61xx { 1979 struct cvmx_mio_fus_dat3_cn61xx {
1980#ifdef __BIG_ENDIAN_BITFIELD
1227 uint64_t reserved_58_63:6; 1981 uint64_t reserved_58_63:6;
1228 uint64_t pll_ctl:10; 1982 uint64_t pll_ctl:10;
1229 uint64_t dfa_info_dte:3; 1983 uint64_t dfa_info_dte:3;
@@ -1242,21 +1996,49 @@ union cvmx_mio_fus_dat3 {
1242 uint64_t nozip:1; 1996 uint64_t nozip:1;
1243 uint64_t nodfa_dte:1; 1997 uint64_t nodfa_dte:1;
1244 uint64_t reserved_0_23:24; 1998 uint64_t reserved_0_23:24;
1999#else
2000 uint64_t reserved_0_23:24;
2001 uint64_t nodfa_dte:1;
2002 uint64_t nozip:1;
2003 uint64_t efus_ign:1;
2004 uint64_t efus_lck:1;
2005 uint64_t bar2_en:1;
2006 uint64_t zip_info:2;
2007 uint64_t reserved_31_31:1;
2008 uint64_t l2c_crip:3;
2009 uint64_t pll_half_dis:1;
2010 uint64_t efus_lck_man:1;
2011 uint64_t efus_lck_rsv:1;
2012 uint64_t ema:2;
2013 uint64_t reserved_40_40:1;
2014 uint64_t dfa_info_clm:4;
2015 uint64_t dfa_info_dte:3;
2016 uint64_t pll_ctl:10;
2017 uint64_t reserved_58_63:6;
2018#endif
1245 } cn61xx; 2019 } cn61xx;
1246 struct cvmx_mio_fus_dat3_cn61xx cn63xx; 2020 struct cvmx_mio_fus_dat3_cn61xx cn63xx;
1247 struct cvmx_mio_fus_dat3_cn61xx cn63xxp1; 2021 struct cvmx_mio_fus_dat3_cn61xx cn63xxp1;
1248 struct cvmx_mio_fus_dat3_cn61xx cn66xx; 2022 struct cvmx_mio_fus_dat3_cn61xx cn66xx;
1249 struct cvmx_mio_fus_dat3_cn61xx cn68xx; 2023 struct cvmx_mio_fus_dat3_cn61xx cn68xx;
1250 struct cvmx_mio_fus_dat3_cn61xx cn68xxp1; 2024 struct cvmx_mio_fus_dat3_cn61xx cn68xxp1;
2025 struct cvmx_mio_fus_dat3_cn61xx cnf71xx;
1251}; 2026};
1252 2027
1253union cvmx_mio_fus_ema { 2028union cvmx_mio_fus_ema {
1254 uint64_t u64; 2029 uint64_t u64;
1255 struct cvmx_mio_fus_ema_s { 2030 struct cvmx_mio_fus_ema_s {
2031#ifdef __BIG_ENDIAN_BITFIELD
1256 uint64_t reserved_7_63:57; 2032 uint64_t reserved_7_63:57;
1257 uint64_t eff_ema:3; 2033 uint64_t eff_ema:3;
1258 uint64_t reserved_3_3:1; 2034 uint64_t reserved_3_3:1;
1259 uint64_t ema:3; 2035 uint64_t ema:3;
2036#else
2037 uint64_t ema:3;
2038 uint64_t reserved_3_3:1;
2039 uint64_t eff_ema:3;
2040 uint64_t reserved_7_63:57;
2041#endif
1260 } s; 2042 } s;
1261 struct cvmx_mio_fus_ema_s cn50xx; 2043 struct cvmx_mio_fus_ema_s cn50xx;
1262 struct cvmx_mio_fus_ema_s cn52xx; 2044 struct cvmx_mio_fus_ema_s cn52xx;
@@ -1264,8 +2046,13 @@ union cvmx_mio_fus_ema {
1264 struct cvmx_mio_fus_ema_s cn56xx; 2046 struct cvmx_mio_fus_ema_s cn56xx;
1265 struct cvmx_mio_fus_ema_s cn56xxp1; 2047 struct cvmx_mio_fus_ema_s cn56xxp1;
1266 struct cvmx_mio_fus_ema_cn58xx { 2048 struct cvmx_mio_fus_ema_cn58xx {
2049#ifdef __BIG_ENDIAN_BITFIELD
1267 uint64_t reserved_2_63:62; 2050 uint64_t reserved_2_63:62;
1268 uint64_t ema:2; 2051 uint64_t ema:2;
2052#else
2053 uint64_t ema:2;
2054 uint64_t reserved_2_63:62;
2055#endif
1269 } cn58xx; 2056 } cn58xx;
1270 struct cvmx_mio_fus_ema_cn58xx cn58xxp1; 2057 struct cvmx_mio_fus_ema_cn58xx cn58xxp1;
1271 struct cvmx_mio_fus_ema_s cn61xx; 2058 struct cvmx_mio_fus_ema_s cn61xx;
@@ -1274,12 +2061,17 @@ union cvmx_mio_fus_ema {
1274 struct cvmx_mio_fus_ema_s cn66xx; 2061 struct cvmx_mio_fus_ema_s cn66xx;
1275 struct cvmx_mio_fus_ema_s cn68xx; 2062 struct cvmx_mio_fus_ema_s cn68xx;
1276 struct cvmx_mio_fus_ema_s cn68xxp1; 2063 struct cvmx_mio_fus_ema_s cn68xxp1;
2064 struct cvmx_mio_fus_ema_s cnf71xx;
1277}; 2065};
1278 2066
1279union cvmx_mio_fus_pdf { 2067union cvmx_mio_fus_pdf {
1280 uint64_t u64; 2068 uint64_t u64;
1281 struct cvmx_mio_fus_pdf_s { 2069 struct cvmx_mio_fus_pdf_s {
2070#ifdef __BIG_ENDIAN_BITFIELD
2071 uint64_t pdf:64;
2072#else
1282 uint64_t pdf:64; 2073 uint64_t pdf:64;
2074#endif
1283 } s; 2075 } s;
1284 struct cvmx_mio_fus_pdf_s cn50xx; 2076 struct cvmx_mio_fus_pdf_s cn50xx;
1285 struct cvmx_mio_fus_pdf_s cn52xx; 2077 struct cvmx_mio_fus_pdf_s cn52xx;
@@ -1293,11 +2085,13 @@ union cvmx_mio_fus_pdf {
1293 struct cvmx_mio_fus_pdf_s cn66xx; 2085 struct cvmx_mio_fus_pdf_s cn66xx;
1294 struct cvmx_mio_fus_pdf_s cn68xx; 2086 struct cvmx_mio_fus_pdf_s cn68xx;
1295 struct cvmx_mio_fus_pdf_s cn68xxp1; 2087 struct cvmx_mio_fus_pdf_s cn68xxp1;
2088 struct cvmx_mio_fus_pdf_s cnf71xx;
1296}; 2089};
1297 2090
1298union cvmx_mio_fus_pll { 2091union cvmx_mio_fus_pll {
1299 uint64_t u64; 2092 uint64_t u64;
1300 struct cvmx_mio_fus_pll_s { 2093 struct cvmx_mio_fus_pll_s {
2094#ifdef __BIG_ENDIAN_BITFIELD
1301 uint64_t reserved_48_63:16; 2095 uint64_t reserved_48_63:16;
1302 uint64_t rclk_align_r:8; 2096 uint64_t rclk_align_r:8;
1303 uint64_t rclk_align_l:8; 2097 uint64_t rclk_align_l:8;
@@ -1308,11 +2102,29 @@ union cvmx_mio_fus_pll {
1308 uint64_t pnr_cout_sel:2; 2102 uint64_t pnr_cout_sel:2;
1309 uint64_t rfslip:1; 2103 uint64_t rfslip:1;
1310 uint64_t fbslip:1; 2104 uint64_t fbslip:1;
2105#else
2106 uint64_t fbslip:1;
2107 uint64_t rfslip:1;
2108 uint64_t pnr_cout_sel:2;
2109 uint64_t pnr_cout_rst:1;
2110 uint64_t c_cout_sel:2;
2111 uint64_t c_cout_rst:1;
2112 uint64_t reserved_8_31:24;
2113 uint64_t rclk_align_l:8;
2114 uint64_t rclk_align_r:8;
2115 uint64_t reserved_48_63:16;
2116#endif
1311 } s; 2117 } s;
1312 struct cvmx_mio_fus_pll_cn50xx { 2118 struct cvmx_mio_fus_pll_cn50xx {
2119#ifdef __BIG_ENDIAN_BITFIELD
1313 uint64_t reserved_2_63:62; 2120 uint64_t reserved_2_63:62;
1314 uint64_t rfslip:1; 2121 uint64_t rfslip:1;
1315 uint64_t fbslip:1; 2122 uint64_t fbslip:1;
2123#else
2124 uint64_t fbslip:1;
2125 uint64_t rfslip:1;
2126 uint64_t reserved_2_63:62;
2127#endif
1316 } cn50xx; 2128 } cn50xx;
1317 struct cvmx_mio_fus_pll_cn50xx cn52xx; 2129 struct cvmx_mio_fus_pll_cn50xx cn52xx;
1318 struct cvmx_mio_fus_pll_cn50xx cn52xxp1; 2130 struct cvmx_mio_fus_pll_cn50xx cn52xxp1;
@@ -1321,6 +2133,7 @@ union cvmx_mio_fus_pll {
1321 struct cvmx_mio_fus_pll_cn50xx cn58xx; 2133 struct cvmx_mio_fus_pll_cn50xx cn58xx;
1322 struct cvmx_mio_fus_pll_cn50xx cn58xxp1; 2134 struct cvmx_mio_fus_pll_cn50xx cn58xxp1;
1323 struct cvmx_mio_fus_pll_cn61xx { 2135 struct cvmx_mio_fus_pll_cn61xx {
2136#ifdef __BIG_ENDIAN_BITFIELD
1324 uint64_t reserved_8_63:56; 2137 uint64_t reserved_8_63:56;
1325 uint64_t c_cout_rst:1; 2138 uint64_t c_cout_rst:1;
1326 uint64_t c_cout_sel:2; 2139 uint64_t c_cout_sel:2;
@@ -1328,24 +2141,45 @@ union cvmx_mio_fus_pll {
1328 uint64_t pnr_cout_sel:2; 2141 uint64_t pnr_cout_sel:2;
1329 uint64_t rfslip:1; 2142 uint64_t rfslip:1;
1330 uint64_t fbslip:1; 2143 uint64_t fbslip:1;
2144#else
2145 uint64_t fbslip:1;
2146 uint64_t rfslip:1;
2147 uint64_t pnr_cout_sel:2;
2148 uint64_t pnr_cout_rst:1;
2149 uint64_t c_cout_sel:2;
2150 uint64_t c_cout_rst:1;
2151 uint64_t reserved_8_63:56;
2152#endif
1331 } cn61xx; 2153 } cn61xx;
1332 struct cvmx_mio_fus_pll_cn61xx cn63xx; 2154 struct cvmx_mio_fus_pll_cn61xx cn63xx;
1333 struct cvmx_mio_fus_pll_cn61xx cn63xxp1; 2155 struct cvmx_mio_fus_pll_cn61xx cn63xxp1;
1334 struct cvmx_mio_fus_pll_cn61xx cn66xx; 2156 struct cvmx_mio_fus_pll_cn61xx cn66xx;
1335 struct cvmx_mio_fus_pll_s cn68xx; 2157 struct cvmx_mio_fus_pll_s cn68xx;
1336 struct cvmx_mio_fus_pll_s cn68xxp1; 2158 struct cvmx_mio_fus_pll_s cn68xxp1;
2159 struct cvmx_mio_fus_pll_cn61xx cnf71xx;
1337}; 2160};
1338 2161
1339union cvmx_mio_fus_prog { 2162union cvmx_mio_fus_prog {
1340 uint64_t u64; 2163 uint64_t u64;
1341 struct cvmx_mio_fus_prog_s { 2164 struct cvmx_mio_fus_prog_s {
2165#ifdef __BIG_ENDIAN_BITFIELD
1342 uint64_t reserved_2_63:62; 2166 uint64_t reserved_2_63:62;
1343 uint64_t soft:1; 2167 uint64_t soft:1;
1344 uint64_t prog:1; 2168 uint64_t prog:1;
2169#else
2170 uint64_t prog:1;
2171 uint64_t soft:1;
2172 uint64_t reserved_2_63:62;
2173#endif
1345 } s; 2174 } s;
1346 struct cvmx_mio_fus_prog_cn30xx { 2175 struct cvmx_mio_fus_prog_cn30xx {
2176#ifdef __BIG_ENDIAN_BITFIELD
1347 uint64_t reserved_1_63:63; 2177 uint64_t reserved_1_63:63;
1348 uint64_t prog:1; 2178 uint64_t prog:1;
2179#else
2180 uint64_t prog:1;
2181 uint64_t reserved_1_63:63;
2182#endif
1349 } cn30xx; 2183 } cn30xx;
1350 struct cvmx_mio_fus_prog_cn30xx cn31xx; 2184 struct cvmx_mio_fus_prog_cn30xx cn31xx;
1351 struct cvmx_mio_fus_prog_cn30xx cn38xx; 2185 struct cvmx_mio_fus_prog_cn30xx cn38xx;
@@ -1363,25 +2197,44 @@ union cvmx_mio_fus_prog {
1363 struct cvmx_mio_fus_prog_s cn66xx; 2197 struct cvmx_mio_fus_prog_s cn66xx;
1364 struct cvmx_mio_fus_prog_s cn68xx; 2198 struct cvmx_mio_fus_prog_s cn68xx;
1365 struct cvmx_mio_fus_prog_s cn68xxp1; 2199 struct cvmx_mio_fus_prog_s cn68xxp1;
2200 struct cvmx_mio_fus_prog_s cnf71xx;
1366}; 2201};
1367 2202
1368union cvmx_mio_fus_prog_times { 2203union cvmx_mio_fus_prog_times {
1369 uint64_t u64; 2204 uint64_t u64;
1370 struct cvmx_mio_fus_prog_times_s { 2205 struct cvmx_mio_fus_prog_times_s {
2206#ifdef __BIG_ENDIAN_BITFIELD
1371 uint64_t reserved_35_63:29; 2207 uint64_t reserved_35_63:29;
1372 uint64_t vgate_pin:1; 2208 uint64_t vgate_pin:1;
1373 uint64_t fsrc_pin:1; 2209 uint64_t fsrc_pin:1;
1374 uint64_t prog_pin:1; 2210 uint64_t prog_pin:1;
1375 uint64_t reserved_6_31:26; 2211 uint64_t reserved_6_31:26;
1376 uint64_t setup:6; 2212 uint64_t setup:6;
2213#else
2214 uint64_t setup:6;
2215 uint64_t reserved_6_31:26;
2216 uint64_t prog_pin:1;
2217 uint64_t fsrc_pin:1;
2218 uint64_t vgate_pin:1;
2219 uint64_t reserved_35_63:29;
2220#endif
1377 } s; 2221 } s;
1378 struct cvmx_mio_fus_prog_times_cn50xx { 2222 struct cvmx_mio_fus_prog_times_cn50xx {
2223#ifdef __BIG_ENDIAN_BITFIELD
1379 uint64_t reserved_33_63:31; 2224 uint64_t reserved_33_63:31;
1380 uint64_t prog_pin:1; 2225 uint64_t prog_pin:1;
1381 uint64_t out:8; 2226 uint64_t out:8;
1382 uint64_t sclk_lo:4; 2227 uint64_t sclk_lo:4;
1383 uint64_t sclk_hi:12; 2228 uint64_t sclk_hi:12;
1384 uint64_t setup:8; 2229 uint64_t setup:8;
2230#else
2231 uint64_t setup:8;
2232 uint64_t sclk_hi:12;
2233 uint64_t sclk_lo:4;
2234 uint64_t out:8;
2235 uint64_t prog_pin:1;
2236 uint64_t reserved_33_63:31;
2237#endif
1385 } cn50xx; 2238 } cn50xx;
1386 struct cvmx_mio_fus_prog_times_cn50xx cn52xx; 2239 struct cvmx_mio_fus_prog_times_cn50xx cn52xx;
1387 struct cvmx_mio_fus_prog_times_cn50xx cn52xxp1; 2240 struct cvmx_mio_fus_prog_times_cn50xx cn52xxp1;
@@ -1390,6 +2243,7 @@ union cvmx_mio_fus_prog_times {
1390 struct cvmx_mio_fus_prog_times_cn50xx cn58xx; 2243 struct cvmx_mio_fus_prog_times_cn50xx cn58xx;
1391 struct cvmx_mio_fus_prog_times_cn50xx cn58xxp1; 2244 struct cvmx_mio_fus_prog_times_cn50xx cn58xxp1;
1392 struct cvmx_mio_fus_prog_times_cn61xx { 2245 struct cvmx_mio_fus_prog_times_cn61xx {
2246#ifdef __BIG_ENDIAN_BITFIELD
1393 uint64_t reserved_35_63:29; 2247 uint64_t reserved_35_63:29;
1394 uint64_t vgate_pin:1; 2248 uint64_t vgate_pin:1;
1395 uint64_t fsrc_pin:1; 2249 uint64_t fsrc_pin:1;
@@ -1398,17 +2252,29 @@ union cvmx_mio_fus_prog_times {
1398 uint64_t sclk_lo:4; 2252 uint64_t sclk_lo:4;
1399 uint64_t sclk_hi:15; 2253 uint64_t sclk_hi:15;
1400 uint64_t setup:6; 2254 uint64_t setup:6;
2255#else
2256 uint64_t setup:6;
2257 uint64_t sclk_hi:15;
2258 uint64_t sclk_lo:4;
2259 uint64_t out:7;
2260 uint64_t prog_pin:1;
2261 uint64_t fsrc_pin:1;
2262 uint64_t vgate_pin:1;
2263 uint64_t reserved_35_63:29;
2264#endif
1401 } cn61xx; 2265 } cn61xx;
1402 struct cvmx_mio_fus_prog_times_cn61xx cn63xx; 2266 struct cvmx_mio_fus_prog_times_cn61xx cn63xx;
1403 struct cvmx_mio_fus_prog_times_cn61xx cn63xxp1; 2267 struct cvmx_mio_fus_prog_times_cn61xx cn63xxp1;
1404 struct cvmx_mio_fus_prog_times_cn61xx cn66xx; 2268 struct cvmx_mio_fus_prog_times_cn61xx cn66xx;
1405 struct cvmx_mio_fus_prog_times_cn61xx cn68xx; 2269 struct cvmx_mio_fus_prog_times_cn61xx cn68xx;
1406 struct cvmx_mio_fus_prog_times_cn61xx cn68xxp1; 2270 struct cvmx_mio_fus_prog_times_cn61xx cn68xxp1;
2271 struct cvmx_mio_fus_prog_times_cn61xx cnf71xx;
1407}; 2272};
1408 2273
1409union cvmx_mio_fus_rcmd { 2274union cvmx_mio_fus_rcmd {
1410 uint64_t u64; 2275 uint64_t u64;
1411 struct cvmx_mio_fus_rcmd_s { 2276 struct cvmx_mio_fus_rcmd_s {
2277#ifdef __BIG_ENDIAN_BITFIELD
1412 uint64_t reserved_24_63:40; 2278 uint64_t reserved_24_63:40;
1413 uint64_t dat:8; 2279 uint64_t dat:8;
1414 uint64_t reserved_13_15:3; 2280 uint64_t reserved_13_15:3;
@@ -1416,8 +2282,18 @@ union cvmx_mio_fus_rcmd {
1416 uint64_t reserved_9_11:3; 2282 uint64_t reserved_9_11:3;
1417 uint64_t efuse:1; 2283 uint64_t efuse:1;
1418 uint64_t addr:8; 2284 uint64_t addr:8;
2285#else
2286 uint64_t addr:8;
2287 uint64_t efuse:1;
2288 uint64_t reserved_9_11:3;
2289 uint64_t pend:1;
2290 uint64_t reserved_13_15:3;
2291 uint64_t dat:8;
2292 uint64_t reserved_24_63:40;
2293#endif
1419 } s; 2294 } s;
1420 struct cvmx_mio_fus_rcmd_cn30xx { 2295 struct cvmx_mio_fus_rcmd_cn30xx {
2296#ifdef __BIG_ENDIAN_BITFIELD
1421 uint64_t reserved_24_63:40; 2297 uint64_t reserved_24_63:40;
1422 uint64_t dat:8; 2298 uint64_t dat:8;
1423 uint64_t reserved_13_15:3; 2299 uint64_t reserved_13_15:3;
@@ -1426,6 +2302,16 @@ union cvmx_mio_fus_rcmd {
1426 uint64_t efuse:1; 2302 uint64_t efuse:1;
1427 uint64_t reserved_7_7:1; 2303 uint64_t reserved_7_7:1;
1428 uint64_t addr:7; 2304 uint64_t addr:7;
2305#else
2306 uint64_t addr:7;
2307 uint64_t reserved_7_7:1;
2308 uint64_t efuse:1;
2309 uint64_t reserved_9_11:3;
2310 uint64_t pend:1;
2311 uint64_t reserved_13_15:3;
2312 uint64_t dat:8;
2313 uint64_t reserved_24_63:40;
2314#endif
1429 } cn30xx; 2315 } cn30xx;
1430 struct cvmx_mio_fus_rcmd_cn30xx cn31xx; 2316 struct cvmx_mio_fus_rcmd_cn30xx cn31xx;
1431 struct cvmx_mio_fus_rcmd_cn30xx cn38xx; 2317 struct cvmx_mio_fus_rcmd_cn30xx cn38xx;
@@ -1443,17 +2329,27 @@ union cvmx_mio_fus_rcmd {
1443 struct cvmx_mio_fus_rcmd_s cn66xx; 2329 struct cvmx_mio_fus_rcmd_s cn66xx;
1444 struct cvmx_mio_fus_rcmd_s cn68xx; 2330 struct cvmx_mio_fus_rcmd_s cn68xx;
1445 struct cvmx_mio_fus_rcmd_s cn68xxp1; 2331 struct cvmx_mio_fus_rcmd_s cn68xxp1;
2332 struct cvmx_mio_fus_rcmd_s cnf71xx;
1446}; 2333};
1447 2334
1448union cvmx_mio_fus_read_times { 2335union cvmx_mio_fus_read_times {
1449 uint64_t u64; 2336 uint64_t u64;
1450 struct cvmx_mio_fus_read_times_s { 2337 struct cvmx_mio_fus_read_times_s {
2338#ifdef __BIG_ENDIAN_BITFIELD
1451 uint64_t reserved_26_63:38; 2339 uint64_t reserved_26_63:38;
1452 uint64_t sch:4; 2340 uint64_t sch:4;
1453 uint64_t fsh:4; 2341 uint64_t fsh:4;
1454 uint64_t prh:4; 2342 uint64_t prh:4;
1455 uint64_t sdh:4; 2343 uint64_t sdh:4;
1456 uint64_t setup:10; 2344 uint64_t setup:10;
2345#else
2346 uint64_t setup:10;
2347 uint64_t sdh:4;
2348 uint64_t prh:4;
2349 uint64_t fsh:4;
2350 uint64_t sch:4;
2351 uint64_t reserved_26_63:38;
2352#endif
1457 } s; 2353 } s;
1458 struct cvmx_mio_fus_read_times_s cn61xx; 2354 struct cvmx_mio_fus_read_times_s cn61xx;
1459 struct cvmx_mio_fus_read_times_s cn63xx; 2355 struct cvmx_mio_fus_read_times_s cn63xx;
@@ -1461,16 +2357,25 @@ union cvmx_mio_fus_read_times {
1461 struct cvmx_mio_fus_read_times_s cn66xx; 2357 struct cvmx_mio_fus_read_times_s cn66xx;
1462 struct cvmx_mio_fus_read_times_s cn68xx; 2358 struct cvmx_mio_fus_read_times_s cn68xx;
1463 struct cvmx_mio_fus_read_times_s cn68xxp1; 2359 struct cvmx_mio_fus_read_times_s cn68xxp1;
2360 struct cvmx_mio_fus_read_times_s cnf71xx;
1464}; 2361};
1465 2362
1466union cvmx_mio_fus_repair_res0 { 2363union cvmx_mio_fus_repair_res0 {
1467 uint64_t u64; 2364 uint64_t u64;
1468 struct cvmx_mio_fus_repair_res0_s { 2365 struct cvmx_mio_fus_repair_res0_s {
2366#ifdef __BIG_ENDIAN_BITFIELD
1469 uint64_t reserved_55_63:9; 2367 uint64_t reserved_55_63:9;
1470 uint64_t too_many:1; 2368 uint64_t too_many:1;
1471 uint64_t repair2:18; 2369 uint64_t repair2:18;
1472 uint64_t repair1:18; 2370 uint64_t repair1:18;
1473 uint64_t repair0:18; 2371 uint64_t repair0:18;
2372#else
2373 uint64_t repair0:18;
2374 uint64_t repair1:18;
2375 uint64_t repair2:18;
2376 uint64_t too_many:1;
2377 uint64_t reserved_55_63:9;
2378#endif
1474 } s; 2379 } s;
1475 struct cvmx_mio_fus_repair_res0_s cn61xx; 2380 struct cvmx_mio_fus_repair_res0_s cn61xx;
1476 struct cvmx_mio_fus_repair_res0_s cn63xx; 2381 struct cvmx_mio_fus_repair_res0_s cn63xx;
@@ -1478,15 +2383,23 @@ union cvmx_mio_fus_repair_res0 {
1478 struct cvmx_mio_fus_repair_res0_s cn66xx; 2383 struct cvmx_mio_fus_repair_res0_s cn66xx;
1479 struct cvmx_mio_fus_repair_res0_s cn68xx; 2384 struct cvmx_mio_fus_repair_res0_s cn68xx;
1480 struct cvmx_mio_fus_repair_res0_s cn68xxp1; 2385 struct cvmx_mio_fus_repair_res0_s cn68xxp1;
2386 struct cvmx_mio_fus_repair_res0_s cnf71xx;
1481}; 2387};
1482 2388
1483union cvmx_mio_fus_repair_res1 { 2389union cvmx_mio_fus_repair_res1 {
1484 uint64_t u64; 2390 uint64_t u64;
1485 struct cvmx_mio_fus_repair_res1_s { 2391 struct cvmx_mio_fus_repair_res1_s {
2392#ifdef __BIG_ENDIAN_BITFIELD
1486 uint64_t reserved_54_63:10; 2393 uint64_t reserved_54_63:10;
1487 uint64_t repair5:18; 2394 uint64_t repair5:18;
1488 uint64_t repair4:18; 2395 uint64_t repair4:18;
1489 uint64_t repair3:18; 2396 uint64_t repair3:18;
2397#else
2398 uint64_t repair3:18;
2399 uint64_t repair4:18;
2400 uint64_t repair5:18;
2401 uint64_t reserved_54_63:10;
2402#endif
1490 } s; 2403 } s;
1491 struct cvmx_mio_fus_repair_res1_s cn61xx; 2404 struct cvmx_mio_fus_repair_res1_s cn61xx;
1492 struct cvmx_mio_fus_repair_res1_s cn63xx; 2405 struct cvmx_mio_fus_repair_res1_s cn63xx;
@@ -1494,13 +2407,19 @@ union cvmx_mio_fus_repair_res1 {
1494 struct cvmx_mio_fus_repair_res1_s cn66xx; 2407 struct cvmx_mio_fus_repair_res1_s cn66xx;
1495 struct cvmx_mio_fus_repair_res1_s cn68xx; 2408 struct cvmx_mio_fus_repair_res1_s cn68xx;
1496 struct cvmx_mio_fus_repair_res1_s cn68xxp1; 2409 struct cvmx_mio_fus_repair_res1_s cn68xxp1;
2410 struct cvmx_mio_fus_repair_res1_s cnf71xx;
1497}; 2411};
1498 2412
1499union cvmx_mio_fus_repair_res2 { 2413union cvmx_mio_fus_repair_res2 {
1500 uint64_t u64; 2414 uint64_t u64;
1501 struct cvmx_mio_fus_repair_res2_s { 2415 struct cvmx_mio_fus_repair_res2_s {
2416#ifdef __BIG_ENDIAN_BITFIELD
1502 uint64_t reserved_18_63:46; 2417 uint64_t reserved_18_63:46;
1503 uint64_t repair6:18; 2418 uint64_t repair6:18;
2419#else
2420 uint64_t repair6:18;
2421 uint64_t reserved_18_63:46;
2422#endif
1504 } s; 2423 } s;
1505 struct cvmx_mio_fus_repair_res2_s cn61xx; 2424 struct cvmx_mio_fus_repair_res2_s cn61xx;
1506 struct cvmx_mio_fus_repair_res2_s cn63xx; 2425 struct cvmx_mio_fus_repair_res2_s cn63xx;
@@ -1508,15 +2427,23 @@ union cvmx_mio_fus_repair_res2 {
1508 struct cvmx_mio_fus_repair_res2_s cn66xx; 2427 struct cvmx_mio_fus_repair_res2_s cn66xx;
1509 struct cvmx_mio_fus_repair_res2_s cn68xx; 2428 struct cvmx_mio_fus_repair_res2_s cn68xx;
1510 struct cvmx_mio_fus_repair_res2_s cn68xxp1; 2429 struct cvmx_mio_fus_repair_res2_s cn68xxp1;
2430 struct cvmx_mio_fus_repair_res2_s cnf71xx;
1511}; 2431};
1512 2432
1513union cvmx_mio_fus_spr_repair_res { 2433union cvmx_mio_fus_spr_repair_res {
1514 uint64_t u64; 2434 uint64_t u64;
1515 struct cvmx_mio_fus_spr_repair_res_s { 2435 struct cvmx_mio_fus_spr_repair_res_s {
2436#ifdef __BIG_ENDIAN_BITFIELD
1516 uint64_t reserved_42_63:22; 2437 uint64_t reserved_42_63:22;
1517 uint64_t repair2:14; 2438 uint64_t repair2:14;
1518 uint64_t repair1:14; 2439 uint64_t repair1:14;
1519 uint64_t repair0:14; 2440 uint64_t repair0:14;
2441#else
2442 uint64_t repair0:14;
2443 uint64_t repair1:14;
2444 uint64_t repair2:14;
2445 uint64_t reserved_42_63:22;
2446#endif
1520 } s; 2447 } s;
1521 struct cvmx_mio_fus_spr_repair_res_s cn30xx; 2448 struct cvmx_mio_fus_spr_repair_res_s cn30xx;
1522 struct cvmx_mio_fus_spr_repair_res_s cn31xx; 2449 struct cvmx_mio_fus_spr_repair_res_s cn31xx;
@@ -1534,13 +2461,19 @@ union cvmx_mio_fus_spr_repair_res {
1534 struct cvmx_mio_fus_spr_repair_res_s cn66xx; 2461 struct cvmx_mio_fus_spr_repair_res_s cn66xx;
1535 struct cvmx_mio_fus_spr_repair_res_s cn68xx; 2462 struct cvmx_mio_fus_spr_repair_res_s cn68xx;
1536 struct cvmx_mio_fus_spr_repair_res_s cn68xxp1; 2463 struct cvmx_mio_fus_spr_repair_res_s cn68xxp1;
2464 struct cvmx_mio_fus_spr_repair_res_s cnf71xx;
1537}; 2465};
1538 2466
1539union cvmx_mio_fus_spr_repair_sum { 2467union cvmx_mio_fus_spr_repair_sum {
1540 uint64_t u64; 2468 uint64_t u64;
1541 struct cvmx_mio_fus_spr_repair_sum_s { 2469 struct cvmx_mio_fus_spr_repair_sum_s {
2470#ifdef __BIG_ENDIAN_BITFIELD
1542 uint64_t reserved_1_63:63; 2471 uint64_t reserved_1_63:63;
1543 uint64_t too_many:1; 2472 uint64_t too_many:1;
2473#else
2474 uint64_t too_many:1;
2475 uint64_t reserved_1_63:63;
2476#endif
1544 } s; 2477 } s;
1545 struct cvmx_mio_fus_spr_repair_sum_s cn30xx; 2478 struct cvmx_mio_fus_spr_repair_sum_s cn30xx;
1546 struct cvmx_mio_fus_spr_repair_sum_s cn31xx; 2479 struct cvmx_mio_fus_spr_repair_sum_s cn31xx;
@@ -1558,23 +2491,35 @@ union cvmx_mio_fus_spr_repair_sum {
1558 struct cvmx_mio_fus_spr_repair_sum_s cn66xx; 2491 struct cvmx_mio_fus_spr_repair_sum_s cn66xx;
1559 struct cvmx_mio_fus_spr_repair_sum_s cn68xx; 2492 struct cvmx_mio_fus_spr_repair_sum_s cn68xx;
1560 struct cvmx_mio_fus_spr_repair_sum_s cn68xxp1; 2493 struct cvmx_mio_fus_spr_repair_sum_s cn68xxp1;
2494 struct cvmx_mio_fus_spr_repair_sum_s cnf71xx;
1561}; 2495};
1562 2496
1563union cvmx_mio_fus_tgg { 2497union cvmx_mio_fus_tgg {
1564 uint64_t u64; 2498 uint64_t u64;
1565 struct cvmx_mio_fus_tgg_s { 2499 struct cvmx_mio_fus_tgg_s {
2500#ifdef __BIG_ENDIAN_BITFIELD
1566 uint64_t val:1; 2501 uint64_t val:1;
1567 uint64_t dat:63; 2502 uint64_t dat:63;
2503#else
2504 uint64_t dat:63;
2505 uint64_t val:1;
2506#endif
1568 } s; 2507 } s;
1569 struct cvmx_mio_fus_tgg_s cn61xx; 2508 struct cvmx_mio_fus_tgg_s cn61xx;
1570 struct cvmx_mio_fus_tgg_s cn66xx; 2509 struct cvmx_mio_fus_tgg_s cn66xx;
2510 struct cvmx_mio_fus_tgg_s cnf71xx;
1571}; 2511};
1572 2512
1573union cvmx_mio_fus_unlock { 2513union cvmx_mio_fus_unlock {
1574 uint64_t u64; 2514 uint64_t u64;
1575 struct cvmx_mio_fus_unlock_s { 2515 struct cvmx_mio_fus_unlock_s {
2516#ifdef __BIG_ENDIAN_BITFIELD
1576 uint64_t reserved_24_63:40; 2517 uint64_t reserved_24_63:40;
1577 uint64_t key:24; 2518 uint64_t key:24;
2519#else
2520 uint64_t key:24;
2521 uint64_t reserved_24_63:40;
2522#endif
1578 } s; 2523 } s;
1579 struct cvmx_mio_fus_unlock_s cn30xx; 2524 struct cvmx_mio_fus_unlock_s cn30xx;
1580 struct cvmx_mio_fus_unlock_s cn31xx; 2525 struct cvmx_mio_fus_unlock_s cn31xx;
@@ -1583,20 +2528,35 @@ union cvmx_mio_fus_unlock {
1583union cvmx_mio_fus_wadr { 2528union cvmx_mio_fus_wadr {
1584 uint64_t u64; 2529 uint64_t u64;
1585 struct cvmx_mio_fus_wadr_s { 2530 struct cvmx_mio_fus_wadr_s {
2531#ifdef __BIG_ENDIAN_BITFIELD
1586 uint64_t reserved_10_63:54; 2532 uint64_t reserved_10_63:54;
1587 uint64_t addr:10; 2533 uint64_t addr:10;
2534#else
2535 uint64_t addr:10;
2536 uint64_t reserved_10_63:54;
2537#endif
1588 } s; 2538 } s;
1589 struct cvmx_mio_fus_wadr_s cn30xx; 2539 struct cvmx_mio_fus_wadr_s cn30xx;
1590 struct cvmx_mio_fus_wadr_s cn31xx; 2540 struct cvmx_mio_fus_wadr_s cn31xx;
1591 struct cvmx_mio_fus_wadr_s cn38xx; 2541 struct cvmx_mio_fus_wadr_s cn38xx;
1592 struct cvmx_mio_fus_wadr_s cn38xxp2; 2542 struct cvmx_mio_fus_wadr_s cn38xxp2;
1593 struct cvmx_mio_fus_wadr_cn50xx { 2543 struct cvmx_mio_fus_wadr_cn50xx {
2544#ifdef __BIG_ENDIAN_BITFIELD
1594 uint64_t reserved_2_63:62; 2545 uint64_t reserved_2_63:62;
1595 uint64_t addr:2; 2546 uint64_t addr:2;
2547#else
2548 uint64_t addr:2;
2549 uint64_t reserved_2_63:62;
2550#endif
1596 } cn50xx; 2551 } cn50xx;
1597 struct cvmx_mio_fus_wadr_cn52xx { 2552 struct cvmx_mio_fus_wadr_cn52xx {
2553#ifdef __BIG_ENDIAN_BITFIELD
1598 uint64_t reserved_3_63:61; 2554 uint64_t reserved_3_63:61;
1599 uint64_t addr:3; 2555 uint64_t addr:3;
2556#else
2557 uint64_t addr:3;
2558 uint64_t reserved_3_63:61;
2559#endif
1600 } cn52xx; 2560 } cn52xx;
1601 struct cvmx_mio_fus_wadr_cn52xx cn52xxp1; 2561 struct cvmx_mio_fus_wadr_cn52xx cn52xxp1;
1602 struct cvmx_mio_fus_wadr_cn52xx cn56xx; 2562 struct cvmx_mio_fus_wadr_cn52xx cn56xx;
@@ -1604,22 +2564,34 @@ union cvmx_mio_fus_wadr {
1604 struct cvmx_mio_fus_wadr_cn50xx cn58xx; 2564 struct cvmx_mio_fus_wadr_cn50xx cn58xx;
1605 struct cvmx_mio_fus_wadr_cn50xx cn58xxp1; 2565 struct cvmx_mio_fus_wadr_cn50xx cn58xxp1;
1606 struct cvmx_mio_fus_wadr_cn61xx { 2566 struct cvmx_mio_fus_wadr_cn61xx {
2567#ifdef __BIG_ENDIAN_BITFIELD
1607 uint64_t reserved_4_63:60; 2568 uint64_t reserved_4_63:60;
1608 uint64_t addr:4; 2569 uint64_t addr:4;
2570#else
2571 uint64_t addr:4;
2572 uint64_t reserved_4_63:60;
2573#endif
1609 } cn61xx; 2574 } cn61xx;
1610 struct cvmx_mio_fus_wadr_cn61xx cn63xx; 2575 struct cvmx_mio_fus_wadr_cn61xx cn63xx;
1611 struct cvmx_mio_fus_wadr_cn61xx cn63xxp1; 2576 struct cvmx_mio_fus_wadr_cn61xx cn63xxp1;
1612 struct cvmx_mio_fus_wadr_cn61xx cn66xx; 2577 struct cvmx_mio_fus_wadr_cn61xx cn66xx;
1613 struct cvmx_mio_fus_wadr_cn61xx cn68xx; 2578 struct cvmx_mio_fus_wadr_cn61xx cn68xx;
1614 struct cvmx_mio_fus_wadr_cn61xx cn68xxp1; 2579 struct cvmx_mio_fus_wadr_cn61xx cn68xxp1;
2580 struct cvmx_mio_fus_wadr_cn61xx cnf71xx;
1615}; 2581};
1616 2582
1617union cvmx_mio_gpio_comp { 2583union cvmx_mio_gpio_comp {
1618 uint64_t u64; 2584 uint64_t u64;
1619 struct cvmx_mio_gpio_comp_s { 2585 struct cvmx_mio_gpio_comp_s {
2586#ifdef __BIG_ENDIAN_BITFIELD
1620 uint64_t reserved_12_63:52; 2587 uint64_t reserved_12_63:52;
1621 uint64_t pctl:6; 2588 uint64_t pctl:6;
1622 uint64_t nctl:6; 2589 uint64_t nctl:6;
2590#else
2591 uint64_t nctl:6;
2592 uint64_t pctl:6;
2593 uint64_t reserved_12_63:52;
2594#endif
1623 } s; 2595 } s;
1624 struct cvmx_mio_gpio_comp_s cn61xx; 2596 struct cvmx_mio_gpio_comp_s cn61xx;
1625 struct cvmx_mio_gpio_comp_s cn63xx; 2597 struct cvmx_mio_gpio_comp_s cn63xx;
@@ -1627,11 +2599,13 @@ union cvmx_mio_gpio_comp {
1627 struct cvmx_mio_gpio_comp_s cn66xx; 2599 struct cvmx_mio_gpio_comp_s cn66xx;
1628 struct cvmx_mio_gpio_comp_s cn68xx; 2600 struct cvmx_mio_gpio_comp_s cn68xx;
1629 struct cvmx_mio_gpio_comp_s cn68xxp1; 2601 struct cvmx_mio_gpio_comp_s cn68xxp1;
2602 struct cvmx_mio_gpio_comp_s cnf71xx;
1630}; 2603};
1631 2604
1632union cvmx_mio_ndf_dma_cfg { 2605union cvmx_mio_ndf_dma_cfg {
1633 uint64_t u64; 2606 uint64_t u64;
1634 struct cvmx_mio_ndf_dma_cfg_s { 2607 struct cvmx_mio_ndf_dma_cfg_s {
2608#ifdef __BIG_ENDIAN_BITFIELD
1635 uint64_t en:1; 2609 uint64_t en:1;
1636 uint64_t rw:1; 2610 uint64_t rw:1;
1637 uint64_t clr:1; 2611 uint64_t clr:1;
@@ -1642,6 +2616,18 @@ union cvmx_mio_ndf_dma_cfg {
1642 uint64_t endian:1; 2616 uint64_t endian:1;
1643 uint64_t size:20; 2617 uint64_t size:20;
1644 uint64_t adr:36; 2618 uint64_t adr:36;
2619#else
2620 uint64_t adr:36;
2621 uint64_t size:20;
2622 uint64_t endian:1;
2623 uint64_t swap8:1;
2624 uint64_t swap16:1;
2625 uint64_t swap32:1;
2626 uint64_t reserved_60_60:1;
2627 uint64_t clr:1;
2628 uint64_t rw:1;
2629 uint64_t en:1;
2630#endif
1645 } s; 2631 } s;
1646 struct cvmx_mio_ndf_dma_cfg_s cn52xx; 2632 struct cvmx_mio_ndf_dma_cfg_s cn52xx;
1647 struct cvmx_mio_ndf_dma_cfg_s cn61xx; 2633 struct cvmx_mio_ndf_dma_cfg_s cn61xx;
@@ -1650,13 +2636,19 @@ union cvmx_mio_ndf_dma_cfg {
1650 struct cvmx_mio_ndf_dma_cfg_s cn66xx; 2636 struct cvmx_mio_ndf_dma_cfg_s cn66xx;
1651 struct cvmx_mio_ndf_dma_cfg_s cn68xx; 2637 struct cvmx_mio_ndf_dma_cfg_s cn68xx;
1652 struct cvmx_mio_ndf_dma_cfg_s cn68xxp1; 2638 struct cvmx_mio_ndf_dma_cfg_s cn68xxp1;
2639 struct cvmx_mio_ndf_dma_cfg_s cnf71xx;
1653}; 2640};
1654 2641
1655union cvmx_mio_ndf_dma_int { 2642union cvmx_mio_ndf_dma_int {
1656 uint64_t u64; 2643 uint64_t u64;
1657 struct cvmx_mio_ndf_dma_int_s { 2644 struct cvmx_mio_ndf_dma_int_s {
2645#ifdef __BIG_ENDIAN_BITFIELD
1658 uint64_t reserved_1_63:63; 2646 uint64_t reserved_1_63:63;
1659 uint64_t done:1; 2647 uint64_t done:1;
2648#else
2649 uint64_t done:1;
2650 uint64_t reserved_1_63:63;
2651#endif
1660 } s; 2652 } s;
1661 struct cvmx_mio_ndf_dma_int_s cn52xx; 2653 struct cvmx_mio_ndf_dma_int_s cn52xx;
1662 struct cvmx_mio_ndf_dma_int_s cn61xx; 2654 struct cvmx_mio_ndf_dma_int_s cn61xx;
@@ -1665,13 +2657,19 @@ union cvmx_mio_ndf_dma_int {
1665 struct cvmx_mio_ndf_dma_int_s cn66xx; 2657 struct cvmx_mio_ndf_dma_int_s cn66xx;
1666 struct cvmx_mio_ndf_dma_int_s cn68xx; 2658 struct cvmx_mio_ndf_dma_int_s cn68xx;
1667 struct cvmx_mio_ndf_dma_int_s cn68xxp1; 2659 struct cvmx_mio_ndf_dma_int_s cn68xxp1;
2660 struct cvmx_mio_ndf_dma_int_s cnf71xx;
1668}; 2661};
1669 2662
1670union cvmx_mio_ndf_dma_int_en { 2663union cvmx_mio_ndf_dma_int_en {
1671 uint64_t u64; 2664 uint64_t u64;
1672 struct cvmx_mio_ndf_dma_int_en_s { 2665 struct cvmx_mio_ndf_dma_int_en_s {
2666#ifdef __BIG_ENDIAN_BITFIELD
1673 uint64_t reserved_1_63:63; 2667 uint64_t reserved_1_63:63;
1674 uint64_t done:1; 2668 uint64_t done:1;
2669#else
2670 uint64_t done:1;
2671 uint64_t reserved_1_63:63;
2672#endif
1675 } s; 2673 } s;
1676 struct cvmx_mio_ndf_dma_int_en_s cn52xx; 2674 struct cvmx_mio_ndf_dma_int_en_s cn52xx;
1677 struct cvmx_mio_ndf_dma_int_en_s cn61xx; 2675 struct cvmx_mio_ndf_dma_int_en_s cn61xx;
@@ -1680,13 +2678,19 @@ union cvmx_mio_ndf_dma_int_en {
1680 struct cvmx_mio_ndf_dma_int_en_s cn66xx; 2678 struct cvmx_mio_ndf_dma_int_en_s cn66xx;
1681 struct cvmx_mio_ndf_dma_int_en_s cn68xx; 2679 struct cvmx_mio_ndf_dma_int_en_s cn68xx;
1682 struct cvmx_mio_ndf_dma_int_en_s cn68xxp1; 2680 struct cvmx_mio_ndf_dma_int_en_s cn68xxp1;
2681 struct cvmx_mio_ndf_dma_int_en_s cnf71xx;
1683}; 2682};
1684 2683
1685union cvmx_mio_pll_ctl { 2684union cvmx_mio_pll_ctl {
1686 uint64_t u64; 2685 uint64_t u64;
1687 struct cvmx_mio_pll_ctl_s { 2686 struct cvmx_mio_pll_ctl_s {
2687#ifdef __BIG_ENDIAN_BITFIELD
1688 uint64_t reserved_5_63:59; 2688 uint64_t reserved_5_63:59;
1689 uint64_t bw_ctl:5; 2689 uint64_t bw_ctl:5;
2690#else
2691 uint64_t bw_ctl:5;
2692 uint64_t reserved_5_63:59;
2693#endif
1690 } s; 2694 } s;
1691 struct cvmx_mio_pll_ctl_s cn30xx; 2695 struct cvmx_mio_pll_ctl_s cn30xx;
1692 struct cvmx_mio_pll_ctl_s cn31xx; 2696 struct cvmx_mio_pll_ctl_s cn31xx;
@@ -1695,8 +2699,13 @@ union cvmx_mio_pll_ctl {
1695union cvmx_mio_pll_setting { 2699union cvmx_mio_pll_setting {
1696 uint64_t u64; 2700 uint64_t u64;
1697 struct cvmx_mio_pll_setting_s { 2701 struct cvmx_mio_pll_setting_s {
2702#ifdef __BIG_ENDIAN_BITFIELD
1698 uint64_t reserved_17_63:47; 2703 uint64_t reserved_17_63:47;
1699 uint64_t setting:17; 2704 uint64_t setting:17;
2705#else
2706 uint64_t setting:17;
2707 uint64_t reserved_17_63:47;
2708#endif
1700 } s; 2709 } s;
1701 struct cvmx_mio_pll_setting_s cn30xx; 2710 struct cvmx_mio_pll_setting_s cn30xx;
1702 struct cvmx_mio_pll_setting_s cn31xx; 2711 struct cvmx_mio_pll_setting_s cn31xx;
@@ -1705,49 +2714,73 @@ union cvmx_mio_pll_setting {
1705union cvmx_mio_ptp_ckout_hi_incr { 2714union cvmx_mio_ptp_ckout_hi_incr {
1706 uint64_t u64; 2715 uint64_t u64;
1707 struct cvmx_mio_ptp_ckout_hi_incr_s { 2716 struct cvmx_mio_ptp_ckout_hi_incr_s {
2717#ifdef __BIG_ENDIAN_BITFIELD
1708 uint64_t nanosec:32; 2718 uint64_t nanosec:32;
1709 uint64_t frnanosec:32; 2719 uint64_t frnanosec:32;
2720#else
2721 uint64_t frnanosec:32;
2722 uint64_t nanosec:32;
2723#endif
1710 } s; 2724 } s;
1711 struct cvmx_mio_ptp_ckout_hi_incr_s cn61xx; 2725 struct cvmx_mio_ptp_ckout_hi_incr_s cn61xx;
1712 struct cvmx_mio_ptp_ckout_hi_incr_s cn66xx; 2726 struct cvmx_mio_ptp_ckout_hi_incr_s cn66xx;
1713 struct cvmx_mio_ptp_ckout_hi_incr_s cn68xx; 2727 struct cvmx_mio_ptp_ckout_hi_incr_s cn68xx;
2728 struct cvmx_mio_ptp_ckout_hi_incr_s cnf71xx;
1714}; 2729};
1715 2730
1716union cvmx_mio_ptp_ckout_lo_incr { 2731union cvmx_mio_ptp_ckout_lo_incr {
1717 uint64_t u64; 2732 uint64_t u64;
1718 struct cvmx_mio_ptp_ckout_lo_incr_s { 2733 struct cvmx_mio_ptp_ckout_lo_incr_s {
2734#ifdef __BIG_ENDIAN_BITFIELD
1719 uint64_t nanosec:32; 2735 uint64_t nanosec:32;
1720 uint64_t frnanosec:32; 2736 uint64_t frnanosec:32;
2737#else
2738 uint64_t frnanosec:32;
2739 uint64_t nanosec:32;
2740#endif
1721 } s; 2741 } s;
1722 struct cvmx_mio_ptp_ckout_lo_incr_s cn61xx; 2742 struct cvmx_mio_ptp_ckout_lo_incr_s cn61xx;
1723 struct cvmx_mio_ptp_ckout_lo_incr_s cn66xx; 2743 struct cvmx_mio_ptp_ckout_lo_incr_s cn66xx;
1724 struct cvmx_mio_ptp_ckout_lo_incr_s cn68xx; 2744 struct cvmx_mio_ptp_ckout_lo_incr_s cn68xx;
2745 struct cvmx_mio_ptp_ckout_lo_incr_s cnf71xx;
1725}; 2746};
1726 2747
1727union cvmx_mio_ptp_ckout_thresh_hi { 2748union cvmx_mio_ptp_ckout_thresh_hi {
1728 uint64_t u64; 2749 uint64_t u64;
1729 struct cvmx_mio_ptp_ckout_thresh_hi_s { 2750 struct cvmx_mio_ptp_ckout_thresh_hi_s {
2751#ifdef __BIG_ENDIAN_BITFIELD
2752 uint64_t nanosec:64;
2753#else
1730 uint64_t nanosec:64; 2754 uint64_t nanosec:64;
2755#endif
1731 } s; 2756 } s;
1732 struct cvmx_mio_ptp_ckout_thresh_hi_s cn61xx; 2757 struct cvmx_mio_ptp_ckout_thresh_hi_s cn61xx;
1733 struct cvmx_mio_ptp_ckout_thresh_hi_s cn66xx; 2758 struct cvmx_mio_ptp_ckout_thresh_hi_s cn66xx;
1734 struct cvmx_mio_ptp_ckout_thresh_hi_s cn68xx; 2759 struct cvmx_mio_ptp_ckout_thresh_hi_s cn68xx;
2760 struct cvmx_mio_ptp_ckout_thresh_hi_s cnf71xx;
1735}; 2761};
1736 2762
1737union cvmx_mio_ptp_ckout_thresh_lo { 2763union cvmx_mio_ptp_ckout_thresh_lo {
1738 uint64_t u64; 2764 uint64_t u64;
1739 struct cvmx_mio_ptp_ckout_thresh_lo_s { 2765 struct cvmx_mio_ptp_ckout_thresh_lo_s {
2766#ifdef __BIG_ENDIAN_BITFIELD
1740 uint64_t reserved_32_63:32; 2767 uint64_t reserved_32_63:32;
1741 uint64_t frnanosec:32; 2768 uint64_t frnanosec:32;
2769#else
2770 uint64_t frnanosec:32;
2771 uint64_t reserved_32_63:32;
2772#endif
1742 } s; 2773 } s;
1743 struct cvmx_mio_ptp_ckout_thresh_lo_s cn61xx; 2774 struct cvmx_mio_ptp_ckout_thresh_lo_s cn61xx;
1744 struct cvmx_mio_ptp_ckout_thresh_lo_s cn66xx; 2775 struct cvmx_mio_ptp_ckout_thresh_lo_s cn66xx;
1745 struct cvmx_mio_ptp_ckout_thresh_lo_s cn68xx; 2776 struct cvmx_mio_ptp_ckout_thresh_lo_s cn68xx;
2777 struct cvmx_mio_ptp_ckout_thresh_lo_s cnf71xx;
1746}; 2778};
1747 2779
1748union cvmx_mio_ptp_clock_cfg { 2780union cvmx_mio_ptp_clock_cfg {
1749 uint64_t u64; 2781 uint64_t u64;
1750 struct cvmx_mio_ptp_clock_cfg_s { 2782 struct cvmx_mio_ptp_clock_cfg_s {
2783#ifdef __BIG_ENDIAN_BITFIELD
1751 uint64_t reserved_42_63:22; 2784 uint64_t reserved_42_63:22;
1752 uint64_t pps:1; 2785 uint64_t pps:1;
1753 uint64_t ckout:1; 2786 uint64_t ckout:1;
@@ -1768,9 +2801,32 @@ union cvmx_mio_ptp_clock_cfg {
1768 uint64_t ext_clk_in:6; 2801 uint64_t ext_clk_in:6;
1769 uint64_t ext_clk_en:1; 2802 uint64_t ext_clk_en:1;
1770 uint64_t ptp_en:1; 2803 uint64_t ptp_en:1;
2804#else
2805 uint64_t ptp_en:1;
2806 uint64_t ext_clk_en:1;
2807 uint64_t ext_clk_in:6;
2808 uint64_t tstmp_en:1;
2809 uint64_t tstmp_edge:1;
2810 uint64_t tstmp_in:6;
2811 uint64_t evcnt_en:1;
2812 uint64_t evcnt_edge:1;
2813 uint64_t evcnt_in:6;
2814 uint64_t ckout_en:1;
2815 uint64_t ckout_inv:1;
2816 uint64_t ckout_out:4;
2817 uint64_t pps_en:1;
2818 uint64_t pps_inv:1;
2819 uint64_t pps_out:5;
2820 uint64_t ckout_out4:1;
2821 uint64_t ext_clk_edge:2;
2822 uint64_t ckout:1;
2823 uint64_t pps:1;
2824 uint64_t reserved_42_63:22;
2825#endif
1771 } s; 2826 } s;
1772 struct cvmx_mio_ptp_clock_cfg_s cn61xx; 2827 struct cvmx_mio_ptp_clock_cfg_s cn61xx;
1773 struct cvmx_mio_ptp_clock_cfg_cn63xx { 2828 struct cvmx_mio_ptp_clock_cfg_cn63xx {
2829#ifdef __BIG_ENDIAN_BITFIELD
1774 uint64_t reserved_24_63:40; 2830 uint64_t reserved_24_63:40;
1775 uint64_t evcnt_in:6; 2831 uint64_t evcnt_in:6;
1776 uint64_t evcnt_edge:1; 2832 uint64_t evcnt_edge:1;
@@ -1781,9 +2837,22 @@ union cvmx_mio_ptp_clock_cfg {
1781 uint64_t ext_clk_in:6; 2837 uint64_t ext_clk_in:6;
1782 uint64_t ext_clk_en:1; 2838 uint64_t ext_clk_en:1;
1783 uint64_t ptp_en:1; 2839 uint64_t ptp_en:1;
2840#else
2841 uint64_t ptp_en:1;
2842 uint64_t ext_clk_en:1;
2843 uint64_t ext_clk_in:6;
2844 uint64_t tstmp_en:1;
2845 uint64_t tstmp_edge:1;
2846 uint64_t tstmp_in:6;
2847 uint64_t evcnt_en:1;
2848 uint64_t evcnt_edge:1;
2849 uint64_t evcnt_in:6;
2850 uint64_t reserved_24_63:40;
2851#endif
1784 } cn63xx; 2852 } cn63xx;
1785 struct cvmx_mio_ptp_clock_cfg_cn63xx cn63xxp1; 2853 struct cvmx_mio_ptp_clock_cfg_cn63xx cn63xxp1;
1786 struct cvmx_mio_ptp_clock_cfg_cn66xx { 2854 struct cvmx_mio_ptp_clock_cfg_cn66xx {
2855#ifdef __BIG_ENDIAN_BITFIELD
1787 uint64_t reserved_40_63:24; 2856 uint64_t reserved_40_63:24;
1788 uint64_t ext_clk_edge:2; 2857 uint64_t ext_clk_edge:2;
1789 uint64_t ckout_out4:1; 2858 uint64_t ckout_out4:1;
@@ -1802,16 +2871,42 @@ union cvmx_mio_ptp_clock_cfg {
1802 uint64_t ext_clk_in:6; 2871 uint64_t ext_clk_in:6;
1803 uint64_t ext_clk_en:1; 2872 uint64_t ext_clk_en:1;
1804 uint64_t ptp_en:1; 2873 uint64_t ptp_en:1;
2874#else
2875 uint64_t ptp_en:1;
2876 uint64_t ext_clk_en:1;
2877 uint64_t ext_clk_in:6;
2878 uint64_t tstmp_en:1;
2879 uint64_t tstmp_edge:1;
2880 uint64_t tstmp_in:6;
2881 uint64_t evcnt_en:1;
2882 uint64_t evcnt_edge:1;
2883 uint64_t evcnt_in:6;
2884 uint64_t ckout_en:1;
2885 uint64_t ckout_inv:1;
2886 uint64_t ckout_out:4;
2887 uint64_t pps_en:1;
2888 uint64_t pps_inv:1;
2889 uint64_t pps_out:5;
2890 uint64_t ckout_out4:1;
2891 uint64_t ext_clk_edge:2;
2892 uint64_t reserved_40_63:24;
2893#endif
1805 } cn66xx; 2894 } cn66xx;
1806 struct cvmx_mio_ptp_clock_cfg_s cn68xx; 2895 struct cvmx_mio_ptp_clock_cfg_s cn68xx;
1807 struct cvmx_mio_ptp_clock_cfg_cn63xx cn68xxp1; 2896 struct cvmx_mio_ptp_clock_cfg_cn63xx cn68xxp1;
2897 struct cvmx_mio_ptp_clock_cfg_s cnf71xx;
1808}; 2898};
1809 2899
1810union cvmx_mio_ptp_clock_comp { 2900union cvmx_mio_ptp_clock_comp {
1811 uint64_t u64; 2901 uint64_t u64;
1812 struct cvmx_mio_ptp_clock_comp_s { 2902 struct cvmx_mio_ptp_clock_comp_s {
2903#ifdef __BIG_ENDIAN_BITFIELD
1813 uint64_t nanosec:32; 2904 uint64_t nanosec:32;
1814 uint64_t frnanosec:32; 2905 uint64_t frnanosec:32;
2906#else
2907 uint64_t frnanosec:32;
2908 uint64_t nanosec:32;
2909#endif
1815 } s; 2910 } s;
1816 struct cvmx_mio_ptp_clock_comp_s cn61xx; 2911 struct cvmx_mio_ptp_clock_comp_s cn61xx;
1817 struct cvmx_mio_ptp_clock_comp_s cn63xx; 2912 struct cvmx_mio_ptp_clock_comp_s cn63xx;
@@ -1819,12 +2914,17 @@ union cvmx_mio_ptp_clock_comp {
1819 struct cvmx_mio_ptp_clock_comp_s cn66xx; 2914 struct cvmx_mio_ptp_clock_comp_s cn66xx;
1820 struct cvmx_mio_ptp_clock_comp_s cn68xx; 2915 struct cvmx_mio_ptp_clock_comp_s cn68xx;
1821 struct cvmx_mio_ptp_clock_comp_s cn68xxp1; 2916 struct cvmx_mio_ptp_clock_comp_s cn68xxp1;
2917 struct cvmx_mio_ptp_clock_comp_s cnf71xx;
1822}; 2918};
1823 2919
1824union cvmx_mio_ptp_clock_hi { 2920union cvmx_mio_ptp_clock_hi {
1825 uint64_t u64; 2921 uint64_t u64;
1826 struct cvmx_mio_ptp_clock_hi_s { 2922 struct cvmx_mio_ptp_clock_hi_s {
2923#ifdef __BIG_ENDIAN_BITFIELD
2924 uint64_t nanosec:64;
2925#else
1827 uint64_t nanosec:64; 2926 uint64_t nanosec:64;
2927#endif
1828 } s; 2928 } s;
1829 struct cvmx_mio_ptp_clock_hi_s cn61xx; 2929 struct cvmx_mio_ptp_clock_hi_s cn61xx;
1830 struct cvmx_mio_ptp_clock_hi_s cn63xx; 2930 struct cvmx_mio_ptp_clock_hi_s cn63xx;
@@ -1832,13 +2932,19 @@ union cvmx_mio_ptp_clock_hi {
1832 struct cvmx_mio_ptp_clock_hi_s cn66xx; 2932 struct cvmx_mio_ptp_clock_hi_s cn66xx;
1833 struct cvmx_mio_ptp_clock_hi_s cn68xx; 2933 struct cvmx_mio_ptp_clock_hi_s cn68xx;
1834 struct cvmx_mio_ptp_clock_hi_s cn68xxp1; 2934 struct cvmx_mio_ptp_clock_hi_s cn68xxp1;
2935 struct cvmx_mio_ptp_clock_hi_s cnf71xx;
1835}; 2936};
1836 2937
1837union cvmx_mio_ptp_clock_lo { 2938union cvmx_mio_ptp_clock_lo {
1838 uint64_t u64; 2939 uint64_t u64;
1839 struct cvmx_mio_ptp_clock_lo_s { 2940 struct cvmx_mio_ptp_clock_lo_s {
2941#ifdef __BIG_ENDIAN_BITFIELD
1840 uint64_t reserved_32_63:32; 2942 uint64_t reserved_32_63:32;
1841 uint64_t frnanosec:32; 2943 uint64_t frnanosec:32;
2944#else
2945 uint64_t frnanosec:32;
2946 uint64_t reserved_32_63:32;
2947#endif
1842 } s; 2948 } s;
1843 struct cvmx_mio_ptp_clock_lo_s cn61xx; 2949 struct cvmx_mio_ptp_clock_lo_s cn61xx;
1844 struct cvmx_mio_ptp_clock_lo_s cn63xx; 2950 struct cvmx_mio_ptp_clock_lo_s cn63xx;
@@ -1846,12 +2952,17 @@ union cvmx_mio_ptp_clock_lo {
1846 struct cvmx_mio_ptp_clock_lo_s cn66xx; 2952 struct cvmx_mio_ptp_clock_lo_s cn66xx;
1847 struct cvmx_mio_ptp_clock_lo_s cn68xx; 2953 struct cvmx_mio_ptp_clock_lo_s cn68xx;
1848 struct cvmx_mio_ptp_clock_lo_s cn68xxp1; 2954 struct cvmx_mio_ptp_clock_lo_s cn68xxp1;
2955 struct cvmx_mio_ptp_clock_lo_s cnf71xx;
1849}; 2956};
1850 2957
1851union cvmx_mio_ptp_evt_cnt { 2958union cvmx_mio_ptp_evt_cnt {
1852 uint64_t u64; 2959 uint64_t u64;
1853 struct cvmx_mio_ptp_evt_cnt_s { 2960 struct cvmx_mio_ptp_evt_cnt_s {
2961#ifdef __BIG_ENDIAN_BITFIELD
2962 uint64_t cntr:64;
2963#else
1854 uint64_t cntr:64; 2964 uint64_t cntr:64;
2965#endif
1855 } s; 2966 } s;
1856 struct cvmx_mio_ptp_evt_cnt_s cn61xx; 2967 struct cvmx_mio_ptp_evt_cnt_s cn61xx;
1857 struct cvmx_mio_ptp_evt_cnt_s cn63xx; 2968 struct cvmx_mio_ptp_evt_cnt_s cn63xx;
@@ -1859,55 +2970,97 @@ union cvmx_mio_ptp_evt_cnt {
1859 struct cvmx_mio_ptp_evt_cnt_s cn66xx; 2970 struct cvmx_mio_ptp_evt_cnt_s cn66xx;
1860 struct cvmx_mio_ptp_evt_cnt_s cn68xx; 2971 struct cvmx_mio_ptp_evt_cnt_s cn68xx;
1861 struct cvmx_mio_ptp_evt_cnt_s cn68xxp1; 2972 struct cvmx_mio_ptp_evt_cnt_s cn68xxp1;
2973 struct cvmx_mio_ptp_evt_cnt_s cnf71xx;
2974};
2975
2976union cvmx_mio_ptp_phy_1pps_in {
2977 uint64_t u64;
2978 struct cvmx_mio_ptp_phy_1pps_in_s {
2979#ifdef __BIG_ENDIAN_BITFIELD
2980 uint64_t reserved_5_63:59;
2981 uint64_t sel:5;
2982#else
2983 uint64_t sel:5;
2984 uint64_t reserved_5_63:59;
2985#endif
2986 } s;
2987 struct cvmx_mio_ptp_phy_1pps_in_s cnf71xx;
1862}; 2988};
1863 2989
1864union cvmx_mio_ptp_pps_hi_incr { 2990union cvmx_mio_ptp_pps_hi_incr {
1865 uint64_t u64; 2991 uint64_t u64;
1866 struct cvmx_mio_ptp_pps_hi_incr_s { 2992 struct cvmx_mio_ptp_pps_hi_incr_s {
2993#ifdef __BIG_ENDIAN_BITFIELD
1867 uint64_t nanosec:32; 2994 uint64_t nanosec:32;
1868 uint64_t frnanosec:32; 2995 uint64_t frnanosec:32;
2996#else
2997 uint64_t frnanosec:32;
2998 uint64_t nanosec:32;
2999#endif
1869 } s; 3000 } s;
1870 struct cvmx_mio_ptp_pps_hi_incr_s cn61xx; 3001 struct cvmx_mio_ptp_pps_hi_incr_s cn61xx;
1871 struct cvmx_mio_ptp_pps_hi_incr_s cn66xx; 3002 struct cvmx_mio_ptp_pps_hi_incr_s cn66xx;
1872 struct cvmx_mio_ptp_pps_hi_incr_s cn68xx; 3003 struct cvmx_mio_ptp_pps_hi_incr_s cn68xx;
3004 struct cvmx_mio_ptp_pps_hi_incr_s cnf71xx;
1873}; 3005};
1874 3006
1875union cvmx_mio_ptp_pps_lo_incr { 3007union cvmx_mio_ptp_pps_lo_incr {
1876 uint64_t u64; 3008 uint64_t u64;
1877 struct cvmx_mio_ptp_pps_lo_incr_s { 3009 struct cvmx_mio_ptp_pps_lo_incr_s {
3010#ifdef __BIG_ENDIAN_BITFIELD
1878 uint64_t nanosec:32; 3011 uint64_t nanosec:32;
1879 uint64_t frnanosec:32; 3012 uint64_t frnanosec:32;
3013#else
3014 uint64_t frnanosec:32;
3015 uint64_t nanosec:32;
3016#endif
1880 } s; 3017 } s;
1881 struct cvmx_mio_ptp_pps_lo_incr_s cn61xx; 3018 struct cvmx_mio_ptp_pps_lo_incr_s cn61xx;
1882 struct cvmx_mio_ptp_pps_lo_incr_s cn66xx; 3019 struct cvmx_mio_ptp_pps_lo_incr_s cn66xx;
1883 struct cvmx_mio_ptp_pps_lo_incr_s cn68xx; 3020 struct cvmx_mio_ptp_pps_lo_incr_s cn68xx;
3021 struct cvmx_mio_ptp_pps_lo_incr_s cnf71xx;
1884}; 3022};
1885 3023
1886union cvmx_mio_ptp_pps_thresh_hi { 3024union cvmx_mio_ptp_pps_thresh_hi {
1887 uint64_t u64; 3025 uint64_t u64;
1888 struct cvmx_mio_ptp_pps_thresh_hi_s { 3026 struct cvmx_mio_ptp_pps_thresh_hi_s {
3027#ifdef __BIG_ENDIAN_BITFIELD
3028 uint64_t nanosec:64;
3029#else
1889 uint64_t nanosec:64; 3030 uint64_t nanosec:64;
3031#endif
1890 } s; 3032 } s;
1891 struct cvmx_mio_ptp_pps_thresh_hi_s cn61xx; 3033 struct cvmx_mio_ptp_pps_thresh_hi_s cn61xx;
1892 struct cvmx_mio_ptp_pps_thresh_hi_s cn66xx; 3034 struct cvmx_mio_ptp_pps_thresh_hi_s cn66xx;
1893 struct cvmx_mio_ptp_pps_thresh_hi_s cn68xx; 3035 struct cvmx_mio_ptp_pps_thresh_hi_s cn68xx;
3036 struct cvmx_mio_ptp_pps_thresh_hi_s cnf71xx;
1894}; 3037};
1895 3038
1896union cvmx_mio_ptp_pps_thresh_lo { 3039union cvmx_mio_ptp_pps_thresh_lo {
1897 uint64_t u64; 3040 uint64_t u64;
1898 struct cvmx_mio_ptp_pps_thresh_lo_s { 3041 struct cvmx_mio_ptp_pps_thresh_lo_s {
3042#ifdef __BIG_ENDIAN_BITFIELD
1899 uint64_t reserved_32_63:32; 3043 uint64_t reserved_32_63:32;
1900 uint64_t frnanosec:32; 3044 uint64_t frnanosec:32;
3045#else
3046 uint64_t frnanosec:32;
3047 uint64_t reserved_32_63:32;
3048#endif
1901 } s; 3049 } s;
1902 struct cvmx_mio_ptp_pps_thresh_lo_s cn61xx; 3050 struct cvmx_mio_ptp_pps_thresh_lo_s cn61xx;
1903 struct cvmx_mio_ptp_pps_thresh_lo_s cn66xx; 3051 struct cvmx_mio_ptp_pps_thresh_lo_s cn66xx;
1904 struct cvmx_mio_ptp_pps_thresh_lo_s cn68xx; 3052 struct cvmx_mio_ptp_pps_thresh_lo_s cn68xx;
3053 struct cvmx_mio_ptp_pps_thresh_lo_s cnf71xx;
1905}; 3054};
1906 3055
1907union cvmx_mio_ptp_timestamp { 3056union cvmx_mio_ptp_timestamp {
1908 uint64_t u64; 3057 uint64_t u64;
1909 struct cvmx_mio_ptp_timestamp_s { 3058 struct cvmx_mio_ptp_timestamp_s {
3059#ifdef __BIG_ENDIAN_BITFIELD
1910 uint64_t nanosec:64; 3060 uint64_t nanosec:64;
3061#else
3062 uint64_t nanosec:64;
3063#endif
1911 } s; 3064 } s;
1912 struct cvmx_mio_ptp_timestamp_s cn61xx; 3065 struct cvmx_mio_ptp_timestamp_s cn61xx;
1913 struct cvmx_mio_ptp_timestamp_s cn63xx; 3066 struct cvmx_mio_ptp_timestamp_s cn63xx;
@@ -1915,35 +3068,79 @@ union cvmx_mio_ptp_timestamp {
1915 struct cvmx_mio_ptp_timestamp_s cn66xx; 3068 struct cvmx_mio_ptp_timestamp_s cn66xx;
1916 struct cvmx_mio_ptp_timestamp_s cn68xx; 3069 struct cvmx_mio_ptp_timestamp_s cn68xx;
1917 struct cvmx_mio_ptp_timestamp_s cn68xxp1; 3070 struct cvmx_mio_ptp_timestamp_s cn68xxp1;
3071 struct cvmx_mio_ptp_timestamp_s cnf71xx;
1918}; 3072};
1919 3073
1920union cvmx_mio_qlmx_cfg { 3074union cvmx_mio_qlmx_cfg {
1921 uint64_t u64; 3075 uint64_t u64;
1922 struct cvmx_mio_qlmx_cfg_s { 3076 struct cvmx_mio_qlmx_cfg_s {
1923 uint64_t reserved_12_63:52; 3077#ifdef __BIG_ENDIAN_BITFIELD
3078 uint64_t reserved_15_63:49;
3079 uint64_t prtmode:1;
3080 uint64_t reserved_12_13:2;
1924 uint64_t qlm_spd:4; 3081 uint64_t qlm_spd:4;
1925 uint64_t reserved_4_7:4; 3082 uint64_t reserved_4_7:4;
1926 uint64_t qlm_cfg:4; 3083 uint64_t qlm_cfg:4;
3084#else
3085 uint64_t qlm_cfg:4;
3086 uint64_t reserved_4_7:4;
3087 uint64_t qlm_spd:4;
3088 uint64_t reserved_12_13:2;
3089 uint64_t prtmode:1;
3090 uint64_t reserved_15_63:49;
3091#endif
1927 } s; 3092 } s;
1928 struct cvmx_mio_qlmx_cfg_cn61xx { 3093 struct cvmx_mio_qlmx_cfg_cn61xx {
1929 uint64_t reserved_12_63:52; 3094#ifdef __BIG_ENDIAN_BITFIELD
3095 uint64_t reserved_15_63:49;
3096 uint64_t prtmode:1;
3097 uint64_t reserved_12_13:2;
1930 uint64_t qlm_spd:4; 3098 uint64_t qlm_spd:4;
1931 uint64_t reserved_2_7:6; 3099 uint64_t reserved_2_7:6;
1932 uint64_t qlm_cfg:2; 3100 uint64_t qlm_cfg:2;
3101#else
3102 uint64_t qlm_cfg:2;
3103 uint64_t reserved_2_7:6;
3104 uint64_t qlm_spd:4;
3105 uint64_t reserved_12_13:2;
3106 uint64_t prtmode:1;
3107 uint64_t reserved_15_63:49;
3108#endif
1933 } cn61xx; 3109 } cn61xx;
1934 struct cvmx_mio_qlmx_cfg_s cn66xx; 3110 struct cvmx_mio_qlmx_cfg_cn66xx {
3111#ifdef __BIG_ENDIAN_BITFIELD
3112 uint64_t reserved_12_63:52;
3113 uint64_t qlm_spd:4;
3114 uint64_t reserved_4_7:4;
3115 uint64_t qlm_cfg:4;
3116#else
3117 uint64_t qlm_cfg:4;
3118 uint64_t reserved_4_7:4;
3119 uint64_t qlm_spd:4;
3120 uint64_t reserved_12_63:52;
3121#endif
3122 } cn66xx;
1935 struct cvmx_mio_qlmx_cfg_cn68xx { 3123 struct cvmx_mio_qlmx_cfg_cn68xx {
3124#ifdef __BIG_ENDIAN_BITFIELD
1936 uint64_t reserved_12_63:52; 3125 uint64_t reserved_12_63:52;
1937 uint64_t qlm_spd:4; 3126 uint64_t qlm_spd:4;
1938 uint64_t reserved_3_7:5; 3127 uint64_t reserved_3_7:5;
1939 uint64_t qlm_cfg:3; 3128 uint64_t qlm_cfg:3;
3129#else
3130 uint64_t qlm_cfg:3;
3131 uint64_t reserved_3_7:5;
3132 uint64_t qlm_spd:4;
3133 uint64_t reserved_12_63:52;
3134#endif
1940 } cn68xx; 3135 } cn68xx;
1941 struct cvmx_mio_qlmx_cfg_cn68xx cn68xxp1; 3136 struct cvmx_mio_qlmx_cfg_cn68xx cn68xxp1;
3137 struct cvmx_mio_qlmx_cfg_cn61xx cnf71xx;
1942}; 3138};
1943 3139
1944union cvmx_mio_rst_boot { 3140union cvmx_mio_rst_boot {
1945 uint64_t u64; 3141 uint64_t u64;
1946 struct cvmx_mio_rst_boot_s { 3142 struct cvmx_mio_rst_boot_s {
3143#ifdef __BIG_ENDIAN_BITFIELD
1947 uint64_t chipkill:1; 3144 uint64_t chipkill:1;
1948 uint64_t jtcsrdis:1; 3145 uint64_t jtcsrdis:1;
1949 uint64_t ejtagdis:1; 3146 uint64_t ejtagdis:1;
@@ -1963,8 +3160,30 @@ union cvmx_mio_rst_boot {
1963 uint64_t lboot:10; 3160 uint64_t lboot:10;
1964 uint64_t rboot:1; 3161 uint64_t rboot:1;
1965 uint64_t rboot_pin:1; 3162 uint64_t rboot_pin:1;
3163#else
3164 uint64_t rboot_pin:1;
3165 uint64_t rboot:1;
3166 uint64_t lboot:10;
3167 uint64_t qlm0_spd:4;
3168 uint64_t qlm1_spd:4;
3169 uint64_t qlm2_spd:4;
3170 uint64_t pnr_mul:6;
3171 uint64_t c_mul:6;
3172 uint64_t qlm3_spd:4;
3173 uint64_t qlm4_spd:4;
3174 uint64_t reserved_44_47:4;
3175 uint64_t lboot_ext:2;
3176 uint64_t reserved_50_57:8;
3177 uint64_t jt_tstmode:1;
3178 uint64_t ckill_ppdis:1;
3179 uint64_t romen:1;
3180 uint64_t ejtagdis:1;
3181 uint64_t jtcsrdis:1;
3182 uint64_t chipkill:1;
3183#endif
1966 } s; 3184 } s;
1967 struct cvmx_mio_rst_boot_cn61xx { 3185 struct cvmx_mio_rst_boot_cn61xx {
3186#ifdef __BIG_ENDIAN_BITFIELD
1968 uint64_t chipkill:1; 3187 uint64_t chipkill:1;
1969 uint64_t jtcsrdis:1; 3188 uint64_t jtcsrdis:1;
1970 uint64_t ejtagdis:1; 3189 uint64_t ejtagdis:1;
@@ -1982,8 +3201,28 @@ union cvmx_mio_rst_boot {
1982 uint64_t lboot:10; 3201 uint64_t lboot:10;
1983 uint64_t rboot:1; 3202 uint64_t rboot:1;
1984 uint64_t rboot_pin:1; 3203 uint64_t rboot_pin:1;
3204#else
3205 uint64_t rboot_pin:1;
3206 uint64_t rboot:1;
3207 uint64_t lboot:10;
3208 uint64_t qlm0_spd:4;
3209 uint64_t qlm1_spd:4;
3210 uint64_t qlm2_spd:4;
3211 uint64_t pnr_mul:6;
3212 uint64_t c_mul:6;
3213 uint64_t reserved_36_47:12;
3214 uint64_t lboot_ext:2;
3215 uint64_t reserved_50_57:8;
3216 uint64_t jt_tstmode:1;
3217 uint64_t ckill_ppdis:1;
3218 uint64_t romen:1;
3219 uint64_t ejtagdis:1;
3220 uint64_t jtcsrdis:1;
3221 uint64_t chipkill:1;
3222#endif
1985 } cn61xx; 3223 } cn61xx;
1986 struct cvmx_mio_rst_boot_cn63xx { 3224 struct cvmx_mio_rst_boot_cn63xx {
3225#ifdef __BIG_ENDIAN_BITFIELD
1987 uint64_t reserved_36_63:28; 3226 uint64_t reserved_36_63:28;
1988 uint64_t c_mul:6; 3227 uint64_t c_mul:6;
1989 uint64_t pnr_mul:6; 3228 uint64_t pnr_mul:6;
@@ -1993,9 +3232,21 @@ union cvmx_mio_rst_boot {
1993 uint64_t lboot:10; 3232 uint64_t lboot:10;
1994 uint64_t rboot:1; 3233 uint64_t rboot:1;
1995 uint64_t rboot_pin:1; 3234 uint64_t rboot_pin:1;
3235#else
3236 uint64_t rboot_pin:1;
3237 uint64_t rboot:1;
3238 uint64_t lboot:10;
3239 uint64_t qlm0_spd:4;
3240 uint64_t qlm1_spd:4;
3241 uint64_t qlm2_spd:4;
3242 uint64_t pnr_mul:6;
3243 uint64_t c_mul:6;
3244 uint64_t reserved_36_63:28;
3245#endif
1996 } cn63xx; 3246 } cn63xx;
1997 struct cvmx_mio_rst_boot_cn63xx cn63xxp1; 3247 struct cvmx_mio_rst_boot_cn63xx cn63xxp1;
1998 struct cvmx_mio_rst_boot_cn66xx { 3248 struct cvmx_mio_rst_boot_cn66xx {
3249#ifdef __BIG_ENDIAN_BITFIELD
1999 uint64_t chipkill:1; 3250 uint64_t chipkill:1;
2000 uint64_t jtcsrdis:1; 3251 uint64_t jtcsrdis:1;
2001 uint64_t ejtagdis:1; 3252 uint64_t ejtagdis:1;
@@ -2012,8 +3263,27 @@ union cvmx_mio_rst_boot {
2012 uint64_t lboot:10; 3263 uint64_t lboot:10;
2013 uint64_t rboot:1; 3264 uint64_t rboot:1;
2014 uint64_t rboot_pin:1; 3265 uint64_t rboot_pin:1;
3266#else
3267 uint64_t rboot_pin:1;
3268 uint64_t rboot:1;
3269 uint64_t lboot:10;
3270 uint64_t qlm0_spd:4;
3271 uint64_t qlm1_spd:4;
3272 uint64_t qlm2_spd:4;
3273 uint64_t pnr_mul:6;
3274 uint64_t c_mul:6;
3275 uint64_t reserved_36_47:12;
3276 uint64_t lboot_ext:2;
3277 uint64_t reserved_50_58:9;
3278 uint64_t ckill_ppdis:1;
3279 uint64_t romen:1;
3280 uint64_t ejtagdis:1;
3281 uint64_t jtcsrdis:1;
3282 uint64_t chipkill:1;
3283#endif
2015 } cn66xx; 3284 } cn66xx;
2016 struct cvmx_mio_rst_boot_cn68xx { 3285 struct cvmx_mio_rst_boot_cn68xx {
3286#ifdef __BIG_ENDIAN_BITFIELD
2017 uint64_t reserved_59_63:5; 3287 uint64_t reserved_59_63:5;
2018 uint64_t jt_tstmode:1; 3288 uint64_t jt_tstmode:1;
2019 uint64_t reserved_44_57:14; 3289 uint64_t reserved_44_57:14;
@@ -2027,8 +3297,24 @@ union cvmx_mio_rst_boot {
2027 uint64_t lboot:10; 3297 uint64_t lboot:10;
2028 uint64_t rboot:1; 3298 uint64_t rboot:1;
2029 uint64_t rboot_pin:1; 3299 uint64_t rboot_pin:1;
3300#else
3301 uint64_t rboot_pin:1;
3302 uint64_t rboot:1;
3303 uint64_t lboot:10;
3304 uint64_t qlm0_spd:4;
3305 uint64_t qlm1_spd:4;
3306 uint64_t qlm2_spd:4;
3307 uint64_t pnr_mul:6;
3308 uint64_t c_mul:6;
3309 uint64_t qlm3_spd:4;
3310 uint64_t qlm4_spd:4;
3311 uint64_t reserved_44_57:14;
3312 uint64_t jt_tstmode:1;
3313 uint64_t reserved_59_63:5;
3314#endif
2030 } cn68xx; 3315 } cn68xx;
2031 struct cvmx_mio_rst_boot_cn68xxp1 { 3316 struct cvmx_mio_rst_boot_cn68xxp1 {
3317#ifdef __BIG_ENDIAN_BITFIELD
2032 uint64_t reserved_44_63:20; 3318 uint64_t reserved_44_63:20;
2033 uint64_t qlm4_spd:4; 3319 uint64_t qlm4_spd:4;
2034 uint64_t qlm3_spd:4; 3320 uint64_t qlm3_spd:4;
@@ -2040,55 +3326,107 @@ union cvmx_mio_rst_boot {
2040 uint64_t lboot:10; 3326 uint64_t lboot:10;
2041 uint64_t rboot:1; 3327 uint64_t rboot:1;
2042 uint64_t rboot_pin:1; 3328 uint64_t rboot_pin:1;
3329#else
3330 uint64_t rboot_pin:1;
3331 uint64_t rboot:1;
3332 uint64_t lboot:10;
3333 uint64_t qlm0_spd:4;
3334 uint64_t qlm1_spd:4;
3335 uint64_t qlm2_spd:4;
3336 uint64_t pnr_mul:6;
3337 uint64_t c_mul:6;
3338 uint64_t qlm3_spd:4;
3339 uint64_t qlm4_spd:4;
3340 uint64_t reserved_44_63:20;
3341#endif
2043 } cn68xxp1; 3342 } cn68xxp1;
3343 struct cvmx_mio_rst_boot_cn61xx cnf71xx;
2044}; 3344};
2045 3345
2046union cvmx_mio_rst_cfg { 3346union cvmx_mio_rst_cfg {
2047 uint64_t u64; 3347 uint64_t u64;
2048 struct cvmx_mio_rst_cfg_s { 3348 struct cvmx_mio_rst_cfg_s {
3349#ifdef __BIG_ENDIAN_BITFIELD
2049 uint64_t reserved_3_63:61; 3350 uint64_t reserved_3_63:61;
2050 uint64_t cntl_clr_bist:1; 3351 uint64_t cntl_clr_bist:1;
2051 uint64_t warm_clr_bist:1; 3352 uint64_t warm_clr_bist:1;
2052 uint64_t soft_clr_bist:1; 3353 uint64_t soft_clr_bist:1;
3354#else
3355 uint64_t soft_clr_bist:1;
3356 uint64_t warm_clr_bist:1;
3357 uint64_t cntl_clr_bist:1;
3358 uint64_t reserved_3_63:61;
3359#endif
2053 } s; 3360 } s;
2054 struct cvmx_mio_rst_cfg_cn61xx { 3361 struct cvmx_mio_rst_cfg_cn61xx {
3362#ifdef __BIG_ENDIAN_BITFIELD
2055 uint64_t bist_delay:58; 3363 uint64_t bist_delay:58;
2056 uint64_t reserved_3_5:3; 3364 uint64_t reserved_3_5:3;
2057 uint64_t cntl_clr_bist:1; 3365 uint64_t cntl_clr_bist:1;
2058 uint64_t warm_clr_bist:1; 3366 uint64_t warm_clr_bist:1;
2059 uint64_t soft_clr_bist:1; 3367 uint64_t soft_clr_bist:1;
3368#else
3369 uint64_t soft_clr_bist:1;
3370 uint64_t warm_clr_bist:1;
3371 uint64_t cntl_clr_bist:1;
3372 uint64_t reserved_3_5:3;
3373 uint64_t bist_delay:58;
3374#endif
2060 } cn61xx; 3375 } cn61xx;
2061 struct cvmx_mio_rst_cfg_cn61xx cn63xx; 3376 struct cvmx_mio_rst_cfg_cn61xx cn63xx;
2062 struct cvmx_mio_rst_cfg_cn63xxp1 { 3377 struct cvmx_mio_rst_cfg_cn63xxp1 {
3378#ifdef __BIG_ENDIAN_BITFIELD
2063 uint64_t bist_delay:58; 3379 uint64_t bist_delay:58;
2064 uint64_t reserved_2_5:4; 3380 uint64_t reserved_2_5:4;
2065 uint64_t warm_clr_bist:1; 3381 uint64_t warm_clr_bist:1;
2066 uint64_t soft_clr_bist:1; 3382 uint64_t soft_clr_bist:1;
3383#else
3384 uint64_t soft_clr_bist:1;
3385 uint64_t warm_clr_bist:1;
3386 uint64_t reserved_2_5:4;
3387 uint64_t bist_delay:58;
3388#endif
2067 } cn63xxp1; 3389 } cn63xxp1;
2068 struct cvmx_mio_rst_cfg_cn61xx cn66xx; 3390 struct cvmx_mio_rst_cfg_cn61xx cn66xx;
2069 struct cvmx_mio_rst_cfg_cn68xx { 3391 struct cvmx_mio_rst_cfg_cn68xx {
3392#ifdef __BIG_ENDIAN_BITFIELD
2070 uint64_t bist_delay:56; 3393 uint64_t bist_delay:56;
2071 uint64_t reserved_3_7:5; 3394 uint64_t reserved_3_7:5;
2072 uint64_t cntl_clr_bist:1; 3395 uint64_t cntl_clr_bist:1;
2073 uint64_t warm_clr_bist:1; 3396 uint64_t warm_clr_bist:1;
2074 uint64_t soft_clr_bist:1; 3397 uint64_t soft_clr_bist:1;
3398#else
3399 uint64_t soft_clr_bist:1;
3400 uint64_t warm_clr_bist:1;
3401 uint64_t cntl_clr_bist:1;
3402 uint64_t reserved_3_7:5;
3403 uint64_t bist_delay:56;
3404#endif
2075 } cn68xx; 3405 } cn68xx;
2076 struct cvmx_mio_rst_cfg_cn68xx cn68xxp1; 3406 struct cvmx_mio_rst_cfg_cn68xx cn68xxp1;
3407 struct cvmx_mio_rst_cfg_cn61xx cnf71xx;
2077}; 3408};
2078 3409
2079union cvmx_mio_rst_ckill { 3410union cvmx_mio_rst_ckill {
2080 uint64_t u64; 3411 uint64_t u64;
2081 struct cvmx_mio_rst_ckill_s { 3412 struct cvmx_mio_rst_ckill_s {
3413#ifdef __BIG_ENDIAN_BITFIELD
2082 uint64_t reserved_47_63:17; 3414 uint64_t reserved_47_63:17;
2083 uint64_t timer:47; 3415 uint64_t timer:47;
3416#else
3417 uint64_t timer:47;
3418 uint64_t reserved_47_63:17;
3419#endif
2084 } s; 3420 } s;
2085 struct cvmx_mio_rst_ckill_s cn61xx; 3421 struct cvmx_mio_rst_ckill_s cn61xx;
2086 struct cvmx_mio_rst_ckill_s cn66xx; 3422 struct cvmx_mio_rst_ckill_s cn66xx;
3423 struct cvmx_mio_rst_ckill_s cnf71xx;
2087}; 3424};
2088 3425
2089union cvmx_mio_rst_cntlx { 3426union cvmx_mio_rst_cntlx {
2090 uint64_t u64; 3427 uint64_t u64;
2091 struct cvmx_mio_rst_cntlx_s { 3428 struct cvmx_mio_rst_cntlx_s {
3429#ifdef __BIG_ENDIAN_BITFIELD
2092 uint64_t reserved_13_63:51; 3430 uint64_t reserved_13_63:51;
2093 uint64_t in_rev_ln:1; 3431 uint64_t in_rev_ln:1;
2094 uint64_t rev_lanes:1; 3432 uint64_t rev_lanes:1;
@@ -2102,9 +3440,25 @@ union cvmx_mio_rst_cntlx {
2102 uint64_t rst_rcv:1; 3440 uint64_t rst_rcv:1;
2103 uint64_t rst_chip:1; 3441 uint64_t rst_chip:1;
2104 uint64_t rst_val:1; 3442 uint64_t rst_val:1;
3443#else
3444 uint64_t rst_val:1;
3445 uint64_t rst_chip:1;
3446 uint64_t rst_rcv:1;
3447 uint64_t rst_drv:1;
3448 uint64_t prtmode:2;
3449 uint64_t host_mode:1;
3450 uint64_t rst_link:1;
3451 uint64_t rst_done:1;
3452 uint64_t prst_link:1;
3453 uint64_t gen1_only:1;
3454 uint64_t rev_lanes:1;
3455 uint64_t in_rev_ln:1;
3456 uint64_t reserved_13_63:51;
3457#endif
2105 } s; 3458 } s;
2106 struct cvmx_mio_rst_cntlx_s cn61xx; 3459 struct cvmx_mio_rst_cntlx_s cn61xx;
2107 struct cvmx_mio_rst_cntlx_cn66xx { 3460 struct cvmx_mio_rst_cntlx_cn66xx {
3461#ifdef __BIG_ENDIAN_BITFIELD
2108 uint64_t reserved_10_63:54; 3462 uint64_t reserved_10_63:54;
2109 uint64_t prst_link:1; 3463 uint64_t prst_link:1;
2110 uint64_t rst_done:1; 3464 uint64_t rst_done:1;
@@ -2115,13 +3469,27 @@ union cvmx_mio_rst_cntlx {
2115 uint64_t rst_rcv:1; 3469 uint64_t rst_rcv:1;
2116 uint64_t rst_chip:1; 3470 uint64_t rst_chip:1;
2117 uint64_t rst_val:1; 3471 uint64_t rst_val:1;
3472#else
3473 uint64_t rst_val:1;
3474 uint64_t rst_chip:1;
3475 uint64_t rst_rcv:1;
3476 uint64_t rst_drv:1;
3477 uint64_t prtmode:2;
3478 uint64_t host_mode:1;
3479 uint64_t rst_link:1;
3480 uint64_t rst_done:1;
3481 uint64_t prst_link:1;
3482 uint64_t reserved_10_63:54;
3483#endif
2118 } cn66xx; 3484 } cn66xx;
2119 struct cvmx_mio_rst_cntlx_cn66xx cn68xx; 3485 struct cvmx_mio_rst_cntlx_cn66xx cn68xx;
3486 struct cvmx_mio_rst_cntlx_s cnf71xx;
2120}; 3487};
2121 3488
2122union cvmx_mio_rst_ctlx { 3489union cvmx_mio_rst_ctlx {
2123 uint64_t u64; 3490 uint64_t u64;
2124 struct cvmx_mio_rst_ctlx_s { 3491 struct cvmx_mio_rst_ctlx_s {
3492#ifdef __BIG_ENDIAN_BITFIELD
2125 uint64_t reserved_13_63:51; 3493 uint64_t reserved_13_63:51;
2126 uint64_t in_rev_ln:1; 3494 uint64_t in_rev_ln:1;
2127 uint64_t rev_lanes:1; 3495 uint64_t rev_lanes:1;
@@ -2135,9 +3503,25 @@ union cvmx_mio_rst_ctlx {
2135 uint64_t rst_rcv:1; 3503 uint64_t rst_rcv:1;
2136 uint64_t rst_chip:1; 3504 uint64_t rst_chip:1;
2137 uint64_t rst_val:1; 3505 uint64_t rst_val:1;
3506#else
3507 uint64_t rst_val:1;
3508 uint64_t rst_chip:1;
3509 uint64_t rst_rcv:1;
3510 uint64_t rst_drv:1;
3511 uint64_t prtmode:2;
3512 uint64_t host_mode:1;
3513 uint64_t rst_link:1;
3514 uint64_t rst_done:1;
3515 uint64_t prst_link:1;
3516 uint64_t gen1_only:1;
3517 uint64_t rev_lanes:1;
3518 uint64_t in_rev_ln:1;
3519 uint64_t reserved_13_63:51;
3520#endif
2138 } s; 3521 } s;
2139 struct cvmx_mio_rst_ctlx_s cn61xx; 3522 struct cvmx_mio_rst_ctlx_s cn61xx;
2140 struct cvmx_mio_rst_ctlx_cn63xx { 3523 struct cvmx_mio_rst_ctlx_cn63xx {
3524#ifdef __BIG_ENDIAN_BITFIELD
2141 uint64_t reserved_10_63:54; 3525 uint64_t reserved_10_63:54;
2142 uint64_t prst_link:1; 3526 uint64_t prst_link:1;
2143 uint64_t rst_done:1; 3527 uint64_t rst_done:1;
@@ -2148,8 +3532,21 @@ union cvmx_mio_rst_ctlx {
2148 uint64_t rst_rcv:1; 3532 uint64_t rst_rcv:1;
2149 uint64_t rst_chip:1; 3533 uint64_t rst_chip:1;
2150 uint64_t rst_val:1; 3534 uint64_t rst_val:1;
3535#else
3536 uint64_t rst_val:1;
3537 uint64_t rst_chip:1;
3538 uint64_t rst_rcv:1;
3539 uint64_t rst_drv:1;
3540 uint64_t prtmode:2;
3541 uint64_t host_mode:1;
3542 uint64_t rst_link:1;
3543 uint64_t rst_done:1;
3544 uint64_t prst_link:1;
3545 uint64_t reserved_10_63:54;
3546#endif
2151 } cn63xx; 3547 } cn63xx;
2152 struct cvmx_mio_rst_ctlx_cn63xxp1 { 3548 struct cvmx_mio_rst_ctlx_cn63xxp1 {
3549#ifdef __BIG_ENDIAN_BITFIELD
2153 uint64_t reserved_9_63:55; 3550 uint64_t reserved_9_63:55;
2154 uint64_t rst_done:1; 3551 uint64_t rst_done:1;
2155 uint64_t rst_link:1; 3552 uint64_t rst_link:1;
@@ -2159,18 +3556,36 @@ union cvmx_mio_rst_ctlx {
2159 uint64_t rst_rcv:1; 3556 uint64_t rst_rcv:1;
2160 uint64_t rst_chip:1; 3557 uint64_t rst_chip:1;
2161 uint64_t rst_val:1; 3558 uint64_t rst_val:1;
3559#else
3560 uint64_t rst_val:1;
3561 uint64_t rst_chip:1;
3562 uint64_t rst_rcv:1;
3563 uint64_t rst_drv:1;
3564 uint64_t prtmode:2;
3565 uint64_t host_mode:1;
3566 uint64_t rst_link:1;
3567 uint64_t rst_done:1;
3568 uint64_t reserved_9_63:55;
3569#endif
2162 } cn63xxp1; 3570 } cn63xxp1;
2163 struct cvmx_mio_rst_ctlx_cn63xx cn66xx; 3571 struct cvmx_mio_rst_ctlx_cn63xx cn66xx;
2164 struct cvmx_mio_rst_ctlx_cn63xx cn68xx; 3572 struct cvmx_mio_rst_ctlx_cn63xx cn68xx;
2165 struct cvmx_mio_rst_ctlx_cn63xx cn68xxp1; 3573 struct cvmx_mio_rst_ctlx_cn63xx cn68xxp1;
3574 struct cvmx_mio_rst_ctlx_s cnf71xx;
2166}; 3575};
2167 3576
2168union cvmx_mio_rst_delay { 3577union cvmx_mio_rst_delay {
2169 uint64_t u64; 3578 uint64_t u64;
2170 struct cvmx_mio_rst_delay_s { 3579 struct cvmx_mio_rst_delay_s {
3580#ifdef __BIG_ENDIAN_BITFIELD
2171 uint64_t reserved_32_63:32; 3581 uint64_t reserved_32_63:32;
2172 uint64_t warm_rst_dly:16; 3582 uint64_t warm_rst_dly:16;
2173 uint64_t soft_rst_dly:16; 3583 uint64_t soft_rst_dly:16;
3584#else
3585 uint64_t soft_rst_dly:16;
3586 uint64_t warm_rst_dly:16;
3587 uint64_t reserved_32_63:32;
3588#endif
2174 } s; 3589 } s;
2175 struct cvmx_mio_rst_delay_s cn61xx; 3590 struct cvmx_mio_rst_delay_s cn61xx;
2176 struct cvmx_mio_rst_delay_s cn63xx; 3591 struct cvmx_mio_rst_delay_s cn63xx;
@@ -2178,11 +3593,13 @@ union cvmx_mio_rst_delay {
2178 struct cvmx_mio_rst_delay_s cn66xx; 3593 struct cvmx_mio_rst_delay_s cn66xx;
2179 struct cvmx_mio_rst_delay_s cn68xx; 3594 struct cvmx_mio_rst_delay_s cn68xx;
2180 struct cvmx_mio_rst_delay_s cn68xxp1; 3595 struct cvmx_mio_rst_delay_s cn68xxp1;
3596 struct cvmx_mio_rst_delay_s cnf71xx;
2181}; 3597};
2182 3598
2183union cvmx_mio_rst_int { 3599union cvmx_mio_rst_int {
2184 uint64_t u64; 3600 uint64_t u64;
2185 struct cvmx_mio_rst_int_s { 3601 struct cvmx_mio_rst_int_s {
3602#ifdef __BIG_ENDIAN_BITFIELD
2186 uint64_t reserved_10_63:54; 3603 uint64_t reserved_10_63:54;
2187 uint64_t perst1:1; 3604 uint64_t perst1:1;
2188 uint64_t perst0:1; 3605 uint64_t perst0:1;
@@ -2191,25 +3608,46 @@ union cvmx_mio_rst_int {
2191 uint64_t rst_link2:1; 3608 uint64_t rst_link2:1;
2192 uint64_t rst_link1:1; 3609 uint64_t rst_link1:1;
2193 uint64_t rst_link0:1; 3610 uint64_t rst_link0:1;
3611#else
3612 uint64_t rst_link0:1;
3613 uint64_t rst_link1:1;
3614 uint64_t rst_link2:1;
3615 uint64_t rst_link3:1;
3616 uint64_t reserved_4_7:4;
3617 uint64_t perst0:1;
3618 uint64_t perst1:1;
3619 uint64_t reserved_10_63:54;
3620#endif
2194 } s; 3621 } s;
2195 struct cvmx_mio_rst_int_cn61xx { 3622 struct cvmx_mio_rst_int_cn61xx {
3623#ifdef __BIG_ENDIAN_BITFIELD
2196 uint64_t reserved_10_63:54; 3624 uint64_t reserved_10_63:54;
2197 uint64_t perst1:1; 3625 uint64_t perst1:1;
2198 uint64_t perst0:1; 3626 uint64_t perst0:1;
2199 uint64_t reserved_2_7:6; 3627 uint64_t reserved_2_7:6;
2200 uint64_t rst_link1:1; 3628 uint64_t rst_link1:1;
2201 uint64_t rst_link0:1; 3629 uint64_t rst_link0:1;
3630#else
3631 uint64_t rst_link0:1;
3632 uint64_t rst_link1:1;
3633 uint64_t reserved_2_7:6;
3634 uint64_t perst0:1;
3635 uint64_t perst1:1;
3636 uint64_t reserved_10_63:54;
3637#endif
2202 } cn61xx; 3638 } cn61xx;
2203 struct cvmx_mio_rst_int_cn61xx cn63xx; 3639 struct cvmx_mio_rst_int_cn61xx cn63xx;
2204 struct cvmx_mio_rst_int_cn61xx cn63xxp1; 3640 struct cvmx_mio_rst_int_cn61xx cn63xxp1;
2205 struct cvmx_mio_rst_int_s cn66xx; 3641 struct cvmx_mio_rst_int_s cn66xx;
2206 struct cvmx_mio_rst_int_cn61xx cn68xx; 3642 struct cvmx_mio_rst_int_cn61xx cn68xx;
2207 struct cvmx_mio_rst_int_cn61xx cn68xxp1; 3643 struct cvmx_mio_rst_int_cn61xx cn68xxp1;
3644 struct cvmx_mio_rst_int_cn61xx cnf71xx;
2208}; 3645};
2209 3646
2210union cvmx_mio_rst_int_en { 3647union cvmx_mio_rst_int_en {
2211 uint64_t u64; 3648 uint64_t u64;
2212 struct cvmx_mio_rst_int_en_s { 3649 struct cvmx_mio_rst_int_en_s {
3650#ifdef __BIG_ENDIAN_BITFIELD
2213 uint64_t reserved_10_63:54; 3651 uint64_t reserved_10_63:54;
2214 uint64_t perst1:1; 3652 uint64_t perst1:1;
2215 uint64_t perst0:1; 3653 uint64_t perst0:1;
@@ -2218,25 +3656,46 @@ union cvmx_mio_rst_int_en {
2218 uint64_t rst_link2:1; 3656 uint64_t rst_link2:1;
2219 uint64_t rst_link1:1; 3657 uint64_t rst_link1:1;
2220 uint64_t rst_link0:1; 3658 uint64_t rst_link0:1;
3659#else
3660 uint64_t rst_link0:1;
3661 uint64_t rst_link1:1;
3662 uint64_t rst_link2:1;
3663 uint64_t rst_link3:1;
3664 uint64_t reserved_4_7:4;
3665 uint64_t perst0:1;
3666 uint64_t perst1:1;
3667 uint64_t reserved_10_63:54;
3668#endif
2221 } s; 3669 } s;
2222 struct cvmx_mio_rst_int_en_cn61xx { 3670 struct cvmx_mio_rst_int_en_cn61xx {
3671#ifdef __BIG_ENDIAN_BITFIELD
2223 uint64_t reserved_10_63:54; 3672 uint64_t reserved_10_63:54;
2224 uint64_t perst1:1; 3673 uint64_t perst1:1;
2225 uint64_t perst0:1; 3674 uint64_t perst0:1;
2226 uint64_t reserved_2_7:6; 3675 uint64_t reserved_2_7:6;
2227 uint64_t rst_link1:1; 3676 uint64_t rst_link1:1;
2228 uint64_t rst_link0:1; 3677 uint64_t rst_link0:1;
3678#else
3679 uint64_t rst_link0:1;
3680 uint64_t rst_link1:1;
3681 uint64_t reserved_2_7:6;
3682 uint64_t perst0:1;
3683 uint64_t perst1:1;
3684 uint64_t reserved_10_63:54;
3685#endif
2229 } cn61xx; 3686 } cn61xx;
2230 struct cvmx_mio_rst_int_en_cn61xx cn63xx; 3687 struct cvmx_mio_rst_int_en_cn61xx cn63xx;
2231 struct cvmx_mio_rst_int_en_cn61xx cn63xxp1; 3688 struct cvmx_mio_rst_int_en_cn61xx cn63xxp1;
2232 struct cvmx_mio_rst_int_en_s cn66xx; 3689 struct cvmx_mio_rst_int_en_s cn66xx;
2233 struct cvmx_mio_rst_int_en_cn61xx cn68xx; 3690 struct cvmx_mio_rst_int_en_cn61xx cn68xx;
2234 struct cvmx_mio_rst_int_en_cn61xx cn68xxp1; 3691 struct cvmx_mio_rst_int_en_cn61xx cn68xxp1;
3692 struct cvmx_mio_rst_int_en_cn61xx cnf71xx;
2235}; 3693};
2236 3694
2237union cvmx_mio_twsx_int { 3695union cvmx_mio_twsx_int {
2238 uint64_t u64; 3696 uint64_t u64;
2239 struct cvmx_mio_twsx_int_s { 3697 struct cvmx_mio_twsx_int_s {
3698#ifdef __BIG_ENDIAN_BITFIELD
2240 uint64_t reserved_12_63:52; 3699 uint64_t reserved_12_63:52;
2241 uint64_t scl:1; 3700 uint64_t scl:1;
2242 uint64_t sda:1; 3701 uint64_t sda:1;
@@ -2250,11 +3709,27 @@ union cvmx_mio_twsx_int {
2250 uint64_t core_int:1; 3709 uint64_t core_int:1;
2251 uint64_t ts_int:1; 3710 uint64_t ts_int:1;
2252 uint64_t st_int:1; 3711 uint64_t st_int:1;
3712#else
3713 uint64_t st_int:1;
3714 uint64_t ts_int:1;
3715 uint64_t core_int:1;
3716 uint64_t reserved_3_3:1;
3717 uint64_t st_en:1;
3718 uint64_t ts_en:1;
3719 uint64_t core_en:1;
3720 uint64_t reserved_7_7:1;
3721 uint64_t sda_ovr:1;
3722 uint64_t scl_ovr:1;
3723 uint64_t sda:1;
3724 uint64_t scl:1;
3725 uint64_t reserved_12_63:52;
3726#endif
2253 } s; 3727 } s;
2254 struct cvmx_mio_twsx_int_s cn30xx; 3728 struct cvmx_mio_twsx_int_s cn30xx;
2255 struct cvmx_mio_twsx_int_s cn31xx; 3729 struct cvmx_mio_twsx_int_s cn31xx;
2256 struct cvmx_mio_twsx_int_s cn38xx; 3730 struct cvmx_mio_twsx_int_s cn38xx;
2257 struct cvmx_mio_twsx_int_cn38xxp2 { 3731 struct cvmx_mio_twsx_int_cn38xxp2 {
3732#ifdef __BIG_ENDIAN_BITFIELD
2258 uint64_t reserved_7_63:57; 3733 uint64_t reserved_7_63:57;
2259 uint64_t core_en:1; 3734 uint64_t core_en:1;
2260 uint64_t ts_en:1; 3735 uint64_t ts_en:1;
@@ -2263,6 +3738,16 @@ union cvmx_mio_twsx_int {
2263 uint64_t core_int:1; 3738 uint64_t core_int:1;
2264 uint64_t ts_int:1; 3739 uint64_t ts_int:1;
2265 uint64_t st_int:1; 3740 uint64_t st_int:1;
3741#else
3742 uint64_t st_int:1;
3743 uint64_t ts_int:1;
3744 uint64_t core_int:1;
3745 uint64_t reserved_3_3:1;
3746 uint64_t st_en:1;
3747 uint64_t ts_en:1;
3748 uint64_t core_en:1;
3749 uint64_t reserved_7_63:57;
3750#endif
2266 } cn38xxp2; 3751 } cn38xxp2;
2267 struct cvmx_mio_twsx_int_s cn50xx; 3752 struct cvmx_mio_twsx_int_s cn50xx;
2268 struct cvmx_mio_twsx_int_s cn52xx; 3753 struct cvmx_mio_twsx_int_s cn52xx;
@@ -2277,11 +3762,13 @@ union cvmx_mio_twsx_int {
2277 struct cvmx_mio_twsx_int_s cn66xx; 3762 struct cvmx_mio_twsx_int_s cn66xx;
2278 struct cvmx_mio_twsx_int_s cn68xx; 3763 struct cvmx_mio_twsx_int_s cn68xx;
2279 struct cvmx_mio_twsx_int_s cn68xxp1; 3764 struct cvmx_mio_twsx_int_s cn68xxp1;
3765 struct cvmx_mio_twsx_int_s cnf71xx;
2280}; 3766};
2281 3767
2282union cvmx_mio_twsx_sw_twsi { 3768union cvmx_mio_twsx_sw_twsi {
2283 uint64_t u64; 3769 uint64_t u64;
2284 struct cvmx_mio_twsx_sw_twsi_s { 3770 struct cvmx_mio_twsx_sw_twsi_s {
3771#ifdef __BIG_ENDIAN_BITFIELD
2285 uint64_t v:1; 3772 uint64_t v:1;
2286 uint64_t slonly:1; 3773 uint64_t slonly:1;
2287 uint64_t eia:1; 3774 uint64_t eia:1;
@@ -2294,6 +3781,20 @@ union cvmx_mio_twsx_sw_twsi {
2294 uint64_t ia:5; 3781 uint64_t ia:5;
2295 uint64_t eop_ia:3; 3782 uint64_t eop_ia:3;
2296 uint64_t d:32; 3783 uint64_t d:32;
3784#else
3785 uint64_t d:32;
3786 uint64_t eop_ia:3;
3787 uint64_t ia:5;
3788 uint64_t a:10;
3789 uint64_t scr:2;
3790 uint64_t size:3;
3791 uint64_t sovr:1;
3792 uint64_t r:1;
3793 uint64_t op:4;
3794 uint64_t eia:1;
3795 uint64_t slonly:1;
3796 uint64_t v:1;
3797#endif
2297 } s; 3798 } s;
2298 struct cvmx_mio_twsx_sw_twsi_s cn30xx; 3799 struct cvmx_mio_twsx_sw_twsi_s cn30xx;
2299 struct cvmx_mio_twsx_sw_twsi_s cn31xx; 3800 struct cvmx_mio_twsx_sw_twsi_s cn31xx;
@@ -2312,14 +3813,21 @@ union cvmx_mio_twsx_sw_twsi {
2312 struct cvmx_mio_twsx_sw_twsi_s cn66xx; 3813 struct cvmx_mio_twsx_sw_twsi_s cn66xx;
2313 struct cvmx_mio_twsx_sw_twsi_s cn68xx; 3814 struct cvmx_mio_twsx_sw_twsi_s cn68xx;
2314 struct cvmx_mio_twsx_sw_twsi_s cn68xxp1; 3815 struct cvmx_mio_twsx_sw_twsi_s cn68xxp1;
3816 struct cvmx_mio_twsx_sw_twsi_s cnf71xx;
2315}; 3817};
2316 3818
2317union cvmx_mio_twsx_sw_twsi_ext { 3819union cvmx_mio_twsx_sw_twsi_ext {
2318 uint64_t u64; 3820 uint64_t u64;
2319 struct cvmx_mio_twsx_sw_twsi_ext_s { 3821 struct cvmx_mio_twsx_sw_twsi_ext_s {
3822#ifdef __BIG_ENDIAN_BITFIELD
2320 uint64_t reserved_40_63:24; 3823 uint64_t reserved_40_63:24;
2321 uint64_t ia:8; 3824 uint64_t ia:8;
2322 uint64_t d:32; 3825 uint64_t d:32;
3826#else
3827 uint64_t d:32;
3828 uint64_t ia:8;
3829 uint64_t reserved_40_63:24;
3830#endif
2323 } s; 3831 } s;
2324 struct cvmx_mio_twsx_sw_twsi_ext_s cn30xx; 3832 struct cvmx_mio_twsx_sw_twsi_ext_s cn30xx;
2325 struct cvmx_mio_twsx_sw_twsi_ext_s cn31xx; 3833 struct cvmx_mio_twsx_sw_twsi_ext_s cn31xx;
@@ -2338,14 +3846,21 @@ union cvmx_mio_twsx_sw_twsi_ext {
2338 struct cvmx_mio_twsx_sw_twsi_ext_s cn66xx; 3846 struct cvmx_mio_twsx_sw_twsi_ext_s cn66xx;
2339 struct cvmx_mio_twsx_sw_twsi_ext_s cn68xx; 3847 struct cvmx_mio_twsx_sw_twsi_ext_s cn68xx;
2340 struct cvmx_mio_twsx_sw_twsi_ext_s cn68xxp1; 3848 struct cvmx_mio_twsx_sw_twsi_ext_s cn68xxp1;
3849 struct cvmx_mio_twsx_sw_twsi_ext_s cnf71xx;
2341}; 3850};
2342 3851
2343union cvmx_mio_twsx_twsi_sw { 3852union cvmx_mio_twsx_twsi_sw {
2344 uint64_t u64; 3853 uint64_t u64;
2345 struct cvmx_mio_twsx_twsi_sw_s { 3854 struct cvmx_mio_twsx_twsi_sw_s {
3855#ifdef __BIG_ENDIAN_BITFIELD
2346 uint64_t v:2; 3856 uint64_t v:2;
2347 uint64_t reserved_32_61:30; 3857 uint64_t reserved_32_61:30;
2348 uint64_t d:32; 3858 uint64_t d:32;
3859#else
3860 uint64_t d:32;
3861 uint64_t reserved_32_61:30;
3862 uint64_t v:2;
3863#endif
2349 } s; 3864 } s;
2350 struct cvmx_mio_twsx_twsi_sw_s cn30xx; 3865 struct cvmx_mio_twsx_twsi_sw_s cn30xx;
2351 struct cvmx_mio_twsx_twsi_sw_s cn31xx; 3866 struct cvmx_mio_twsx_twsi_sw_s cn31xx;
@@ -2364,13 +3879,19 @@ union cvmx_mio_twsx_twsi_sw {
2364 struct cvmx_mio_twsx_twsi_sw_s cn66xx; 3879 struct cvmx_mio_twsx_twsi_sw_s cn66xx;
2365 struct cvmx_mio_twsx_twsi_sw_s cn68xx; 3880 struct cvmx_mio_twsx_twsi_sw_s cn68xx;
2366 struct cvmx_mio_twsx_twsi_sw_s cn68xxp1; 3881 struct cvmx_mio_twsx_twsi_sw_s cn68xxp1;
3882 struct cvmx_mio_twsx_twsi_sw_s cnf71xx;
2367}; 3883};
2368 3884
2369union cvmx_mio_uartx_dlh { 3885union cvmx_mio_uartx_dlh {
2370 uint64_t u64; 3886 uint64_t u64;
2371 struct cvmx_mio_uartx_dlh_s { 3887 struct cvmx_mio_uartx_dlh_s {
3888#ifdef __BIG_ENDIAN_BITFIELD
2372 uint64_t reserved_8_63:56; 3889 uint64_t reserved_8_63:56;
2373 uint64_t dlh:8; 3890 uint64_t dlh:8;
3891#else
3892 uint64_t dlh:8;
3893 uint64_t reserved_8_63:56;
3894#endif
2374 } s; 3895 } s;
2375 struct cvmx_mio_uartx_dlh_s cn30xx; 3896 struct cvmx_mio_uartx_dlh_s cn30xx;
2376 struct cvmx_mio_uartx_dlh_s cn31xx; 3897 struct cvmx_mio_uartx_dlh_s cn31xx;
@@ -2389,13 +3910,19 @@ union cvmx_mio_uartx_dlh {
2389 struct cvmx_mio_uartx_dlh_s cn66xx; 3910 struct cvmx_mio_uartx_dlh_s cn66xx;
2390 struct cvmx_mio_uartx_dlh_s cn68xx; 3911 struct cvmx_mio_uartx_dlh_s cn68xx;
2391 struct cvmx_mio_uartx_dlh_s cn68xxp1; 3912 struct cvmx_mio_uartx_dlh_s cn68xxp1;
3913 struct cvmx_mio_uartx_dlh_s cnf71xx;
2392}; 3914};
2393 3915
2394union cvmx_mio_uartx_dll { 3916union cvmx_mio_uartx_dll {
2395 uint64_t u64; 3917 uint64_t u64;
2396 struct cvmx_mio_uartx_dll_s { 3918 struct cvmx_mio_uartx_dll_s {
3919#ifdef __BIG_ENDIAN_BITFIELD
2397 uint64_t reserved_8_63:56; 3920 uint64_t reserved_8_63:56;
2398 uint64_t dll:8; 3921 uint64_t dll:8;
3922#else
3923 uint64_t dll:8;
3924 uint64_t reserved_8_63:56;
3925#endif
2399 } s; 3926 } s;
2400 struct cvmx_mio_uartx_dll_s cn30xx; 3927 struct cvmx_mio_uartx_dll_s cn30xx;
2401 struct cvmx_mio_uartx_dll_s cn31xx; 3928 struct cvmx_mio_uartx_dll_s cn31xx;
@@ -2414,13 +3941,19 @@ union cvmx_mio_uartx_dll {
2414 struct cvmx_mio_uartx_dll_s cn66xx; 3941 struct cvmx_mio_uartx_dll_s cn66xx;
2415 struct cvmx_mio_uartx_dll_s cn68xx; 3942 struct cvmx_mio_uartx_dll_s cn68xx;
2416 struct cvmx_mio_uartx_dll_s cn68xxp1; 3943 struct cvmx_mio_uartx_dll_s cn68xxp1;
3944 struct cvmx_mio_uartx_dll_s cnf71xx;
2417}; 3945};
2418 3946
2419union cvmx_mio_uartx_far { 3947union cvmx_mio_uartx_far {
2420 uint64_t u64; 3948 uint64_t u64;
2421 struct cvmx_mio_uartx_far_s { 3949 struct cvmx_mio_uartx_far_s {
3950#ifdef __BIG_ENDIAN_BITFIELD
2422 uint64_t reserved_1_63:63; 3951 uint64_t reserved_1_63:63;
2423 uint64_t far:1; 3952 uint64_t far:1;
3953#else
3954 uint64_t far:1;
3955 uint64_t reserved_1_63:63;
3956#endif
2424 } s; 3957 } s;
2425 struct cvmx_mio_uartx_far_s cn30xx; 3958 struct cvmx_mio_uartx_far_s cn30xx;
2426 struct cvmx_mio_uartx_far_s cn31xx; 3959 struct cvmx_mio_uartx_far_s cn31xx;
@@ -2439,11 +3972,13 @@ union cvmx_mio_uartx_far {
2439 struct cvmx_mio_uartx_far_s cn66xx; 3972 struct cvmx_mio_uartx_far_s cn66xx;
2440 struct cvmx_mio_uartx_far_s cn68xx; 3973 struct cvmx_mio_uartx_far_s cn68xx;
2441 struct cvmx_mio_uartx_far_s cn68xxp1; 3974 struct cvmx_mio_uartx_far_s cn68xxp1;
3975 struct cvmx_mio_uartx_far_s cnf71xx;
2442}; 3976};
2443 3977
2444union cvmx_mio_uartx_fcr { 3978union cvmx_mio_uartx_fcr {
2445 uint64_t u64; 3979 uint64_t u64;
2446 struct cvmx_mio_uartx_fcr_s { 3980 struct cvmx_mio_uartx_fcr_s {
3981#ifdef __BIG_ENDIAN_BITFIELD
2447 uint64_t reserved_8_63:56; 3982 uint64_t reserved_8_63:56;
2448 uint64_t rxtrig:2; 3983 uint64_t rxtrig:2;
2449 uint64_t txtrig:2; 3984 uint64_t txtrig:2;
@@ -2451,6 +3986,15 @@ union cvmx_mio_uartx_fcr {
2451 uint64_t txfr:1; 3986 uint64_t txfr:1;
2452 uint64_t rxfr:1; 3987 uint64_t rxfr:1;
2453 uint64_t en:1; 3988 uint64_t en:1;
3989#else
3990 uint64_t en:1;
3991 uint64_t rxfr:1;
3992 uint64_t txfr:1;
3993 uint64_t reserved_3_3:1;
3994 uint64_t txtrig:2;
3995 uint64_t rxtrig:2;
3996 uint64_t reserved_8_63:56;
3997#endif
2454 } s; 3998 } s;
2455 struct cvmx_mio_uartx_fcr_s cn30xx; 3999 struct cvmx_mio_uartx_fcr_s cn30xx;
2456 struct cvmx_mio_uartx_fcr_s cn31xx; 4000 struct cvmx_mio_uartx_fcr_s cn31xx;
@@ -2469,13 +4013,19 @@ union cvmx_mio_uartx_fcr {
2469 struct cvmx_mio_uartx_fcr_s cn66xx; 4013 struct cvmx_mio_uartx_fcr_s cn66xx;
2470 struct cvmx_mio_uartx_fcr_s cn68xx; 4014 struct cvmx_mio_uartx_fcr_s cn68xx;
2471 struct cvmx_mio_uartx_fcr_s cn68xxp1; 4015 struct cvmx_mio_uartx_fcr_s cn68xxp1;
4016 struct cvmx_mio_uartx_fcr_s cnf71xx;
2472}; 4017};
2473 4018
2474union cvmx_mio_uartx_htx { 4019union cvmx_mio_uartx_htx {
2475 uint64_t u64; 4020 uint64_t u64;
2476 struct cvmx_mio_uartx_htx_s { 4021 struct cvmx_mio_uartx_htx_s {
4022#ifdef __BIG_ENDIAN_BITFIELD
2477 uint64_t reserved_1_63:63; 4023 uint64_t reserved_1_63:63;
2478 uint64_t htx:1; 4024 uint64_t htx:1;
4025#else
4026 uint64_t htx:1;
4027 uint64_t reserved_1_63:63;
4028#endif
2479 } s; 4029 } s;
2480 struct cvmx_mio_uartx_htx_s cn30xx; 4030 struct cvmx_mio_uartx_htx_s cn30xx;
2481 struct cvmx_mio_uartx_htx_s cn31xx; 4031 struct cvmx_mio_uartx_htx_s cn31xx;
@@ -2494,11 +4044,13 @@ union cvmx_mio_uartx_htx {
2494 struct cvmx_mio_uartx_htx_s cn66xx; 4044 struct cvmx_mio_uartx_htx_s cn66xx;
2495 struct cvmx_mio_uartx_htx_s cn68xx; 4045 struct cvmx_mio_uartx_htx_s cn68xx;
2496 struct cvmx_mio_uartx_htx_s cn68xxp1; 4046 struct cvmx_mio_uartx_htx_s cn68xxp1;
4047 struct cvmx_mio_uartx_htx_s cnf71xx;
2497}; 4048};
2498 4049
2499union cvmx_mio_uartx_ier { 4050union cvmx_mio_uartx_ier {
2500 uint64_t u64; 4051 uint64_t u64;
2501 struct cvmx_mio_uartx_ier_s { 4052 struct cvmx_mio_uartx_ier_s {
4053#ifdef __BIG_ENDIAN_BITFIELD
2502 uint64_t reserved_8_63:56; 4054 uint64_t reserved_8_63:56;
2503 uint64_t ptime:1; 4055 uint64_t ptime:1;
2504 uint64_t reserved_4_6:3; 4056 uint64_t reserved_4_6:3;
@@ -2506,6 +4058,15 @@ union cvmx_mio_uartx_ier {
2506 uint64_t elsi:1; 4058 uint64_t elsi:1;
2507 uint64_t etbei:1; 4059 uint64_t etbei:1;
2508 uint64_t erbfi:1; 4060 uint64_t erbfi:1;
4061#else
4062 uint64_t erbfi:1;
4063 uint64_t etbei:1;
4064 uint64_t elsi:1;
4065 uint64_t edssi:1;
4066 uint64_t reserved_4_6:3;
4067 uint64_t ptime:1;
4068 uint64_t reserved_8_63:56;
4069#endif
2509 } s; 4070 } s;
2510 struct cvmx_mio_uartx_ier_s cn30xx; 4071 struct cvmx_mio_uartx_ier_s cn30xx;
2511 struct cvmx_mio_uartx_ier_s cn31xx; 4072 struct cvmx_mio_uartx_ier_s cn31xx;
@@ -2524,15 +4085,23 @@ union cvmx_mio_uartx_ier {
2524 struct cvmx_mio_uartx_ier_s cn66xx; 4085 struct cvmx_mio_uartx_ier_s cn66xx;
2525 struct cvmx_mio_uartx_ier_s cn68xx; 4086 struct cvmx_mio_uartx_ier_s cn68xx;
2526 struct cvmx_mio_uartx_ier_s cn68xxp1; 4087 struct cvmx_mio_uartx_ier_s cn68xxp1;
4088 struct cvmx_mio_uartx_ier_s cnf71xx;
2527}; 4089};
2528 4090
2529union cvmx_mio_uartx_iir { 4091union cvmx_mio_uartx_iir {
2530 uint64_t u64; 4092 uint64_t u64;
2531 struct cvmx_mio_uartx_iir_s { 4093 struct cvmx_mio_uartx_iir_s {
4094#ifdef __BIG_ENDIAN_BITFIELD
2532 uint64_t reserved_8_63:56; 4095 uint64_t reserved_8_63:56;
2533 uint64_t fen:2; 4096 uint64_t fen:2;
2534 uint64_t reserved_4_5:2; 4097 uint64_t reserved_4_5:2;
2535 uint64_t iid:4; 4098 uint64_t iid:4;
4099#else
4100 uint64_t iid:4;
4101 uint64_t reserved_4_5:2;
4102 uint64_t fen:2;
4103 uint64_t reserved_8_63:56;
4104#endif
2536 } s; 4105 } s;
2537 struct cvmx_mio_uartx_iir_s cn30xx; 4106 struct cvmx_mio_uartx_iir_s cn30xx;
2538 struct cvmx_mio_uartx_iir_s cn31xx; 4107 struct cvmx_mio_uartx_iir_s cn31xx;
@@ -2551,11 +4120,13 @@ union cvmx_mio_uartx_iir {
2551 struct cvmx_mio_uartx_iir_s cn66xx; 4120 struct cvmx_mio_uartx_iir_s cn66xx;
2552 struct cvmx_mio_uartx_iir_s cn68xx; 4121 struct cvmx_mio_uartx_iir_s cn68xx;
2553 struct cvmx_mio_uartx_iir_s cn68xxp1; 4122 struct cvmx_mio_uartx_iir_s cn68xxp1;
4123 struct cvmx_mio_uartx_iir_s cnf71xx;
2554}; 4124};
2555 4125
2556union cvmx_mio_uartx_lcr { 4126union cvmx_mio_uartx_lcr {
2557 uint64_t u64; 4127 uint64_t u64;
2558 struct cvmx_mio_uartx_lcr_s { 4128 struct cvmx_mio_uartx_lcr_s {
4129#ifdef __BIG_ENDIAN_BITFIELD
2559 uint64_t reserved_8_63:56; 4130 uint64_t reserved_8_63:56;
2560 uint64_t dlab:1; 4131 uint64_t dlab:1;
2561 uint64_t brk:1; 4132 uint64_t brk:1;
@@ -2564,6 +4135,16 @@ union cvmx_mio_uartx_lcr {
2564 uint64_t pen:1; 4135 uint64_t pen:1;
2565 uint64_t stop:1; 4136 uint64_t stop:1;
2566 uint64_t cls:2; 4137 uint64_t cls:2;
4138#else
4139 uint64_t cls:2;
4140 uint64_t stop:1;
4141 uint64_t pen:1;
4142 uint64_t eps:1;
4143 uint64_t reserved_5_5:1;
4144 uint64_t brk:1;
4145 uint64_t dlab:1;
4146 uint64_t reserved_8_63:56;
4147#endif
2567 } s; 4148 } s;
2568 struct cvmx_mio_uartx_lcr_s cn30xx; 4149 struct cvmx_mio_uartx_lcr_s cn30xx;
2569 struct cvmx_mio_uartx_lcr_s cn31xx; 4150 struct cvmx_mio_uartx_lcr_s cn31xx;
@@ -2582,11 +4163,13 @@ union cvmx_mio_uartx_lcr {
2582 struct cvmx_mio_uartx_lcr_s cn66xx; 4163 struct cvmx_mio_uartx_lcr_s cn66xx;
2583 struct cvmx_mio_uartx_lcr_s cn68xx; 4164 struct cvmx_mio_uartx_lcr_s cn68xx;
2584 struct cvmx_mio_uartx_lcr_s cn68xxp1; 4165 struct cvmx_mio_uartx_lcr_s cn68xxp1;
4166 struct cvmx_mio_uartx_lcr_s cnf71xx;
2585}; 4167};
2586 4168
2587union cvmx_mio_uartx_lsr { 4169union cvmx_mio_uartx_lsr {
2588 uint64_t u64; 4170 uint64_t u64;
2589 struct cvmx_mio_uartx_lsr_s { 4171 struct cvmx_mio_uartx_lsr_s {
4172#ifdef __BIG_ENDIAN_BITFIELD
2590 uint64_t reserved_8_63:56; 4173 uint64_t reserved_8_63:56;
2591 uint64_t ferr:1; 4174 uint64_t ferr:1;
2592 uint64_t temt:1; 4175 uint64_t temt:1;
@@ -2596,6 +4179,17 @@ union cvmx_mio_uartx_lsr {
2596 uint64_t pe:1; 4179 uint64_t pe:1;
2597 uint64_t oe:1; 4180 uint64_t oe:1;
2598 uint64_t dr:1; 4181 uint64_t dr:1;
4182#else
4183 uint64_t dr:1;
4184 uint64_t oe:1;
4185 uint64_t pe:1;
4186 uint64_t fe:1;
4187 uint64_t bi:1;
4188 uint64_t thre:1;
4189 uint64_t temt:1;
4190 uint64_t ferr:1;
4191 uint64_t reserved_8_63:56;
4192#endif
2599 } s; 4193 } s;
2600 struct cvmx_mio_uartx_lsr_s cn30xx; 4194 struct cvmx_mio_uartx_lsr_s cn30xx;
2601 struct cvmx_mio_uartx_lsr_s cn31xx; 4195 struct cvmx_mio_uartx_lsr_s cn31xx;
@@ -2614,11 +4208,13 @@ union cvmx_mio_uartx_lsr {
2614 struct cvmx_mio_uartx_lsr_s cn66xx; 4208 struct cvmx_mio_uartx_lsr_s cn66xx;
2615 struct cvmx_mio_uartx_lsr_s cn68xx; 4209 struct cvmx_mio_uartx_lsr_s cn68xx;
2616 struct cvmx_mio_uartx_lsr_s cn68xxp1; 4210 struct cvmx_mio_uartx_lsr_s cn68xxp1;
4211 struct cvmx_mio_uartx_lsr_s cnf71xx;
2617}; 4212};
2618 4213
2619union cvmx_mio_uartx_mcr { 4214union cvmx_mio_uartx_mcr {
2620 uint64_t u64; 4215 uint64_t u64;
2621 struct cvmx_mio_uartx_mcr_s { 4216 struct cvmx_mio_uartx_mcr_s {
4217#ifdef __BIG_ENDIAN_BITFIELD
2622 uint64_t reserved_6_63:58; 4218 uint64_t reserved_6_63:58;
2623 uint64_t afce:1; 4219 uint64_t afce:1;
2624 uint64_t loop:1; 4220 uint64_t loop:1;
@@ -2626,6 +4222,15 @@ union cvmx_mio_uartx_mcr {
2626 uint64_t out1:1; 4222 uint64_t out1:1;
2627 uint64_t rts:1; 4223 uint64_t rts:1;
2628 uint64_t dtr:1; 4224 uint64_t dtr:1;
4225#else
4226 uint64_t dtr:1;
4227 uint64_t rts:1;
4228 uint64_t out1:1;
4229 uint64_t out2:1;
4230 uint64_t loop:1;
4231 uint64_t afce:1;
4232 uint64_t reserved_6_63:58;
4233#endif
2629 } s; 4234 } s;
2630 struct cvmx_mio_uartx_mcr_s cn30xx; 4235 struct cvmx_mio_uartx_mcr_s cn30xx;
2631 struct cvmx_mio_uartx_mcr_s cn31xx; 4236 struct cvmx_mio_uartx_mcr_s cn31xx;
@@ -2644,11 +4249,13 @@ union cvmx_mio_uartx_mcr {
2644 struct cvmx_mio_uartx_mcr_s cn66xx; 4249 struct cvmx_mio_uartx_mcr_s cn66xx;
2645 struct cvmx_mio_uartx_mcr_s cn68xx; 4250 struct cvmx_mio_uartx_mcr_s cn68xx;
2646 struct cvmx_mio_uartx_mcr_s cn68xxp1; 4251 struct cvmx_mio_uartx_mcr_s cn68xxp1;
4252 struct cvmx_mio_uartx_mcr_s cnf71xx;
2647}; 4253};
2648 4254
2649union cvmx_mio_uartx_msr { 4255union cvmx_mio_uartx_msr {
2650 uint64_t u64; 4256 uint64_t u64;
2651 struct cvmx_mio_uartx_msr_s { 4257 struct cvmx_mio_uartx_msr_s {
4258#ifdef __BIG_ENDIAN_BITFIELD
2652 uint64_t reserved_8_63:56; 4259 uint64_t reserved_8_63:56;
2653 uint64_t dcd:1; 4260 uint64_t dcd:1;
2654 uint64_t ri:1; 4261 uint64_t ri:1;
@@ -2658,6 +4265,17 @@ union cvmx_mio_uartx_msr {
2658 uint64_t teri:1; 4265 uint64_t teri:1;
2659 uint64_t ddsr:1; 4266 uint64_t ddsr:1;
2660 uint64_t dcts:1; 4267 uint64_t dcts:1;
4268#else
4269 uint64_t dcts:1;
4270 uint64_t ddsr:1;
4271 uint64_t teri:1;
4272 uint64_t ddcd:1;
4273 uint64_t cts:1;
4274 uint64_t dsr:1;
4275 uint64_t ri:1;
4276 uint64_t dcd:1;
4277 uint64_t reserved_8_63:56;
4278#endif
2661 } s; 4279 } s;
2662 struct cvmx_mio_uartx_msr_s cn30xx; 4280 struct cvmx_mio_uartx_msr_s cn30xx;
2663 struct cvmx_mio_uartx_msr_s cn31xx; 4281 struct cvmx_mio_uartx_msr_s cn31xx;
@@ -2676,13 +4294,19 @@ union cvmx_mio_uartx_msr {
2676 struct cvmx_mio_uartx_msr_s cn66xx; 4294 struct cvmx_mio_uartx_msr_s cn66xx;
2677 struct cvmx_mio_uartx_msr_s cn68xx; 4295 struct cvmx_mio_uartx_msr_s cn68xx;
2678 struct cvmx_mio_uartx_msr_s cn68xxp1; 4296 struct cvmx_mio_uartx_msr_s cn68xxp1;
4297 struct cvmx_mio_uartx_msr_s cnf71xx;
2679}; 4298};
2680 4299
2681union cvmx_mio_uartx_rbr { 4300union cvmx_mio_uartx_rbr {
2682 uint64_t u64; 4301 uint64_t u64;
2683 struct cvmx_mio_uartx_rbr_s { 4302 struct cvmx_mio_uartx_rbr_s {
4303#ifdef __BIG_ENDIAN_BITFIELD
2684 uint64_t reserved_8_63:56; 4304 uint64_t reserved_8_63:56;
2685 uint64_t rbr:8; 4305 uint64_t rbr:8;
4306#else
4307 uint64_t rbr:8;
4308 uint64_t reserved_8_63:56;
4309#endif
2686 } s; 4310 } s;
2687 struct cvmx_mio_uartx_rbr_s cn30xx; 4311 struct cvmx_mio_uartx_rbr_s cn30xx;
2688 struct cvmx_mio_uartx_rbr_s cn31xx; 4312 struct cvmx_mio_uartx_rbr_s cn31xx;
@@ -2701,13 +4325,19 @@ union cvmx_mio_uartx_rbr {
2701 struct cvmx_mio_uartx_rbr_s cn66xx; 4325 struct cvmx_mio_uartx_rbr_s cn66xx;
2702 struct cvmx_mio_uartx_rbr_s cn68xx; 4326 struct cvmx_mio_uartx_rbr_s cn68xx;
2703 struct cvmx_mio_uartx_rbr_s cn68xxp1; 4327 struct cvmx_mio_uartx_rbr_s cn68xxp1;
4328 struct cvmx_mio_uartx_rbr_s cnf71xx;
2704}; 4329};
2705 4330
2706union cvmx_mio_uartx_rfl { 4331union cvmx_mio_uartx_rfl {
2707 uint64_t u64; 4332 uint64_t u64;
2708 struct cvmx_mio_uartx_rfl_s { 4333 struct cvmx_mio_uartx_rfl_s {
4334#ifdef __BIG_ENDIAN_BITFIELD
2709 uint64_t reserved_7_63:57; 4335 uint64_t reserved_7_63:57;
2710 uint64_t rfl:7; 4336 uint64_t rfl:7;
4337#else
4338 uint64_t rfl:7;
4339 uint64_t reserved_7_63:57;
4340#endif
2711 } s; 4341 } s;
2712 struct cvmx_mio_uartx_rfl_s cn30xx; 4342 struct cvmx_mio_uartx_rfl_s cn30xx;
2713 struct cvmx_mio_uartx_rfl_s cn31xx; 4343 struct cvmx_mio_uartx_rfl_s cn31xx;
@@ -2726,15 +4356,23 @@ union cvmx_mio_uartx_rfl {
2726 struct cvmx_mio_uartx_rfl_s cn66xx; 4356 struct cvmx_mio_uartx_rfl_s cn66xx;
2727 struct cvmx_mio_uartx_rfl_s cn68xx; 4357 struct cvmx_mio_uartx_rfl_s cn68xx;
2728 struct cvmx_mio_uartx_rfl_s cn68xxp1; 4358 struct cvmx_mio_uartx_rfl_s cn68xxp1;
4359 struct cvmx_mio_uartx_rfl_s cnf71xx;
2729}; 4360};
2730 4361
2731union cvmx_mio_uartx_rfw { 4362union cvmx_mio_uartx_rfw {
2732 uint64_t u64; 4363 uint64_t u64;
2733 struct cvmx_mio_uartx_rfw_s { 4364 struct cvmx_mio_uartx_rfw_s {
4365#ifdef __BIG_ENDIAN_BITFIELD
2734 uint64_t reserved_10_63:54; 4366 uint64_t reserved_10_63:54;
2735 uint64_t rffe:1; 4367 uint64_t rffe:1;
2736 uint64_t rfpe:1; 4368 uint64_t rfpe:1;
2737 uint64_t rfwd:8; 4369 uint64_t rfwd:8;
4370#else
4371 uint64_t rfwd:8;
4372 uint64_t rfpe:1;
4373 uint64_t rffe:1;
4374 uint64_t reserved_10_63:54;
4375#endif
2738 } s; 4376 } s;
2739 struct cvmx_mio_uartx_rfw_s cn30xx; 4377 struct cvmx_mio_uartx_rfw_s cn30xx;
2740 struct cvmx_mio_uartx_rfw_s cn31xx; 4378 struct cvmx_mio_uartx_rfw_s cn31xx;
@@ -2753,13 +4391,19 @@ union cvmx_mio_uartx_rfw {
2753 struct cvmx_mio_uartx_rfw_s cn66xx; 4391 struct cvmx_mio_uartx_rfw_s cn66xx;
2754 struct cvmx_mio_uartx_rfw_s cn68xx; 4392 struct cvmx_mio_uartx_rfw_s cn68xx;
2755 struct cvmx_mio_uartx_rfw_s cn68xxp1; 4393 struct cvmx_mio_uartx_rfw_s cn68xxp1;
4394 struct cvmx_mio_uartx_rfw_s cnf71xx;
2756}; 4395};
2757 4396
2758union cvmx_mio_uartx_sbcr { 4397union cvmx_mio_uartx_sbcr {
2759 uint64_t u64; 4398 uint64_t u64;
2760 struct cvmx_mio_uartx_sbcr_s { 4399 struct cvmx_mio_uartx_sbcr_s {
4400#ifdef __BIG_ENDIAN_BITFIELD
2761 uint64_t reserved_1_63:63; 4401 uint64_t reserved_1_63:63;
2762 uint64_t sbcr:1; 4402 uint64_t sbcr:1;
4403#else
4404 uint64_t sbcr:1;
4405 uint64_t reserved_1_63:63;
4406#endif
2763 } s; 4407 } s;
2764 struct cvmx_mio_uartx_sbcr_s cn30xx; 4408 struct cvmx_mio_uartx_sbcr_s cn30xx;
2765 struct cvmx_mio_uartx_sbcr_s cn31xx; 4409 struct cvmx_mio_uartx_sbcr_s cn31xx;
@@ -2778,13 +4422,19 @@ union cvmx_mio_uartx_sbcr {
2778 struct cvmx_mio_uartx_sbcr_s cn66xx; 4422 struct cvmx_mio_uartx_sbcr_s cn66xx;
2779 struct cvmx_mio_uartx_sbcr_s cn68xx; 4423 struct cvmx_mio_uartx_sbcr_s cn68xx;
2780 struct cvmx_mio_uartx_sbcr_s cn68xxp1; 4424 struct cvmx_mio_uartx_sbcr_s cn68xxp1;
4425 struct cvmx_mio_uartx_sbcr_s cnf71xx;
2781}; 4426};
2782 4427
2783union cvmx_mio_uartx_scr { 4428union cvmx_mio_uartx_scr {
2784 uint64_t u64; 4429 uint64_t u64;
2785 struct cvmx_mio_uartx_scr_s { 4430 struct cvmx_mio_uartx_scr_s {
4431#ifdef __BIG_ENDIAN_BITFIELD
2786 uint64_t reserved_8_63:56; 4432 uint64_t reserved_8_63:56;
2787 uint64_t scr:8; 4433 uint64_t scr:8;
4434#else
4435 uint64_t scr:8;
4436 uint64_t reserved_8_63:56;
4437#endif
2788 } s; 4438 } s;
2789 struct cvmx_mio_uartx_scr_s cn30xx; 4439 struct cvmx_mio_uartx_scr_s cn30xx;
2790 struct cvmx_mio_uartx_scr_s cn31xx; 4440 struct cvmx_mio_uartx_scr_s cn31xx;
@@ -2803,13 +4453,19 @@ union cvmx_mio_uartx_scr {
2803 struct cvmx_mio_uartx_scr_s cn66xx; 4453 struct cvmx_mio_uartx_scr_s cn66xx;
2804 struct cvmx_mio_uartx_scr_s cn68xx; 4454 struct cvmx_mio_uartx_scr_s cn68xx;
2805 struct cvmx_mio_uartx_scr_s cn68xxp1; 4455 struct cvmx_mio_uartx_scr_s cn68xxp1;
4456 struct cvmx_mio_uartx_scr_s cnf71xx;
2806}; 4457};
2807 4458
2808union cvmx_mio_uartx_sfe { 4459union cvmx_mio_uartx_sfe {
2809 uint64_t u64; 4460 uint64_t u64;
2810 struct cvmx_mio_uartx_sfe_s { 4461 struct cvmx_mio_uartx_sfe_s {
4462#ifdef __BIG_ENDIAN_BITFIELD
2811 uint64_t reserved_1_63:63; 4463 uint64_t reserved_1_63:63;
2812 uint64_t sfe:1; 4464 uint64_t sfe:1;
4465#else
4466 uint64_t sfe:1;
4467 uint64_t reserved_1_63:63;
4468#endif
2813 } s; 4469 } s;
2814 struct cvmx_mio_uartx_sfe_s cn30xx; 4470 struct cvmx_mio_uartx_sfe_s cn30xx;
2815 struct cvmx_mio_uartx_sfe_s cn31xx; 4471 struct cvmx_mio_uartx_sfe_s cn31xx;
@@ -2828,15 +4484,23 @@ union cvmx_mio_uartx_sfe {
2828 struct cvmx_mio_uartx_sfe_s cn66xx; 4484 struct cvmx_mio_uartx_sfe_s cn66xx;
2829 struct cvmx_mio_uartx_sfe_s cn68xx; 4485 struct cvmx_mio_uartx_sfe_s cn68xx;
2830 struct cvmx_mio_uartx_sfe_s cn68xxp1; 4486 struct cvmx_mio_uartx_sfe_s cn68xxp1;
4487 struct cvmx_mio_uartx_sfe_s cnf71xx;
2831}; 4488};
2832 4489
2833union cvmx_mio_uartx_srr { 4490union cvmx_mio_uartx_srr {
2834 uint64_t u64; 4491 uint64_t u64;
2835 struct cvmx_mio_uartx_srr_s { 4492 struct cvmx_mio_uartx_srr_s {
4493#ifdef __BIG_ENDIAN_BITFIELD
2836 uint64_t reserved_3_63:61; 4494 uint64_t reserved_3_63:61;
2837 uint64_t stfr:1; 4495 uint64_t stfr:1;
2838 uint64_t srfr:1; 4496 uint64_t srfr:1;
2839 uint64_t usr:1; 4497 uint64_t usr:1;
4498#else
4499 uint64_t usr:1;
4500 uint64_t srfr:1;
4501 uint64_t stfr:1;
4502 uint64_t reserved_3_63:61;
4503#endif
2840 } s; 4504 } s;
2841 struct cvmx_mio_uartx_srr_s cn30xx; 4505 struct cvmx_mio_uartx_srr_s cn30xx;
2842 struct cvmx_mio_uartx_srr_s cn31xx; 4506 struct cvmx_mio_uartx_srr_s cn31xx;
@@ -2855,13 +4519,19 @@ union cvmx_mio_uartx_srr {
2855 struct cvmx_mio_uartx_srr_s cn66xx; 4519 struct cvmx_mio_uartx_srr_s cn66xx;
2856 struct cvmx_mio_uartx_srr_s cn68xx; 4520 struct cvmx_mio_uartx_srr_s cn68xx;
2857 struct cvmx_mio_uartx_srr_s cn68xxp1; 4521 struct cvmx_mio_uartx_srr_s cn68xxp1;
4522 struct cvmx_mio_uartx_srr_s cnf71xx;
2858}; 4523};
2859 4524
2860union cvmx_mio_uartx_srt { 4525union cvmx_mio_uartx_srt {
2861 uint64_t u64; 4526 uint64_t u64;
2862 struct cvmx_mio_uartx_srt_s { 4527 struct cvmx_mio_uartx_srt_s {
4528#ifdef __BIG_ENDIAN_BITFIELD
2863 uint64_t reserved_2_63:62; 4529 uint64_t reserved_2_63:62;
2864 uint64_t srt:2; 4530 uint64_t srt:2;
4531#else
4532 uint64_t srt:2;
4533 uint64_t reserved_2_63:62;
4534#endif
2865 } s; 4535 } s;
2866 struct cvmx_mio_uartx_srt_s cn30xx; 4536 struct cvmx_mio_uartx_srt_s cn30xx;
2867 struct cvmx_mio_uartx_srt_s cn31xx; 4537 struct cvmx_mio_uartx_srt_s cn31xx;
@@ -2880,13 +4550,19 @@ union cvmx_mio_uartx_srt {
2880 struct cvmx_mio_uartx_srt_s cn66xx; 4550 struct cvmx_mio_uartx_srt_s cn66xx;
2881 struct cvmx_mio_uartx_srt_s cn68xx; 4551 struct cvmx_mio_uartx_srt_s cn68xx;
2882 struct cvmx_mio_uartx_srt_s cn68xxp1; 4552 struct cvmx_mio_uartx_srt_s cn68xxp1;
4553 struct cvmx_mio_uartx_srt_s cnf71xx;
2883}; 4554};
2884 4555
2885union cvmx_mio_uartx_srts { 4556union cvmx_mio_uartx_srts {
2886 uint64_t u64; 4557 uint64_t u64;
2887 struct cvmx_mio_uartx_srts_s { 4558 struct cvmx_mio_uartx_srts_s {
4559#ifdef __BIG_ENDIAN_BITFIELD
2888 uint64_t reserved_1_63:63; 4560 uint64_t reserved_1_63:63;
2889 uint64_t srts:1; 4561 uint64_t srts:1;
4562#else
4563 uint64_t srts:1;
4564 uint64_t reserved_1_63:63;
4565#endif
2890 } s; 4566 } s;
2891 struct cvmx_mio_uartx_srts_s cn30xx; 4567 struct cvmx_mio_uartx_srts_s cn30xx;
2892 struct cvmx_mio_uartx_srts_s cn31xx; 4568 struct cvmx_mio_uartx_srts_s cn31xx;
@@ -2905,13 +4581,19 @@ union cvmx_mio_uartx_srts {
2905 struct cvmx_mio_uartx_srts_s cn66xx; 4581 struct cvmx_mio_uartx_srts_s cn66xx;
2906 struct cvmx_mio_uartx_srts_s cn68xx; 4582 struct cvmx_mio_uartx_srts_s cn68xx;
2907 struct cvmx_mio_uartx_srts_s cn68xxp1; 4583 struct cvmx_mio_uartx_srts_s cn68xxp1;
4584 struct cvmx_mio_uartx_srts_s cnf71xx;
2908}; 4585};
2909 4586
2910union cvmx_mio_uartx_stt { 4587union cvmx_mio_uartx_stt {
2911 uint64_t u64; 4588 uint64_t u64;
2912 struct cvmx_mio_uartx_stt_s { 4589 struct cvmx_mio_uartx_stt_s {
4590#ifdef __BIG_ENDIAN_BITFIELD
2913 uint64_t reserved_2_63:62; 4591 uint64_t reserved_2_63:62;
2914 uint64_t stt:2; 4592 uint64_t stt:2;
4593#else
4594 uint64_t stt:2;
4595 uint64_t reserved_2_63:62;
4596#endif
2915 } s; 4597 } s;
2916 struct cvmx_mio_uartx_stt_s cn30xx; 4598 struct cvmx_mio_uartx_stt_s cn30xx;
2917 struct cvmx_mio_uartx_stt_s cn31xx; 4599 struct cvmx_mio_uartx_stt_s cn31xx;
@@ -2930,13 +4612,19 @@ union cvmx_mio_uartx_stt {
2930 struct cvmx_mio_uartx_stt_s cn66xx; 4612 struct cvmx_mio_uartx_stt_s cn66xx;
2931 struct cvmx_mio_uartx_stt_s cn68xx; 4613 struct cvmx_mio_uartx_stt_s cn68xx;
2932 struct cvmx_mio_uartx_stt_s cn68xxp1; 4614 struct cvmx_mio_uartx_stt_s cn68xxp1;
4615 struct cvmx_mio_uartx_stt_s cnf71xx;
2933}; 4616};
2934 4617
2935union cvmx_mio_uartx_tfl { 4618union cvmx_mio_uartx_tfl {
2936 uint64_t u64; 4619 uint64_t u64;
2937 struct cvmx_mio_uartx_tfl_s { 4620 struct cvmx_mio_uartx_tfl_s {
4621#ifdef __BIG_ENDIAN_BITFIELD
2938 uint64_t reserved_7_63:57; 4622 uint64_t reserved_7_63:57;
2939 uint64_t tfl:7; 4623 uint64_t tfl:7;
4624#else
4625 uint64_t tfl:7;
4626 uint64_t reserved_7_63:57;
4627#endif
2940 } s; 4628 } s;
2941 struct cvmx_mio_uartx_tfl_s cn30xx; 4629 struct cvmx_mio_uartx_tfl_s cn30xx;
2942 struct cvmx_mio_uartx_tfl_s cn31xx; 4630 struct cvmx_mio_uartx_tfl_s cn31xx;
@@ -2955,13 +4643,19 @@ union cvmx_mio_uartx_tfl {
2955 struct cvmx_mio_uartx_tfl_s cn66xx; 4643 struct cvmx_mio_uartx_tfl_s cn66xx;
2956 struct cvmx_mio_uartx_tfl_s cn68xx; 4644 struct cvmx_mio_uartx_tfl_s cn68xx;
2957 struct cvmx_mio_uartx_tfl_s cn68xxp1; 4645 struct cvmx_mio_uartx_tfl_s cn68xxp1;
4646 struct cvmx_mio_uartx_tfl_s cnf71xx;
2958}; 4647};
2959 4648
2960union cvmx_mio_uartx_tfr { 4649union cvmx_mio_uartx_tfr {
2961 uint64_t u64; 4650 uint64_t u64;
2962 struct cvmx_mio_uartx_tfr_s { 4651 struct cvmx_mio_uartx_tfr_s {
4652#ifdef __BIG_ENDIAN_BITFIELD
2963 uint64_t reserved_8_63:56; 4653 uint64_t reserved_8_63:56;
2964 uint64_t tfr:8; 4654 uint64_t tfr:8;
4655#else
4656 uint64_t tfr:8;
4657 uint64_t reserved_8_63:56;
4658#endif
2965 } s; 4659 } s;
2966 struct cvmx_mio_uartx_tfr_s cn30xx; 4660 struct cvmx_mio_uartx_tfr_s cn30xx;
2967 struct cvmx_mio_uartx_tfr_s cn31xx; 4661 struct cvmx_mio_uartx_tfr_s cn31xx;
@@ -2980,13 +4674,19 @@ union cvmx_mio_uartx_tfr {
2980 struct cvmx_mio_uartx_tfr_s cn66xx; 4674 struct cvmx_mio_uartx_tfr_s cn66xx;
2981 struct cvmx_mio_uartx_tfr_s cn68xx; 4675 struct cvmx_mio_uartx_tfr_s cn68xx;
2982 struct cvmx_mio_uartx_tfr_s cn68xxp1; 4676 struct cvmx_mio_uartx_tfr_s cn68xxp1;
4677 struct cvmx_mio_uartx_tfr_s cnf71xx;
2983}; 4678};
2984 4679
2985union cvmx_mio_uartx_thr { 4680union cvmx_mio_uartx_thr {
2986 uint64_t u64; 4681 uint64_t u64;
2987 struct cvmx_mio_uartx_thr_s { 4682 struct cvmx_mio_uartx_thr_s {
4683#ifdef __BIG_ENDIAN_BITFIELD
2988 uint64_t reserved_8_63:56; 4684 uint64_t reserved_8_63:56;
2989 uint64_t thr:8; 4685 uint64_t thr:8;
4686#else
4687 uint64_t thr:8;
4688 uint64_t reserved_8_63:56;
4689#endif
2990 } s; 4690 } s;
2991 struct cvmx_mio_uartx_thr_s cn30xx; 4691 struct cvmx_mio_uartx_thr_s cn30xx;
2992 struct cvmx_mio_uartx_thr_s cn31xx; 4692 struct cvmx_mio_uartx_thr_s cn31xx;
@@ -3005,17 +4705,27 @@ union cvmx_mio_uartx_thr {
3005 struct cvmx_mio_uartx_thr_s cn66xx; 4705 struct cvmx_mio_uartx_thr_s cn66xx;
3006 struct cvmx_mio_uartx_thr_s cn68xx; 4706 struct cvmx_mio_uartx_thr_s cn68xx;
3007 struct cvmx_mio_uartx_thr_s cn68xxp1; 4707 struct cvmx_mio_uartx_thr_s cn68xxp1;
4708 struct cvmx_mio_uartx_thr_s cnf71xx;
3008}; 4709};
3009 4710
3010union cvmx_mio_uartx_usr { 4711union cvmx_mio_uartx_usr {
3011 uint64_t u64; 4712 uint64_t u64;
3012 struct cvmx_mio_uartx_usr_s { 4713 struct cvmx_mio_uartx_usr_s {
4714#ifdef __BIG_ENDIAN_BITFIELD
3013 uint64_t reserved_5_63:59; 4715 uint64_t reserved_5_63:59;
3014 uint64_t rff:1; 4716 uint64_t rff:1;
3015 uint64_t rfne:1; 4717 uint64_t rfne:1;
3016 uint64_t tfe:1; 4718 uint64_t tfe:1;
3017 uint64_t tfnf:1; 4719 uint64_t tfnf:1;
3018 uint64_t busy:1; 4720 uint64_t busy:1;
4721#else
4722 uint64_t busy:1;
4723 uint64_t tfnf:1;
4724 uint64_t tfe:1;
4725 uint64_t rfne:1;
4726 uint64_t rff:1;
4727 uint64_t reserved_5_63:59;
4728#endif
3019 } s; 4729 } s;
3020 struct cvmx_mio_uartx_usr_s cn30xx; 4730 struct cvmx_mio_uartx_usr_s cn30xx;
3021 struct cvmx_mio_uartx_usr_s cn31xx; 4731 struct cvmx_mio_uartx_usr_s cn31xx;
@@ -3034,13 +4744,19 @@ union cvmx_mio_uartx_usr {
3034 struct cvmx_mio_uartx_usr_s cn66xx; 4744 struct cvmx_mio_uartx_usr_s cn66xx;
3035 struct cvmx_mio_uartx_usr_s cn68xx; 4745 struct cvmx_mio_uartx_usr_s cn68xx;
3036 struct cvmx_mio_uartx_usr_s cn68xxp1; 4746 struct cvmx_mio_uartx_usr_s cn68xxp1;
4747 struct cvmx_mio_uartx_usr_s cnf71xx;
3037}; 4748};
3038 4749
3039union cvmx_mio_uart2_dlh { 4750union cvmx_mio_uart2_dlh {
3040 uint64_t u64; 4751 uint64_t u64;
3041 struct cvmx_mio_uart2_dlh_s { 4752 struct cvmx_mio_uart2_dlh_s {
4753#ifdef __BIG_ENDIAN_BITFIELD
3042 uint64_t reserved_8_63:56; 4754 uint64_t reserved_8_63:56;
3043 uint64_t dlh:8; 4755 uint64_t dlh:8;
4756#else
4757 uint64_t dlh:8;
4758 uint64_t reserved_8_63:56;
4759#endif
3044 } s; 4760 } s;
3045 struct cvmx_mio_uart2_dlh_s cn52xx; 4761 struct cvmx_mio_uart2_dlh_s cn52xx;
3046 struct cvmx_mio_uart2_dlh_s cn52xxp1; 4762 struct cvmx_mio_uart2_dlh_s cn52xxp1;
@@ -3049,8 +4765,13 @@ union cvmx_mio_uart2_dlh {
3049union cvmx_mio_uart2_dll { 4765union cvmx_mio_uart2_dll {
3050 uint64_t u64; 4766 uint64_t u64;
3051 struct cvmx_mio_uart2_dll_s { 4767 struct cvmx_mio_uart2_dll_s {
4768#ifdef __BIG_ENDIAN_BITFIELD
3052 uint64_t reserved_8_63:56; 4769 uint64_t reserved_8_63:56;
3053 uint64_t dll:8; 4770 uint64_t dll:8;
4771#else
4772 uint64_t dll:8;
4773 uint64_t reserved_8_63:56;
4774#endif
3054 } s; 4775 } s;
3055 struct cvmx_mio_uart2_dll_s cn52xx; 4776 struct cvmx_mio_uart2_dll_s cn52xx;
3056 struct cvmx_mio_uart2_dll_s cn52xxp1; 4777 struct cvmx_mio_uart2_dll_s cn52xxp1;
@@ -3059,8 +4780,13 @@ union cvmx_mio_uart2_dll {
3059union cvmx_mio_uart2_far { 4780union cvmx_mio_uart2_far {
3060 uint64_t u64; 4781 uint64_t u64;
3061 struct cvmx_mio_uart2_far_s { 4782 struct cvmx_mio_uart2_far_s {
4783#ifdef __BIG_ENDIAN_BITFIELD
3062 uint64_t reserved_1_63:63; 4784 uint64_t reserved_1_63:63;
3063 uint64_t far:1; 4785 uint64_t far:1;
4786#else
4787 uint64_t far:1;
4788 uint64_t reserved_1_63:63;
4789#endif
3064 } s; 4790 } s;
3065 struct cvmx_mio_uart2_far_s cn52xx; 4791 struct cvmx_mio_uart2_far_s cn52xx;
3066 struct cvmx_mio_uart2_far_s cn52xxp1; 4792 struct cvmx_mio_uart2_far_s cn52xxp1;
@@ -3069,6 +4795,7 @@ union cvmx_mio_uart2_far {
3069union cvmx_mio_uart2_fcr { 4795union cvmx_mio_uart2_fcr {
3070 uint64_t u64; 4796 uint64_t u64;
3071 struct cvmx_mio_uart2_fcr_s { 4797 struct cvmx_mio_uart2_fcr_s {
4798#ifdef __BIG_ENDIAN_BITFIELD
3072 uint64_t reserved_8_63:56; 4799 uint64_t reserved_8_63:56;
3073 uint64_t rxtrig:2; 4800 uint64_t rxtrig:2;
3074 uint64_t txtrig:2; 4801 uint64_t txtrig:2;
@@ -3076,6 +4803,15 @@ union cvmx_mio_uart2_fcr {
3076 uint64_t txfr:1; 4803 uint64_t txfr:1;
3077 uint64_t rxfr:1; 4804 uint64_t rxfr:1;
3078 uint64_t en:1; 4805 uint64_t en:1;
4806#else
4807 uint64_t en:1;
4808 uint64_t rxfr:1;
4809 uint64_t txfr:1;
4810 uint64_t reserved_3_3:1;
4811 uint64_t txtrig:2;
4812 uint64_t rxtrig:2;
4813 uint64_t reserved_8_63:56;
4814#endif
3079 } s; 4815 } s;
3080 struct cvmx_mio_uart2_fcr_s cn52xx; 4816 struct cvmx_mio_uart2_fcr_s cn52xx;
3081 struct cvmx_mio_uart2_fcr_s cn52xxp1; 4817 struct cvmx_mio_uart2_fcr_s cn52xxp1;
@@ -3084,8 +4820,13 @@ union cvmx_mio_uart2_fcr {
3084union cvmx_mio_uart2_htx { 4820union cvmx_mio_uart2_htx {
3085 uint64_t u64; 4821 uint64_t u64;
3086 struct cvmx_mio_uart2_htx_s { 4822 struct cvmx_mio_uart2_htx_s {
4823#ifdef __BIG_ENDIAN_BITFIELD
3087 uint64_t reserved_1_63:63; 4824 uint64_t reserved_1_63:63;
3088 uint64_t htx:1; 4825 uint64_t htx:1;
4826#else
4827 uint64_t htx:1;
4828 uint64_t reserved_1_63:63;
4829#endif
3089 } s; 4830 } s;
3090 struct cvmx_mio_uart2_htx_s cn52xx; 4831 struct cvmx_mio_uart2_htx_s cn52xx;
3091 struct cvmx_mio_uart2_htx_s cn52xxp1; 4832 struct cvmx_mio_uart2_htx_s cn52xxp1;
@@ -3094,6 +4835,7 @@ union cvmx_mio_uart2_htx {
3094union cvmx_mio_uart2_ier { 4835union cvmx_mio_uart2_ier {
3095 uint64_t u64; 4836 uint64_t u64;
3096 struct cvmx_mio_uart2_ier_s { 4837 struct cvmx_mio_uart2_ier_s {
4838#ifdef __BIG_ENDIAN_BITFIELD
3097 uint64_t reserved_8_63:56; 4839 uint64_t reserved_8_63:56;
3098 uint64_t ptime:1; 4840 uint64_t ptime:1;
3099 uint64_t reserved_4_6:3; 4841 uint64_t reserved_4_6:3;
@@ -3101,6 +4843,15 @@ union cvmx_mio_uart2_ier {
3101 uint64_t elsi:1; 4843 uint64_t elsi:1;
3102 uint64_t etbei:1; 4844 uint64_t etbei:1;
3103 uint64_t erbfi:1; 4845 uint64_t erbfi:1;
4846#else
4847 uint64_t erbfi:1;
4848 uint64_t etbei:1;
4849 uint64_t elsi:1;
4850 uint64_t edssi:1;
4851 uint64_t reserved_4_6:3;
4852 uint64_t ptime:1;
4853 uint64_t reserved_8_63:56;
4854#endif
3104 } s; 4855 } s;
3105 struct cvmx_mio_uart2_ier_s cn52xx; 4856 struct cvmx_mio_uart2_ier_s cn52xx;
3106 struct cvmx_mio_uart2_ier_s cn52xxp1; 4857 struct cvmx_mio_uart2_ier_s cn52xxp1;
@@ -3109,10 +4860,17 @@ union cvmx_mio_uart2_ier {
3109union cvmx_mio_uart2_iir { 4860union cvmx_mio_uart2_iir {
3110 uint64_t u64; 4861 uint64_t u64;
3111 struct cvmx_mio_uart2_iir_s { 4862 struct cvmx_mio_uart2_iir_s {
4863#ifdef __BIG_ENDIAN_BITFIELD
3112 uint64_t reserved_8_63:56; 4864 uint64_t reserved_8_63:56;
3113 uint64_t fen:2; 4865 uint64_t fen:2;
3114 uint64_t reserved_4_5:2; 4866 uint64_t reserved_4_5:2;
3115 uint64_t iid:4; 4867 uint64_t iid:4;
4868#else
4869 uint64_t iid:4;
4870 uint64_t reserved_4_5:2;
4871 uint64_t fen:2;
4872 uint64_t reserved_8_63:56;
4873#endif
3116 } s; 4874 } s;
3117 struct cvmx_mio_uart2_iir_s cn52xx; 4875 struct cvmx_mio_uart2_iir_s cn52xx;
3118 struct cvmx_mio_uart2_iir_s cn52xxp1; 4876 struct cvmx_mio_uart2_iir_s cn52xxp1;
@@ -3121,6 +4879,7 @@ union cvmx_mio_uart2_iir {
3121union cvmx_mio_uart2_lcr { 4879union cvmx_mio_uart2_lcr {
3122 uint64_t u64; 4880 uint64_t u64;
3123 struct cvmx_mio_uart2_lcr_s { 4881 struct cvmx_mio_uart2_lcr_s {
4882#ifdef __BIG_ENDIAN_BITFIELD
3124 uint64_t reserved_8_63:56; 4883 uint64_t reserved_8_63:56;
3125 uint64_t dlab:1; 4884 uint64_t dlab:1;
3126 uint64_t brk:1; 4885 uint64_t brk:1;
@@ -3129,6 +4888,16 @@ union cvmx_mio_uart2_lcr {
3129 uint64_t pen:1; 4888 uint64_t pen:1;
3130 uint64_t stop:1; 4889 uint64_t stop:1;
3131 uint64_t cls:2; 4890 uint64_t cls:2;
4891#else
4892 uint64_t cls:2;
4893 uint64_t stop:1;
4894 uint64_t pen:1;
4895 uint64_t eps:1;
4896 uint64_t reserved_5_5:1;
4897 uint64_t brk:1;
4898 uint64_t dlab:1;
4899 uint64_t reserved_8_63:56;
4900#endif
3132 } s; 4901 } s;
3133 struct cvmx_mio_uart2_lcr_s cn52xx; 4902 struct cvmx_mio_uart2_lcr_s cn52xx;
3134 struct cvmx_mio_uart2_lcr_s cn52xxp1; 4903 struct cvmx_mio_uart2_lcr_s cn52xxp1;
@@ -3137,6 +4906,7 @@ union cvmx_mio_uart2_lcr {
3137union cvmx_mio_uart2_lsr { 4906union cvmx_mio_uart2_lsr {
3138 uint64_t u64; 4907 uint64_t u64;
3139 struct cvmx_mio_uart2_lsr_s { 4908 struct cvmx_mio_uart2_lsr_s {
4909#ifdef __BIG_ENDIAN_BITFIELD
3140 uint64_t reserved_8_63:56; 4910 uint64_t reserved_8_63:56;
3141 uint64_t ferr:1; 4911 uint64_t ferr:1;
3142 uint64_t temt:1; 4912 uint64_t temt:1;
@@ -3146,6 +4916,17 @@ union cvmx_mio_uart2_lsr {
3146 uint64_t pe:1; 4916 uint64_t pe:1;
3147 uint64_t oe:1; 4917 uint64_t oe:1;
3148 uint64_t dr:1; 4918 uint64_t dr:1;
4919#else
4920 uint64_t dr:1;
4921 uint64_t oe:1;
4922 uint64_t pe:1;
4923 uint64_t fe:1;
4924 uint64_t bi:1;
4925 uint64_t thre:1;
4926 uint64_t temt:1;
4927 uint64_t ferr:1;
4928 uint64_t reserved_8_63:56;
4929#endif
3149 } s; 4930 } s;
3150 struct cvmx_mio_uart2_lsr_s cn52xx; 4931 struct cvmx_mio_uart2_lsr_s cn52xx;
3151 struct cvmx_mio_uart2_lsr_s cn52xxp1; 4932 struct cvmx_mio_uart2_lsr_s cn52xxp1;
@@ -3154,6 +4935,7 @@ union cvmx_mio_uart2_lsr {
3154union cvmx_mio_uart2_mcr { 4935union cvmx_mio_uart2_mcr {
3155 uint64_t u64; 4936 uint64_t u64;
3156 struct cvmx_mio_uart2_mcr_s { 4937 struct cvmx_mio_uart2_mcr_s {
4938#ifdef __BIG_ENDIAN_BITFIELD
3157 uint64_t reserved_6_63:58; 4939 uint64_t reserved_6_63:58;
3158 uint64_t afce:1; 4940 uint64_t afce:1;
3159 uint64_t loop:1; 4941 uint64_t loop:1;
@@ -3161,6 +4943,15 @@ union cvmx_mio_uart2_mcr {
3161 uint64_t out1:1; 4943 uint64_t out1:1;
3162 uint64_t rts:1; 4944 uint64_t rts:1;
3163 uint64_t dtr:1; 4945 uint64_t dtr:1;
4946#else
4947 uint64_t dtr:1;
4948 uint64_t rts:1;
4949 uint64_t out1:1;
4950 uint64_t out2:1;
4951 uint64_t loop:1;
4952 uint64_t afce:1;
4953 uint64_t reserved_6_63:58;
4954#endif
3164 } s; 4955 } s;
3165 struct cvmx_mio_uart2_mcr_s cn52xx; 4956 struct cvmx_mio_uart2_mcr_s cn52xx;
3166 struct cvmx_mio_uart2_mcr_s cn52xxp1; 4957 struct cvmx_mio_uart2_mcr_s cn52xxp1;
@@ -3169,6 +4960,7 @@ union cvmx_mio_uart2_mcr {
3169union cvmx_mio_uart2_msr { 4960union cvmx_mio_uart2_msr {
3170 uint64_t u64; 4961 uint64_t u64;
3171 struct cvmx_mio_uart2_msr_s { 4962 struct cvmx_mio_uart2_msr_s {
4963#ifdef __BIG_ENDIAN_BITFIELD
3172 uint64_t reserved_8_63:56; 4964 uint64_t reserved_8_63:56;
3173 uint64_t dcd:1; 4965 uint64_t dcd:1;
3174 uint64_t ri:1; 4966 uint64_t ri:1;
@@ -3178,6 +4970,17 @@ union cvmx_mio_uart2_msr {
3178 uint64_t teri:1; 4970 uint64_t teri:1;
3179 uint64_t ddsr:1; 4971 uint64_t ddsr:1;
3180 uint64_t dcts:1; 4972 uint64_t dcts:1;
4973#else
4974 uint64_t dcts:1;
4975 uint64_t ddsr:1;
4976 uint64_t teri:1;
4977 uint64_t ddcd:1;
4978 uint64_t cts:1;
4979 uint64_t dsr:1;
4980 uint64_t ri:1;
4981 uint64_t dcd:1;
4982 uint64_t reserved_8_63:56;
4983#endif
3181 } s; 4984 } s;
3182 struct cvmx_mio_uart2_msr_s cn52xx; 4985 struct cvmx_mio_uart2_msr_s cn52xx;
3183 struct cvmx_mio_uart2_msr_s cn52xxp1; 4986 struct cvmx_mio_uart2_msr_s cn52xxp1;
@@ -3186,8 +4989,13 @@ union cvmx_mio_uart2_msr {
3186union cvmx_mio_uart2_rbr { 4989union cvmx_mio_uart2_rbr {
3187 uint64_t u64; 4990 uint64_t u64;
3188 struct cvmx_mio_uart2_rbr_s { 4991 struct cvmx_mio_uart2_rbr_s {
4992#ifdef __BIG_ENDIAN_BITFIELD
3189 uint64_t reserved_8_63:56; 4993 uint64_t reserved_8_63:56;
3190 uint64_t rbr:8; 4994 uint64_t rbr:8;
4995#else
4996 uint64_t rbr:8;
4997 uint64_t reserved_8_63:56;
4998#endif
3191 } s; 4999 } s;
3192 struct cvmx_mio_uart2_rbr_s cn52xx; 5000 struct cvmx_mio_uart2_rbr_s cn52xx;
3193 struct cvmx_mio_uart2_rbr_s cn52xxp1; 5001 struct cvmx_mio_uart2_rbr_s cn52xxp1;
@@ -3196,8 +5004,13 @@ union cvmx_mio_uart2_rbr {
3196union cvmx_mio_uart2_rfl { 5004union cvmx_mio_uart2_rfl {
3197 uint64_t u64; 5005 uint64_t u64;
3198 struct cvmx_mio_uart2_rfl_s { 5006 struct cvmx_mio_uart2_rfl_s {
5007#ifdef __BIG_ENDIAN_BITFIELD
3199 uint64_t reserved_7_63:57; 5008 uint64_t reserved_7_63:57;
3200 uint64_t rfl:7; 5009 uint64_t rfl:7;
5010#else
5011 uint64_t rfl:7;
5012 uint64_t reserved_7_63:57;
5013#endif
3201 } s; 5014 } s;
3202 struct cvmx_mio_uart2_rfl_s cn52xx; 5015 struct cvmx_mio_uart2_rfl_s cn52xx;
3203 struct cvmx_mio_uart2_rfl_s cn52xxp1; 5016 struct cvmx_mio_uart2_rfl_s cn52xxp1;
@@ -3206,10 +5019,17 @@ union cvmx_mio_uart2_rfl {
3206union cvmx_mio_uart2_rfw { 5019union cvmx_mio_uart2_rfw {
3207 uint64_t u64; 5020 uint64_t u64;
3208 struct cvmx_mio_uart2_rfw_s { 5021 struct cvmx_mio_uart2_rfw_s {
5022#ifdef __BIG_ENDIAN_BITFIELD
3209 uint64_t reserved_10_63:54; 5023 uint64_t reserved_10_63:54;
3210 uint64_t rffe:1; 5024 uint64_t rffe:1;
3211 uint64_t rfpe:1; 5025 uint64_t rfpe:1;
3212 uint64_t rfwd:8; 5026 uint64_t rfwd:8;
5027#else
5028 uint64_t rfwd:8;
5029 uint64_t rfpe:1;
5030 uint64_t rffe:1;
5031 uint64_t reserved_10_63:54;
5032#endif
3213 } s; 5033 } s;
3214 struct cvmx_mio_uart2_rfw_s cn52xx; 5034 struct cvmx_mio_uart2_rfw_s cn52xx;
3215 struct cvmx_mio_uart2_rfw_s cn52xxp1; 5035 struct cvmx_mio_uart2_rfw_s cn52xxp1;
@@ -3218,8 +5038,13 @@ union cvmx_mio_uart2_rfw {
3218union cvmx_mio_uart2_sbcr { 5038union cvmx_mio_uart2_sbcr {
3219 uint64_t u64; 5039 uint64_t u64;
3220 struct cvmx_mio_uart2_sbcr_s { 5040 struct cvmx_mio_uart2_sbcr_s {
5041#ifdef __BIG_ENDIAN_BITFIELD
3221 uint64_t reserved_1_63:63; 5042 uint64_t reserved_1_63:63;
3222 uint64_t sbcr:1; 5043 uint64_t sbcr:1;
5044#else
5045 uint64_t sbcr:1;
5046 uint64_t reserved_1_63:63;
5047#endif
3223 } s; 5048 } s;
3224 struct cvmx_mio_uart2_sbcr_s cn52xx; 5049 struct cvmx_mio_uart2_sbcr_s cn52xx;
3225 struct cvmx_mio_uart2_sbcr_s cn52xxp1; 5050 struct cvmx_mio_uart2_sbcr_s cn52xxp1;
@@ -3228,8 +5053,13 @@ union cvmx_mio_uart2_sbcr {
3228union cvmx_mio_uart2_scr { 5053union cvmx_mio_uart2_scr {
3229 uint64_t u64; 5054 uint64_t u64;
3230 struct cvmx_mio_uart2_scr_s { 5055 struct cvmx_mio_uart2_scr_s {
5056#ifdef __BIG_ENDIAN_BITFIELD
3231 uint64_t reserved_8_63:56; 5057 uint64_t reserved_8_63:56;
3232 uint64_t scr:8; 5058 uint64_t scr:8;
5059#else
5060 uint64_t scr:8;
5061 uint64_t reserved_8_63:56;
5062#endif
3233 } s; 5063 } s;
3234 struct cvmx_mio_uart2_scr_s cn52xx; 5064 struct cvmx_mio_uart2_scr_s cn52xx;
3235 struct cvmx_mio_uart2_scr_s cn52xxp1; 5065 struct cvmx_mio_uart2_scr_s cn52xxp1;
@@ -3238,8 +5068,13 @@ union cvmx_mio_uart2_scr {
3238union cvmx_mio_uart2_sfe { 5068union cvmx_mio_uart2_sfe {
3239 uint64_t u64; 5069 uint64_t u64;
3240 struct cvmx_mio_uart2_sfe_s { 5070 struct cvmx_mio_uart2_sfe_s {
5071#ifdef __BIG_ENDIAN_BITFIELD
3241 uint64_t reserved_1_63:63; 5072 uint64_t reserved_1_63:63;
3242 uint64_t sfe:1; 5073 uint64_t sfe:1;
5074#else
5075 uint64_t sfe:1;
5076 uint64_t reserved_1_63:63;
5077#endif
3243 } s; 5078 } s;
3244 struct cvmx_mio_uart2_sfe_s cn52xx; 5079 struct cvmx_mio_uart2_sfe_s cn52xx;
3245 struct cvmx_mio_uart2_sfe_s cn52xxp1; 5080 struct cvmx_mio_uart2_sfe_s cn52xxp1;
@@ -3248,10 +5083,17 @@ union cvmx_mio_uart2_sfe {
3248union cvmx_mio_uart2_srr { 5083union cvmx_mio_uart2_srr {
3249 uint64_t u64; 5084 uint64_t u64;
3250 struct cvmx_mio_uart2_srr_s { 5085 struct cvmx_mio_uart2_srr_s {
5086#ifdef __BIG_ENDIAN_BITFIELD
3251 uint64_t reserved_3_63:61; 5087 uint64_t reserved_3_63:61;
3252 uint64_t stfr:1; 5088 uint64_t stfr:1;
3253 uint64_t srfr:1; 5089 uint64_t srfr:1;
3254 uint64_t usr:1; 5090 uint64_t usr:1;
5091#else
5092 uint64_t usr:1;
5093 uint64_t srfr:1;
5094 uint64_t stfr:1;
5095 uint64_t reserved_3_63:61;
5096#endif
3255 } s; 5097 } s;
3256 struct cvmx_mio_uart2_srr_s cn52xx; 5098 struct cvmx_mio_uart2_srr_s cn52xx;
3257 struct cvmx_mio_uart2_srr_s cn52xxp1; 5099 struct cvmx_mio_uart2_srr_s cn52xxp1;
@@ -3260,8 +5102,13 @@ union cvmx_mio_uart2_srr {
3260union cvmx_mio_uart2_srt { 5102union cvmx_mio_uart2_srt {
3261 uint64_t u64; 5103 uint64_t u64;
3262 struct cvmx_mio_uart2_srt_s { 5104 struct cvmx_mio_uart2_srt_s {
5105#ifdef __BIG_ENDIAN_BITFIELD
3263 uint64_t reserved_2_63:62; 5106 uint64_t reserved_2_63:62;
3264 uint64_t srt:2; 5107 uint64_t srt:2;
5108#else
5109 uint64_t srt:2;
5110 uint64_t reserved_2_63:62;
5111#endif
3265 } s; 5112 } s;
3266 struct cvmx_mio_uart2_srt_s cn52xx; 5113 struct cvmx_mio_uart2_srt_s cn52xx;
3267 struct cvmx_mio_uart2_srt_s cn52xxp1; 5114 struct cvmx_mio_uart2_srt_s cn52xxp1;
@@ -3270,8 +5117,13 @@ union cvmx_mio_uart2_srt {
3270union cvmx_mio_uart2_srts { 5117union cvmx_mio_uart2_srts {
3271 uint64_t u64; 5118 uint64_t u64;
3272 struct cvmx_mio_uart2_srts_s { 5119 struct cvmx_mio_uart2_srts_s {
5120#ifdef __BIG_ENDIAN_BITFIELD
3273 uint64_t reserved_1_63:63; 5121 uint64_t reserved_1_63:63;
3274 uint64_t srts:1; 5122 uint64_t srts:1;
5123#else
5124 uint64_t srts:1;
5125 uint64_t reserved_1_63:63;
5126#endif
3275 } s; 5127 } s;
3276 struct cvmx_mio_uart2_srts_s cn52xx; 5128 struct cvmx_mio_uart2_srts_s cn52xx;
3277 struct cvmx_mio_uart2_srts_s cn52xxp1; 5129 struct cvmx_mio_uart2_srts_s cn52xxp1;
@@ -3280,8 +5132,13 @@ union cvmx_mio_uart2_srts {
3280union cvmx_mio_uart2_stt { 5132union cvmx_mio_uart2_stt {
3281 uint64_t u64; 5133 uint64_t u64;
3282 struct cvmx_mio_uart2_stt_s { 5134 struct cvmx_mio_uart2_stt_s {
5135#ifdef __BIG_ENDIAN_BITFIELD
3283 uint64_t reserved_2_63:62; 5136 uint64_t reserved_2_63:62;
3284 uint64_t stt:2; 5137 uint64_t stt:2;
5138#else
5139 uint64_t stt:2;
5140 uint64_t reserved_2_63:62;
5141#endif
3285 } s; 5142 } s;
3286 struct cvmx_mio_uart2_stt_s cn52xx; 5143 struct cvmx_mio_uart2_stt_s cn52xx;
3287 struct cvmx_mio_uart2_stt_s cn52xxp1; 5144 struct cvmx_mio_uart2_stt_s cn52xxp1;
@@ -3290,8 +5147,13 @@ union cvmx_mio_uart2_stt {
3290union cvmx_mio_uart2_tfl { 5147union cvmx_mio_uart2_tfl {
3291 uint64_t u64; 5148 uint64_t u64;
3292 struct cvmx_mio_uart2_tfl_s { 5149 struct cvmx_mio_uart2_tfl_s {
5150#ifdef __BIG_ENDIAN_BITFIELD
3293 uint64_t reserved_7_63:57; 5151 uint64_t reserved_7_63:57;
3294 uint64_t tfl:7; 5152 uint64_t tfl:7;
5153#else
5154 uint64_t tfl:7;
5155 uint64_t reserved_7_63:57;
5156#endif
3295 } s; 5157 } s;
3296 struct cvmx_mio_uart2_tfl_s cn52xx; 5158 struct cvmx_mio_uart2_tfl_s cn52xx;
3297 struct cvmx_mio_uart2_tfl_s cn52xxp1; 5159 struct cvmx_mio_uart2_tfl_s cn52xxp1;
@@ -3300,8 +5162,13 @@ union cvmx_mio_uart2_tfl {
3300union cvmx_mio_uart2_tfr { 5162union cvmx_mio_uart2_tfr {
3301 uint64_t u64; 5163 uint64_t u64;
3302 struct cvmx_mio_uart2_tfr_s { 5164 struct cvmx_mio_uart2_tfr_s {
5165#ifdef __BIG_ENDIAN_BITFIELD
3303 uint64_t reserved_8_63:56; 5166 uint64_t reserved_8_63:56;
3304 uint64_t tfr:8; 5167 uint64_t tfr:8;
5168#else
5169 uint64_t tfr:8;
5170 uint64_t reserved_8_63:56;
5171#endif
3305 } s; 5172 } s;
3306 struct cvmx_mio_uart2_tfr_s cn52xx; 5173 struct cvmx_mio_uart2_tfr_s cn52xx;
3307 struct cvmx_mio_uart2_tfr_s cn52xxp1; 5174 struct cvmx_mio_uart2_tfr_s cn52xxp1;
@@ -3310,8 +5177,13 @@ union cvmx_mio_uart2_tfr {
3310union cvmx_mio_uart2_thr { 5177union cvmx_mio_uart2_thr {
3311 uint64_t u64; 5178 uint64_t u64;
3312 struct cvmx_mio_uart2_thr_s { 5179 struct cvmx_mio_uart2_thr_s {
5180#ifdef __BIG_ENDIAN_BITFIELD
3313 uint64_t reserved_8_63:56; 5181 uint64_t reserved_8_63:56;
3314 uint64_t thr:8; 5182 uint64_t thr:8;
5183#else
5184 uint64_t thr:8;
5185 uint64_t reserved_8_63:56;
5186#endif
3315 } s; 5187 } s;
3316 struct cvmx_mio_uart2_thr_s cn52xx; 5188 struct cvmx_mio_uart2_thr_s cn52xx;
3317 struct cvmx_mio_uart2_thr_s cn52xxp1; 5189 struct cvmx_mio_uart2_thr_s cn52xxp1;
@@ -3320,12 +5192,21 @@ union cvmx_mio_uart2_thr {
3320union cvmx_mio_uart2_usr { 5192union cvmx_mio_uart2_usr {
3321 uint64_t u64; 5193 uint64_t u64;
3322 struct cvmx_mio_uart2_usr_s { 5194 struct cvmx_mio_uart2_usr_s {
5195#ifdef __BIG_ENDIAN_BITFIELD
3323 uint64_t reserved_5_63:59; 5196 uint64_t reserved_5_63:59;
3324 uint64_t rff:1; 5197 uint64_t rff:1;
3325 uint64_t rfne:1; 5198 uint64_t rfne:1;
3326 uint64_t tfe:1; 5199 uint64_t tfe:1;
3327 uint64_t tfnf:1; 5200 uint64_t tfnf:1;
3328 uint64_t busy:1; 5201 uint64_t busy:1;
5202#else
5203 uint64_t busy:1;
5204 uint64_t tfnf:1;
5205 uint64_t tfe:1;
5206 uint64_t rfne:1;
5207 uint64_t rff:1;
5208 uint64_t reserved_5_63:59;
5209#endif
3329 } s; 5210 } s;
3330 struct cvmx_mio_uart2_usr_s cn52xx; 5211 struct cvmx_mio_uart2_usr_s cn52xx;
3331 struct cvmx_mio_uart2_usr_s cn52xxp1; 5212 struct cvmx_mio_uart2_usr_s cn52xxp1;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 09:30:57 -0400