diff options
author | Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> | 2013-10-07 12:45:05 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-10-29 16:25:31 -0400 |
commit | 40b15b28083abc00c9ffb830c07e5ef72a1e53b6 (patch) | |
tree | e402122b996011fe6d76827731df7038ef4770ae /arch/mips/include/asm/mips-boards | |
parent | 70002f76db5f8ed4ab72f539fc600510e2a98022 (diff) |
MIPS: Remove unused defines in piix4.h
The PIIX4_ICTLR* and PIIX4_OCW* defines are not used by any other files.
Remove them.
The only file (other than fixup-malta.c which includes piix4.h in patch #1)
containing "#include <asm/mips-boards/piix4.h>" is
arch/mips/mti-malta/malta-int.c whose first version is actually
"1da177e4c3:arch/mips/mips-boards/malta/malta_int.c". In that version, in
the function get_int(), things in piix4.h are used. But now malta-int.c no
longer needs those stuff.
Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6032/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mips-boards')
-rw-r--r-- | arch/mips/include/asm/mips-boards/piix4.h | 57 |
1 files changed, 0 insertions, 57 deletions
diff --git a/arch/mips/include/asm/mips-boards/piix4.h b/arch/mips/include/asm/mips-boards/piix4.h index 06d483131dc4..e33227998713 100644 --- a/arch/mips/include/asm/mips-boards/piix4.h +++ b/arch/mips/include/asm/mips-boards/piix4.h | |||
@@ -43,61 +43,4 @@ | |||
43 | #define PIIX4_FUNC1_IDETIM_SECONDARY_HI 0x43 | 43 | #define PIIX4_FUNC1_IDETIM_SECONDARY_HI 0x43 |
44 | #define PIIX4_FUNC1_IDETIM_SECONDARY_HI_IDE_DECODE_EN (1 << 7) | 44 | #define PIIX4_FUNC1_IDETIM_SECONDARY_HI_IDE_DECODE_EN (1 << 7) |
45 | 45 | ||
46 | /************************************************************************ | ||
47 | * IO register offsets | ||
48 | ************************************************************************/ | ||
49 | #define PIIX4_ICTLR1_ICW1 0x20 | ||
50 | #define PIIX4_ICTLR1_ICW2 0x21 | ||
51 | #define PIIX4_ICTLR1_ICW3 0x21 | ||
52 | #define PIIX4_ICTLR1_ICW4 0x21 | ||
53 | #define PIIX4_ICTLR2_ICW1 0xa0 | ||
54 | #define PIIX4_ICTLR2_ICW2 0xa1 | ||
55 | #define PIIX4_ICTLR2_ICW3 0xa1 | ||
56 | #define PIIX4_ICTLR2_ICW4 0xa1 | ||
57 | #define PIIX4_ICTLR1_OCW1 0x21 | ||
58 | #define PIIX4_ICTLR1_OCW2 0x20 | ||
59 | #define PIIX4_ICTLR1_OCW3 0x20 | ||
60 | #define PIIX4_ICTLR1_OCW4 0x20 | ||
61 | #define PIIX4_ICTLR2_OCW1 0xa1 | ||
62 | #define PIIX4_ICTLR2_OCW2 0xa0 | ||
63 | #define PIIX4_ICTLR2_OCW3 0xa0 | ||
64 | #define PIIX4_ICTLR2_OCW4 0xa0 | ||
65 | |||
66 | |||
67 | /************************************************************************ | ||
68 | * Register encodings. | ||
69 | ************************************************************************/ | ||
70 | #define PIIX4_OCW2_NSEOI (0x1 << 5) | ||
71 | #define PIIX4_OCW2_SEOI (0x3 << 5) | ||
72 | #define PIIX4_OCW2_RNSEOI (0x5 << 5) | ||
73 | #define PIIX4_OCW2_RAEOIS (0x4 << 5) | ||
74 | #define PIIX4_OCW2_RAEOIC (0x0 << 5) | ||
75 | #define PIIX4_OCW2_RSEOI (0x7 << 5) | ||
76 | #define PIIX4_OCW2_SP (0x6 << 5) | ||
77 | #define PIIX4_OCW2_NOP (0x2 << 5) | ||
78 | |||
79 | #define PIIX4_OCW2_SEL (0x0 << 3) | ||
80 | |||
81 | #define PIIX4_OCW2_ILS_0 0 | ||
82 | #define PIIX4_OCW2_ILS_1 1 | ||
83 | #define PIIX4_OCW2_ILS_2 2 | ||
84 | #define PIIX4_OCW2_ILS_3 3 | ||
85 | #define PIIX4_OCW2_ILS_4 4 | ||
86 | #define PIIX4_OCW2_ILS_5 5 | ||
87 | #define PIIX4_OCW2_ILS_6 6 | ||
88 | #define PIIX4_OCW2_ILS_7 7 | ||
89 | #define PIIX4_OCW2_ILS_8 0 | ||
90 | #define PIIX4_OCW2_ILS_9 1 | ||
91 | #define PIIX4_OCW2_ILS_10 2 | ||
92 | #define PIIX4_OCW2_ILS_11 3 | ||
93 | #define PIIX4_OCW2_ILS_12 4 | ||
94 | #define PIIX4_OCW2_ILS_13 5 | ||
95 | #define PIIX4_OCW2_ILS_14 6 | ||
96 | #define PIIX4_OCW2_ILS_15 7 | ||
97 | |||
98 | #define PIIX4_OCW3_SEL (0x1 << 3) | ||
99 | |||
100 | #define PIIX4_OCW3_IRR 0x2 | ||
101 | #define PIIX4_OCW3_ISR 0x3 | ||
102 | |||
103 | #endif /* __ASM_MIPS_BOARDS_PIIX4_H */ | 46 | #endif /* __ASM_MIPS_BOARDS_PIIX4_H */ |