Merge branch 'mips-next' of http://dev.phrozen.org/githttp/mips-next into mips-for-linux-next

4 files changed, 78 insertions, 24 deletions

diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
new file mode 100644
index 000000000000..62d6a3b4d3b7
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_nvram.h
@@ -0,0 +1,35 @@
+#ifndef BCM63XX_NVRAM_H
+#define BCM63XX_NVRAM_H
+
+#include <linux/types.h>
+
+/**
+ * bcm63xx_nvram_init() - initializes nvram
+ * @nvram:      address of the nvram data
+ *
+ * Initialized the local nvram copy from the target address and checks
+ * its checksum.
+ *
+ * Returns 0 on success.
+ */
+int __init bcm63xx_nvram_init(void *nvram);
+
+/**
+ * bcm63xx_nvram_get_name() - returns the board name according to nvram
+ *
+ * Returns the board name field from nvram. Note that it might not be
+ * null terminated if it is exactly 16 bytes long.
+ */
+u8 *bcm63xx_nvram_get_name(void);
+
+/**
+ * bcm63xx_nvram_get_mac_address() - register & return a new mac address
+ * @mac:        pointer to array for allocated mac
+ *
+ * Registers and returns a mac address from the allocated macs from nvram.
+ *
+ * Returns 0 on success.
+ */
+int bcm63xx_nvram_get_mac_address(u8 *mac);
+
+#endif /* BCM63XX_NVRAM_H */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 12963d05da86..c3eeb90b480a 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -53,13 +53,18 @@
                                         CKCTL_6338_SAR_EN |             \
                                         CKCTL_6338_SPI_EN)
 
-#define CKCTL_6345_CPU_EN               (1 << 0)
-#define CKCTL_6345_BUS_EN               (1 << 1)
-#define CKCTL_6345_EBI_EN               (1 << 2)
-#define CKCTL_6345_UART_EN              (1 << 3)
-#define CKCTL_6345_ADSLPHY_EN           (1 << 4)
-#define CKCTL_6345_ENET_EN              (1 << 7)
-#define CKCTL_6345_USBH_EN              (1 << 8)
+/* BCM6345 clock bits are shifted by 16 on the left, because of the test
+ * control register which is 16-bits wide. That way we do not have any
+ * specific BCM6345 code for handling clocks, and writing 0 to the test
+ * control register is fine.
+ */
+#define CKCTL_6345_CPU_EN               (1 << 16)
+#define CKCTL_6345_BUS_EN               (1 << 17)
+#define CKCTL_6345_EBI_EN               (1 << 18)
+#define CKCTL_6345_UART_EN              (1 << 19)
+#define CKCTL_6345_ADSLPHY_EN           (1 << 20)
+#define CKCTL_6345_ENET_EN              (1 << 23)
+#define CKCTL_6345_USBH_EN              (1 << 24)
 
 #define CKCTL_6345_ALL_SAFE_EN          (CKCTL_6345_ENET_EN |   \
                                         CKCTL_6345_USBH_EN |    \
@@ -191,6 +196,7 @@
 /* Soft Reset register */
 #define PERF_SOFTRESET_REG              0x28
 #define PERF_SOFTRESET_6328_REG         0x10
+#define PERF_SOFTRESET_6358_REG         0x34
 #define PERF_SOFTRESET_6368_REG         0x10
 
 #define SOFTRESET_6328_SPI_MASK         (1 << 0)
@@ -244,6 +250,15 @@
                                   SOFTRESET_6348_ACLC_MASK |            \
                                   SOFTRESET_6348_ADSLMIPSPLL_MASK)
 
+#define SOFTRESET_6358_SPI_MASK         (1 << 0)
+#define SOFTRESET_6358_ENET_MASK        (1 << 2)
+#define SOFTRESET_6358_MPI_MASK         (1 << 3)
+#define SOFTRESET_6358_EPHY_MASK        (1 << 6)
+#define SOFTRESET_6358_SAR_MASK         (1 << 7)
+#define SOFTRESET_6358_USBH_MASK        (1 << 12)
+#define SOFTRESET_6358_PCM_MASK         (1 << 13)
+#define SOFTRESET_6358_ADSL_MASK        (1 << 14)
+
 #define SOFTRESET_6368_SPI_MASK         (1 << 0)
 #define SOFTRESET_6368_MPI_MASK         (1 << 3)
 #define SOFTRESET_6368_EPHY_MASK        (1 << 6)
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
new file mode 100644
index 000000000000..3a6eb9c1adc6
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
@@ -0,0 +1,21 @@
+#ifndef __BCM63XX_RESET_H
+#define __BCM63XX_RESET_H
+
+enum bcm63xx_core_reset {
+        BCM63XX_RESET_SPI,
+        BCM63XX_RESET_ENET,
+        BCM63XX_RESET_USBH,
+        BCM63XX_RESET_USBD,
+        BCM63XX_RESET_SAR,
+        BCM63XX_RESET_DSL,
+        BCM63XX_RESET_EPHY,
+        BCM63XX_RESET_ENETSW,
+        BCM63XX_RESET_PCM,
+        BCM63XX_RESET_MPI,
+        BCM63XX_RESET_PCIE,
+        BCM63XX_RESET_PCIE_EXT,
+};
+
+void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
+
+#endif
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
index b0dd4bb53f7e..682bcf3b492a 100644
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -15,23 +15,6 @@
 #define BCM963XX_NVRAM_OFFSET           0x580
 
 /*
- * nvram structure
- */
-struct bcm963xx_nvram {
-        u32     version;
-        u8      reserved1[256];
-        u8      name[16];
-        u32     main_tp_number;
-        u32     psi_size;
-        u32     mac_addr_count;
-        u8      mac_addr_base[6];
-        u8      reserved2[2];
-        u32     checksum_old;
-        u8      reserved3[720];
-        u32     checksum_high;
-};
-
-/*
  * board definition
  */
 struct board_info {