diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2012-03-14 05:36:06 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-15 11:49:03 -0400 |
commit | 93ef85b5598ad2cc23f38d97ed565027b969c0aa (patch) | |
tree | d8d0744cd0f50d5b753396196bc0329fac211966 /arch/mips/include/asm/mach-ath79 | |
parent | 6015a856f16ccf33e9f83643d04c2e15be2384eb (diff) |
MIPS: ath79: fix a wrong IRQ number
The Ubiquiti XM board setup code uses an invalid
IRQ number, because it if above of NR_IRQS. This
leads to failed 'request_irq' calls:
ath9k 0000:00:00.0: request_irq failed
ath9k: probe of 0000:00:00.0 failed with error -22
Preserve some IRQ numbers for the built-in IRQ
controller of PCI host controllers in the
AR71XX/AR724X SoCs, and use the correct IRQ
number in the board setup code.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3495/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-ath79')
-rw-r--r-- | arch/mips/include/asm/mach-ath79/irq.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index 519958fe4e3c..6ae2646da4f4 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h | |||
@@ -10,11 +10,15 @@ | |||
10 | #define __ASM_MACH_ATH79_IRQ_H | 10 | #define __ASM_MACH_ATH79_IRQ_H |
11 | 11 | ||
12 | #define MIPS_CPU_IRQ_BASE 0 | 12 | #define MIPS_CPU_IRQ_BASE 0 |
13 | #define NR_IRQS 40 | 13 | #define NR_IRQS 46 |
14 | 14 | ||
15 | #define ATH79_MISC_IRQ_BASE 8 | 15 | #define ATH79_MISC_IRQ_BASE 8 |
16 | #define ATH79_MISC_IRQ_COUNT 32 | 16 | #define ATH79_MISC_IRQ_COUNT 32 |
17 | 17 | ||
18 | #define ATH79_PCI_IRQ_BASE (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT) | ||
19 | #define ATH79_PCI_IRQ_COUNT 6 | ||
20 | #define ATH79_PCI_IRQ(_x) (ATH79_PCI_IRQ_BASE + (_x)) | ||
21 | |||
18 | #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) | 22 | #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) |
19 | #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) | 23 | #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) |
20 | #define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4) | 24 | #define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4) |