diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2013-02-07 14:32:23 -0500 |
---|---|---|
committer | John Crispin <blogic@openwrt.org> | 2013-02-16 19:25:41 -0500 |
commit | 7e69c10a8ee1f201c040997c6742c27e915730ad (patch) | |
tree | 6857d1c2fd9d40491bf393708dcd753b6703f663 /arch/mips/include/asm/mach-ath79/irq.h | |
parent | 326e8d17d73fdf213f6334917ef46b2ba7b1354a (diff) |
ath79: add ATH79_CPU_IRQ() macro
Remove the individual ATH79_CPU_IRQ_* constants and
use the new macro instead of those.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4929/
Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/include/asm/mach-ath79/irq.h')
-rw-r--r-- | arch/mips/include/asm/mach-ath79/irq.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h index 158ad7f41313..3dda4c24571d 100644 --- a/arch/mips/include/asm/mach-ath79/irq.h +++ b/arch/mips/include/asm/mach-ath79/irq.h | |||
@@ -12,6 +12,8 @@ | |||
12 | #define MIPS_CPU_IRQ_BASE 0 | 12 | #define MIPS_CPU_IRQ_BASE 0 |
13 | #define NR_IRQS 48 | 13 | #define NR_IRQS 48 |
14 | 14 | ||
15 | #define ATH79_CPU_IRQ(_x) (MIPS_CPU_IRQ_BASE + (_x)) | ||
16 | |||
15 | #define ATH79_MISC_IRQ_BASE 8 | 17 | #define ATH79_MISC_IRQ_BASE 8 |
16 | #define ATH79_MISC_IRQ_COUNT 32 | 18 | #define ATH79_MISC_IRQ_COUNT 32 |
17 | #define ATH79_MISC_IRQ(_x) (ATH79_MISC_IRQ_BASE + (_x)) | 19 | #define ATH79_MISC_IRQ(_x) (ATH79_MISC_IRQ_BASE + (_x)) |
@@ -24,13 +26,6 @@ | |||
24 | #define ATH79_IP2_IRQ_COUNT 2 | 26 | #define ATH79_IP2_IRQ_COUNT 2 |
25 | #define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x)) | 27 | #define ATH79_IP2_IRQ(_x) (ATH79_IP2_IRQ_BASE + (_x)) |
26 | 28 | ||
27 | #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2) | ||
28 | #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3) | ||
29 | #define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4) | ||
30 | #define ATH79_CPU_IRQ_GE1 (MIPS_CPU_IRQ_BASE + 5) | ||
31 | #define ATH79_CPU_IRQ_MISC (MIPS_CPU_IRQ_BASE + 6) | ||
32 | #define ATH79_CPU_IRQ_TIMER (MIPS_CPU_IRQ_BASE + 7) | ||
33 | |||
34 | #define ATH79_MISC_IRQ_TIMER (ATH79_MISC_IRQ_BASE + 0) | 29 | #define ATH79_MISC_IRQ_TIMER (ATH79_MISC_IRQ_BASE + 0) |
35 | #define ATH79_MISC_IRQ_ERROR (ATH79_MISC_IRQ_BASE + 1) | 30 | #define ATH79_MISC_IRQ_ERROR (ATH79_MISC_IRQ_BASE + 1) |
36 | #define ATH79_MISC_IRQ_GPIO (ATH79_MISC_IRQ_BASE + 2) | 31 | #define ATH79_MISC_IRQ_GPIO (ATH79_MISC_IRQ_BASE + 2) |