MIPS: Get rid of MIPS I flag and test macros.

MIPS I is the ancestor of all MIPS ISA and architecture variants.  Anything
ever build in the MIPS empire is either MIPS I or at least contains MIPS I.
If it's running Linux, that is.

So there is little point in having cpu_has_mips_1 because it will always
evaluate as true - though usually only at runtime.  Thus there is no
point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it.

Little complication: traps.c was using a test for a pure MIPS I ISA as
a test for an R3000-style cp0.  To deal with that, use a check for
cpu_has_3kex or cpu_has_4kex instead.

cpu_has_3kex is a new macro.  At the moment its default implementation is
!cpu_has_4kex but this may eventually change if Linux is ever going to
support the oddball MIPS processors R6000 and R8000 so users of either
of these macros should not make any assumptions.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5551/

1 files changed, 11 insertions, 12 deletions

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index dd86ab205483..632bbe5a79ea 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -282,18 +282,17 @@ enum cpu_type_enum {
  * ISA Level encodings
  *
  */
-#define MIPS_CPU_ISA_I          0x00000001
-#define MIPS_CPU_ISA_II         0x00000002
-#define MIPS_CPU_ISA_III        0x00000004
-#define MIPS_CPU_ISA_IV         0x00000008
-#define MIPS_CPU_ISA_V          0x00000010
-#define MIPS_CPU_ISA_M32R1      0x00000020
-#define MIPS_CPU_ISA_M32R2      0x00000040
-#define MIPS_CPU_ISA_M64R1      0x00000080
-#define MIPS_CPU_ISA_M64R2      0x00000100
-
-#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \
-        MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2)
+#define MIPS_CPU_ISA_II         0x00000001
+#define MIPS_CPU_ISA_III        0x00000002
+#define MIPS_CPU_ISA_IV         0x00000004
+#define MIPS_CPU_ISA_V          0x00000008
+#define MIPS_CPU_ISA_M32R1      0x00000010
+#define MIPS_CPU_ISA_M32R2      0x00000020
+#define MIPS_CPU_ISA_M64R1      0x00000040
+#define MIPS_CPU_ISA_M64R2      0x00000080
+
+#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_II | MIPS_CPU_ISA_M32R1 | \
+        MIPS_CPU_ISA_M32R2)
 #define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
         MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)