diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2013-01-22 06:59:30 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-02-01 04:00:22 -0500 |
commit | 7034228792cc561e79ff8600f02884bd4c80e287 (patch) | |
tree | 89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/include/asm/cpu-info.h | |
parent | 405ab01c70e18058d9c01a1256769a61fc65413e (diff) |
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu-info.h')
-rw-r--r-- | arch/mips/include/asm/cpu-info.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index c454550eb0c0..41401d8eb7d1 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h | |||
@@ -52,14 +52,14 @@ struct cpuinfo_mips { | |||
52 | unsigned int cputype; | 52 | unsigned int cputype; |
53 | int isa_level; | 53 | int isa_level; |
54 | int tlbsize; | 54 | int tlbsize; |
55 | struct cache_desc icache; /* Primary I-cache */ | 55 | struct cache_desc icache; /* Primary I-cache */ |
56 | struct cache_desc dcache; /* Primary D or combined I/D cache */ | 56 | struct cache_desc dcache; /* Primary D or combined I/D cache */ |
57 | struct cache_desc scache; /* Secondary cache */ | 57 | struct cache_desc scache; /* Secondary cache */ |
58 | struct cache_desc tcache; /* Tertiary/split secondary cache */ | 58 | struct cache_desc tcache; /* Tertiary/split secondary cache */ |
59 | int srsets; /* Shadow register sets */ | 59 | int srsets; /* Shadow register sets */ |
60 | int core; /* physical core number */ | 60 | int core; /* physical core number */ |
61 | #ifdef CONFIG_64BIT | 61 | #ifdef CONFIG_64BIT |
62 | int vmbits; /* Virtual memory size in bits */ | 62 | int vmbits; /* Virtual memory size in bits */ |
63 | #endif | 63 | #endif |
64 | #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) | 64 | #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) |
65 | /* | 65 | /* |
@@ -68,12 +68,12 @@ struct cpuinfo_mips { | |||
68 | * exception resources, ASID spaces, etc, are common | 68 | * exception resources, ASID spaces, etc, are common |
69 | * to all TCs within the same VPE. | 69 | * to all TCs within the same VPE. |
70 | */ | 70 | */ |
71 | int vpe_id; /* Virtual Processor number */ | 71 | int vpe_id; /* Virtual Processor number */ |
72 | #endif | 72 | #endif |
73 | #ifdef CONFIG_MIPS_MT_SMTC | 73 | #ifdef CONFIG_MIPS_MT_SMTC |
74 | int tc_id; /* Thread Context number */ | 74 | int tc_id; /* Thread Context number */ |
75 | #endif | 75 | #endif |
76 | void *data; /* Additional data */ | 76 | void *data; /* Additional data */ |
77 | unsigned int watch_reg_count; /* Number that exist */ | 77 | unsigned int watch_reg_count; /* Number that exist */ |
78 | unsigned int watch_reg_use_cnt; /* Usable by ptrace */ | 78 | unsigned int watch_reg_use_cnt; /* Usable by ptrace */ |
79 | #define NUM_WATCH_REGS 4 | 79 | #define NUM_WATCH_REGS 4 |