diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-01-26 07:44:11 -0500 |
|---|---|---|
| committer | Markos Chandras <markos.chandras@imgtec.com> | 2015-02-17 10:37:21 -0500 |
| commit | 94bfb75ace81f7b09860400ba02ed1607a2e0e27 (patch) | |
| tree | 43c515ed18ed72bd10e6269be1545e41bd2a5335 /arch/mips/include/asm/cmpxchg.h | |
| parent | a7e07b1ae550303c6611f4d3b054a4f9c2bc8a9e (diff) | |
MIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASM
The GCC_OFF12_ASM macro is used for 12-bit immediate constrains
but we will also use it for 9-bit constrains on MIPS R6 so we
rename it to something more appropriate.
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm/cmpxchg.h')
| -rw-r--r-- | arch/mips/include/asm/cmpxchg.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h index 28b1edf19501..68baa0cf521a 100644 --- a/arch/mips/include/asm/cmpxchg.h +++ b/arch/mips/include/asm/cmpxchg.h | |||
| @@ -31,8 +31,8 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) | |||
| 31 | " sc %2, %1 \n" | 31 | " sc %2, %1 \n" |
| 32 | " beqzl %2, 1b \n" | 32 | " beqzl %2, 1b \n" |
| 33 | " .set mips0 \n" | 33 | " .set mips0 \n" |
| 34 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy) | 34 | : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy) |
| 35 | : GCC_OFF12_ASM() (*m), "Jr" (val) | 35 | : GCC_OFF_SMALL_ASM() (*m), "Jr" (val) |
| 36 | : "memory"); | 36 | : "memory"); |
| 37 | } else if (kernel_uses_llsc) { | 37 | } else if (kernel_uses_llsc) { |
| 38 | unsigned long dummy; | 38 | unsigned long dummy; |
| @@ -46,9 +46,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) | |||
| 46 | " .set arch=r4000 \n" | 46 | " .set arch=r4000 \n" |
| 47 | " sc %2, %1 \n" | 47 | " sc %2, %1 \n" |
| 48 | " .set mips0 \n" | 48 | " .set mips0 \n" |
| 49 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), | 49 | : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), |
| 50 | "=&r" (dummy) | 50 | "=&r" (dummy) |
| 51 | : GCC_OFF12_ASM() (*m), "Jr" (val) | 51 | : GCC_OFF_SMALL_ASM() (*m), "Jr" (val) |
| 52 | : "memory"); | 52 | : "memory"); |
| 53 | } while (unlikely(!dummy)); | 53 | } while (unlikely(!dummy)); |
| 54 | } else { | 54 | } else { |
| @@ -82,8 +82,8 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) | |||
| 82 | " scd %2, %1 \n" | 82 | " scd %2, %1 \n" |
| 83 | " beqzl %2, 1b \n" | 83 | " beqzl %2, 1b \n" |
| 84 | " .set mips0 \n" | 84 | " .set mips0 \n" |
| 85 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy) | 85 | : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy) |
| 86 | : GCC_OFF12_ASM() (*m), "Jr" (val) | 86 | : GCC_OFF_SMALL_ASM() (*m), "Jr" (val) |
| 87 | : "memory"); | 87 | : "memory"); |
| 88 | } else if (kernel_uses_llsc) { | 88 | } else if (kernel_uses_llsc) { |
| 89 | unsigned long dummy; | 89 | unsigned long dummy; |
| @@ -95,9 +95,9 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) | |||
| 95 | " move %2, %z4 \n" | 95 | " move %2, %z4 \n" |
| 96 | " scd %2, %1 \n" | 96 | " scd %2, %1 \n" |
| 97 | " .set mips0 \n" | 97 | " .set mips0 \n" |
| 98 | : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), | 98 | : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), |
| 99 | "=&r" (dummy) | 99 | "=&r" (dummy) |
| 100 | : GCC_OFF12_ASM() (*m), "Jr" (val) | 100 | : GCC_OFF_SMALL_ASM() (*m), "Jr" (val) |
| 101 | : "memory"); | 101 | : "memory"); |
| 102 | } while (unlikely(!dummy)); | 102 | } while (unlikely(!dummy)); |
| 103 | } else { | 103 | } else { |
| @@ -158,8 +158,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz | |||
| 158 | " beqzl $1, 1b \n" \ | 158 | " beqzl $1, 1b \n" \ |
| 159 | "2: \n" \ | 159 | "2: \n" \ |
| 160 | " .set pop \n" \ | 160 | " .set pop \n" \ |
| 161 | : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \ | 161 | : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \ |
| 162 | : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \ | 162 | : GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new) \ |
| 163 | : "memory"); \ | 163 | : "memory"); \ |
| 164 | } else if (kernel_uses_llsc) { \ | 164 | } else if (kernel_uses_llsc) { \ |
| 165 | __asm__ __volatile__( \ | 165 | __asm__ __volatile__( \ |
| @@ -175,8 +175,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz | |||
| 175 | " beqz $1, 1b \n" \ | 175 | " beqz $1, 1b \n" \ |
| 176 | " .set pop \n" \ | 176 | " .set pop \n" \ |
| 177 | "2: \n" \ | 177 | "2: \n" \ |
| 178 | : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \ | 178 | : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \ |
| 179 | : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \ | 179 | : GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new) \ |
| 180 | : "memory"); \ | 180 | : "memory"); \ |
| 181 | } else { \ | 181 | } else { \ |
| 182 | unsigned long __flags; \ | 182 | unsigned long __flags; \ |