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authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-02 16:40:50 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-02 16:40:50 -0400
commitbdfc7cbdeef8cadba0e5793079ac0130b8e2220c (patch)
tree82af0cae4898e259edcc6cbdad639087dc1189a8 /arch/mips/include/asm/asm.h
parent62d1a3ba5adc5653d43f6cd3a90758bb6ad5d5bd (diff)
parentade63aada79c61bcd5f51cbd310f237399892268 (diff)
Merge branch 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr
Pull MIPS updates from Ralf Baechle: - Support for Imgtec's Aptiv family of MIPS cores. - Improved detection of BCM47xx configurations. - Fix hiberation for certain configurations. - Add support for the Chinese Loongson 3 CPU, a MIPS64 R2 core and systems. - Detection and support for the MIPS P5600 core. - A few more random fixes that didn't make 3.14. - Support for the EVA Extended Virtual Addressing - Switch Alchemy to the platform PATA driver - Complete unification of Alchemy support - Allow availability of I/O cache coherency to be runtime detected - Improvments to multiprocessing support for Imgtec platforms - A few microoptimizations - Cleanups of FPU support - Paul Gortmaker's fixes for the init stuff - Support for seccomp * 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr: (165 commits) MIPS: CPC: Use __raw_ memory access functions MIPS: CM: use __raw_ memory access functions MIPS: Fix warning when including smp-ops.h with CONFIG_SMP=n MIPS: Malta: GIC IPIs may be used without MT MIPS: smp-mt: Use common GIC IPI implementation MIPS: smp-cmp: Remove incorrect core number probe MIPS: Fix gigaton of warning building with microMIPS. MIPS: Fix core number detection for MT cores MIPS: MT: core_nvpes function to retrieve VPE count MIPS: Provide empty mips_mt_set_cpuoptions when CONFIG_MIPS_MT=n MIPS: Lasat: Replace del_timer by del_timer_sync MIPS: Malta: Setup PM I/O region on boot MIPS: Loongson: Add a Loongson-3 default config file MIPS: Loongson 3: Add CPU hotplug support MIPS: Loongson 3: Add Loongson-3 SMP support MIPS: Loongson: Add Loongson-3 Kconfig options MIPS: Loongson: Add swiotlb to support All-Memory DMA MIPS: Loongson 3: Add serial port support MIPS: Loongson 3: Add IRQ init and dispatch support MIPS: Loongson 3: Add HT-linked PCI support ...
Diffstat (limited to 'arch/mips/include/asm/asm.h')
-rw-r--r--arch/mips/include/asm/asm.h13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
index 879691d194af..7c26b28bf252 100644
--- a/arch/mips/include/asm/asm.h
+++ b/arch/mips/include/asm/asm.h
@@ -18,6 +18,7 @@
18#define __ASM_ASM_H 18#define __ASM_ASM_H
19 19
20#include <asm/sgidefs.h> 20#include <asm/sgidefs.h>
21#include <asm/asm-eva.h>
21 22
22#ifndef CAT 23#ifndef CAT
23#ifdef __STDC__ 24#ifdef __STDC__
@@ -145,19 +146,27 @@ symbol = value
145 146
146#define PREF(hint,addr) \ 147#define PREF(hint,addr) \
147 .set push; \ 148 .set push; \
148 .set mips4; \ 149 .set arch=r5000; \
149 pref hint, addr; \ 150 pref hint, addr; \
150 .set pop 151 .set pop
151 152
153#define PREFE(hint, addr) \
154 .set push; \
155 .set mips0; \
156 .set eva; \
157 prefe hint, addr; \
158 .set pop
159
152#define PREFX(hint,addr) \ 160#define PREFX(hint,addr) \
153 .set push; \ 161 .set push; \
154 .set mips4; \ 162 .set arch=r5000; \
155 prefx hint, addr; \ 163 prefx hint, addr; \
156 .set pop 164 .set pop
157 165
158#else /* !CONFIG_CPU_HAS_PREFETCH */ 166#else /* !CONFIG_CPU_HAS_PREFETCH */
159 167
160#define PREF(hint, addr) 168#define PREF(hint, addr)
169#define PREFE(hint, addr)
161#define PREFX(hint, addr) 170#define PREFX(hint, addr)
162 171
163#endif /* !CONFIG_CPU_HAS_PREFETCH */ 172#endif /* !CONFIG_CPU_HAS_PREFETCH */