diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-23 17:08:51 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2011-03-25 13:45:15 -0400 |
commit | 009c200a66a27c34c92ad02ac8c9758e6d0e34e3 (patch) | |
tree | 258cfd096863f5f1cd09b7e0b394522df266fd72 /arch/mips/dec/kn02-irq.c | |
parent | 93f293610446f10fd13de9f18b4d0300f0d89279 (diff) |
MIPS: DEC: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2178/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/dec/kn02-irq.c')
-rw-r--r-- | arch/mips/dec/kn02-irq.c | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index ed90a8deabcc..ef31d98c4fb8 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c | |||
@@ -27,43 +27,40 @@ | |||
27 | */ | 27 | */ |
28 | u32 cached_kn02_csr; | 28 | u32 cached_kn02_csr; |
29 | 29 | ||
30 | |||
31 | static int kn02_irq_base; | 30 | static int kn02_irq_base; |
32 | 31 | ||
33 | 32 | static void unmask_kn02_irq(struct irq_data *d) | |
34 | static inline void unmask_kn02_irq(unsigned int irq) | ||
35 | { | 33 | { |
36 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + | 34 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |
37 | KN02_CSR); | 35 | KN02_CSR); |
38 | 36 | ||
39 | cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); | 37 | cached_kn02_csr |= (1 << (d->irq - kn02_irq_base + 16)); |
40 | *csr = cached_kn02_csr; | 38 | *csr = cached_kn02_csr; |
41 | } | 39 | } |
42 | 40 | ||
43 | static inline void mask_kn02_irq(unsigned int irq) | 41 | static void mask_kn02_irq(struct irq_data *d) |
44 | { | 42 | { |
45 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + | 43 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |
46 | KN02_CSR); | 44 | KN02_CSR); |
47 | 45 | ||
48 | cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); | 46 | cached_kn02_csr &= ~(1 << (d->irq - kn02_irq_base + 16)); |
49 | *csr = cached_kn02_csr; | 47 | *csr = cached_kn02_csr; |
50 | } | 48 | } |
51 | 49 | ||
52 | static void ack_kn02_irq(unsigned int irq) | 50 | static void ack_kn02_irq(struct irq_data *d) |
53 | { | 51 | { |
54 | mask_kn02_irq(irq); | 52 | mask_kn02_irq(d); |
55 | iob(); | 53 | iob(); |
56 | } | 54 | } |
57 | 55 | ||
58 | static struct irq_chip kn02_irq_type = { | 56 | static struct irq_chip kn02_irq_type = { |
59 | .name = "KN02-CSR", | 57 | .name = "KN02-CSR", |
60 | .ack = ack_kn02_irq, | 58 | .irq_ack = ack_kn02_irq, |
61 | .mask = mask_kn02_irq, | 59 | .irq_mask = mask_kn02_irq, |
62 | .mask_ack = ack_kn02_irq, | 60 | .irq_mask_ack = ack_kn02_irq, |
63 | .unmask = unmask_kn02_irq, | 61 | .irq_unmask = unmask_kn02_irq, |
64 | }; | 62 | }; |
65 | 63 | ||
66 | |||
67 | void __init init_kn02_irqs(int base) | 64 | void __init init_kn02_irqs(int base) |
68 | { | 65 | { |
69 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + | 66 | volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + |