MIPS: sead3: Move device-trees to arch/mips/boot/dts/

Move the SEAD-3 device-tree to arch/mips/boot/dts/ and update the
Makefiles accordingly.  Since SEAD-3 requires the device-tree to be
built into the kernel, select BUILTIN_DTB when building for SEAD-3.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: Jayachandran C <jchandra@broadcom.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7555/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

2 files changed, 23 insertions, 0 deletions

diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index 4f265ec447eb..8df3d3ef0a85 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -1,5 +1,6 @@
 dtb-$(CONFIG_CAVIUM_OCTEON_SOC)         += octeon_3xxx.dtb octeon_68xx.dtb
 dtb-$(CONFIG_DT_EASY50712)              += easy50712.dtb
+dtb-$(CONFIG_MIPS_SEAD3)                += sead3.dtb
 
 obj-y           += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
 
diff --git a/arch/mips/boot/dts/sead3.dts b/arch/mips/boot/dts/sead3.dts
new file mode 100644
index 000000000000..e4b317d414f1
--- /dev/null
+++ b/arch/mips/boot/dts/sead3.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+
+/memreserve/ 0x00000000 0x00001000;     // reserved
+/memreserve/ 0x00001000 0x000ef000;     // ROM data
+/memreserve/ 0x000f0000 0x004cc000;     // reserved
+
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "mti,sead-3";
+
+        cpus {
+                cpu@0 {
+                        compatible = "mti,mips14KEc", "mti,mips14Kc";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x08000000>;
+        };
+};