MIPS: BMIPS: Add DTS files for several platforms

Most of the supported chips use legacy (non-DT) bootloaders, so they will
need to select an appropriate builtin DTB at compile time until the
bootloader is updated.  Provide suitable DTS files, and a means to compile
one of them into the kernel image.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: f.fainelli@gmail.com
Cc: abrestic@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8858/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 93 insertions, 0 deletions

diff --git a/arch/mips/boot/dts/brcm/bcm6368.dtsi b/arch/mips/boot/dts/brcm/bcm6368.dtsi
new file mode 100644
index 000000000000..45152bc22117
--- /dev/null
+++ b/arch/mips/boot/dts/brcm/bcm6368.dtsi
@@ -0,0 +1,93 @@
+/ {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        compatible = "brcm,bcm6368";
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                mips-hpt-frequency = <200000000>;
+
+                cpu@0 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <0>;
+                };
+
+                cpu@1 {
+                        compatible = "brcm,bmips4350";
+                        device_type = "cpu";
+                        reg = <1>;
+                };
+
+        };
+
+        clocks {
+                periph_clk: periph_clk {
+                        compatible = "fixed-clock";
+                        #clock-cells = <0>;
+                        clock-frequency = <50000000>;
+                };
+        };
+
+        aliases {
+                uart0 = &uart0;
+        };
+
+        cpu_intc: cpu_intc {
+                #address-cells = <0>;
+                compatible = "mti,cpu-interrupt-controller";
+
+                interrupt-controller;
+                #interrupt-cells = <1>;
+        };
+
+        ubus {
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                compatible = "simple-bus";
+                ranges;
+
+                periph_intc: periph_intc@10000020 {
+                        compatible = "brcm,bcm3380-l2-intc";
+                        reg = <0x10000024 0x4 0x1000002c 0x4>,
+                              <0x10000020 0x4 0x10000028 0x4>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <1>;
+
+                        interrupt-parent = <&cpu_intc>;
+                        interrupts = <2>;
+                };
+
+                uart0: serial@10000100 {
+                        compatible = "brcm,bcm6345-uart";
+                        reg = <0x10000100 0x18>;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <2>;
+                        clocks = <&periph_clk>;
+                        status = "disabled";
+                };
+
+                ehci0: usb@10001500 {
+                        compatible = "brcm,bcm6368-ehci", "generic-ehci";
+                        reg = <0x10001500 0x100>;
+                        big-endian;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <7>;
+                        status = "disabled";
+                };
+
+                ohci0: usb@10001600 {
+                        compatible = "brcm,bcm6368-ohci", "generic-ohci";
+                        reg = <0x10001600 0x100>;
+                        big-endian;
+                        no-big-frame-no;
+                        interrupt-parent = <&periph_intc>;
+                        interrupts = <5>;
+                        status = "disabled";
+                };
+        };
+};