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authorHauke Mehrtens <hauke@hauke-m.de>2011-07-22 19:20:14 -0400
committerJohn W. Linville <linville@tuxdriver.com>2011-08-08 14:29:32 -0400
commitc1d1c5d4213ee96e054c4d195117368972a4c01f (patch)
tree4ce75f49f1b46835ab613bd85084b9ce863c5853 /arch/mips/bcm47xx/setup.c
parenta656ffcbc7a98a80d2136ae6bbdd8ae2eb48c78a (diff)
bcm47xx: add support for bcma bus
This patch add support for the bcma bus. Broadcom uses only Mips 74K CPUs on the new SoC and on the old ons using ssb bus there are no Mips 74K CPUs. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'arch/mips/bcm47xx/setup.c')
-rw-r--r--arch/mips/bcm47xx/setup.c53
1 files changed, 51 insertions, 2 deletions
diff --git a/arch/mips/bcm47xx/setup.c b/arch/mips/bcm47xx/setup.c
index 142cf1bc8884..17c3d14d7c49 100644
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -29,6 +29,7 @@
29#include <linux/types.h> 29#include <linux/types.h>
30#include <linux/ssb/ssb.h> 30#include <linux/ssb/ssb.h>
31#include <linux/ssb/ssb_embedded.h> 31#include <linux/ssb/ssb_embedded.h>
32#include <linux/bcma/bcma_soc.h>
32#include <asm/bootinfo.h> 33#include <asm/bootinfo.h>
33#include <asm/reboot.h> 34#include <asm/reboot.h>
34#include <asm/time.h> 35#include <asm/time.h>
@@ -52,6 +53,11 @@ static void bcm47xx_machine_restart(char *command)
52 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); 53 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
53 break; 54 break;
54#endif 55#endif
56#ifdef CONFIG_BCM47XX_BCMA
57 case BCM47XX_BUS_TYPE_BCMA:
58 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
59 break;
60#endif
55 } 61 }
56 while (1) 62 while (1)
57 cpu_relax(); 63 cpu_relax();
@@ -67,6 +73,11 @@ static void bcm47xx_machine_halt(void)
67 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); 73 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
68 break; 74 break;
69#endif 75#endif
76#ifdef CONFIG_BCM47XX_BCMA
77 case BCM47XX_BUS_TYPE_BCMA:
78 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
79 break;
80#endif
70 } 81 }
71 while (1) 82 while (1)
72 cpu_relax(); 83 cpu_relax();
@@ -295,16 +306,54 @@ static void __init bcm47xx_register_ssb(void)
295} 306}
296#endif 307#endif
297 308
309#ifdef CONFIG_BCM47XX_BCMA
310static void __init bcm47xx_register_bcma(void)
311{
312 int err;
313
314 err = bcma_host_soc_register(&bcm47xx_bus.bcma);
315 if (err)
316 panic("Failed to initialize BCMA bus (err %d)\n", err);
317}
318#endif
319
298void __init plat_mem_setup(void) 320void __init plat_mem_setup(void)
299{ 321{
300 struct cpuinfo_mips *c = &current_cpu_data; 322 struct cpuinfo_mips *c = &current_cpu_data;
301 323
324 if (c->cputype == CPU_74K) {
325 printk(KERN_INFO "bcm47xx: using bcma bus\n");
326#ifdef CONFIG_BCM47XX_BCMA
327 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
328 bcm47xx_register_bcma();
329#endif
330 } else {
331 printk(KERN_INFO "bcm47xx: using ssb bus\n");
302#ifdef CONFIG_BCM47XX_SSB 332#ifdef CONFIG_BCM47XX_SSB
303 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; 333 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
304 bcm47xx_register_ssb(); 334 bcm47xx_register_ssb();
305#endif 335#endif
336 }
306 337
307 _machine_restart = bcm47xx_machine_restart; 338 _machine_restart = bcm47xx_machine_restart;
308 _machine_halt = bcm47xx_machine_halt; 339 _machine_halt = bcm47xx_machine_halt;
309 pm_power_off = bcm47xx_machine_halt; 340 pm_power_off = bcm47xx_machine_halt;
310} 341}
342
343static int __init bcm47xx_register_bus_complete(void)
344{
345 switch (bcm47xx_bus_type) {
346#ifdef CONFIG_BCM47XX_SSB
347 case BCM47XX_BUS_TYPE_SSB:
348 /* Nothing to do */
349 break;
350#endif
351#ifdef CONFIG_BCM47XX_BCMA
352 case BCM47XX_BUS_TYPE_BCMA:
353 bcma_bus_register(&bcm47xx_bus.bcma.bus);
354 break;
355#endif
356 }
357 return 0;
358}
359device_initcall(bcm47xx_register_bus_complete);