MIPS: ath79: Handle more MISC IRQs

The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller.
The patch adds support for them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2440/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1 files changed, 12 insertions, 0 deletions

diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
index ac610d5fe3ba..0d98114cbf4d 100644
--- a/arch/mips/ath79/irq.c
+++ b/arch/mips/ath79/irq.c
@@ -46,6 +46,15 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
         else if (pending & MISC_INT_TIMER)
                 generic_handle_irq(ATH79_MISC_IRQ_TIMER);
 
+        else if (pending & MISC_INT_TIMER2)
+                generic_handle_irq(ATH79_MISC_IRQ_TIMER2);
+
+        else if (pending & MISC_INT_TIMER3)
+                generic_handle_irq(ATH79_MISC_IRQ_TIMER3);
+
+        else if (pending & MISC_INT_TIMER4)
+                generic_handle_irq(ATH79_MISC_IRQ_TIMER4);
+
         else if (pending & MISC_INT_OHCI)
                 generic_handle_irq(ATH79_MISC_IRQ_OHCI);
 
@@ -58,6 +67,9 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
         else if (pending & MISC_INT_WDOG)
                 generic_handle_irq(ATH79_MISC_IRQ_WDOG);
 
+        else if (pending & MISC_INT_ETHSW)
+                generic_handle_irq(ATH79_MISC_IRQ_ETHSW);
+
         else
                 spurious_interrupt();
 }