diff options
author | Sergey Ryazanov <ryazanov.s.a@gmail.com> | 2014-10-28 19:18:47 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 01:45:28 -0500 |
commit | 3ed7a2a702dc0f5bc44d67f27a1a289356b5dc42 (patch) | |
tree | e6be54de91de364abe733cf1b6ebec18aaf48ca1 /arch/mips/ath25 | |
parent | d58eaa7ffdcb58ab8bb95927149e2f152ec163c6 (diff) |
MIPS: ath25: add AR2315 PCI host controller driver
Add PCI host controller driver and DMA address calculation hook.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8246/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath25')
-rw-r--r-- | arch/mips/ath25/Kconfig | 7 | ||||
-rw-r--r-- | arch/mips/ath25/ar2315.c | 57 |
2 files changed, 64 insertions, 0 deletions
diff --git a/arch/mips/ath25/Kconfig b/arch/mips/ath25/Kconfig index ca3dde472bef..fc19dd57e42d 100644 --- a/arch/mips/ath25/Kconfig +++ b/arch/mips/ath25/Kconfig | |||
@@ -7,3 +7,10 @@ config SOC_AR2315 | |||
7 | bool "Atheros AR2315+ SoC support" | 7 | bool "Atheros AR2315+ SoC support" |
8 | depends on ATH25 | 8 | depends on ATH25 |
9 | default y | 9 | default y |
10 | |||
11 | config PCI_AR2315 | ||
12 | bool "Atheros AR2315 PCI controller support" | ||
13 | depends on SOC_AR2315 | ||
14 | select HW_HAS_PCI | ||
15 | select PCI | ||
16 | default y | ||
diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c index 52805b725a67..f02478915afd 100644 --- a/arch/mips/ath25/ar2315.c +++ b/arch/mips/ath25/ar2315.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/bitops.h> | 19 | #include <linux/bitops.h> |
20 | #include <linux/irqdomain.h> | 20 | #include <linux/irqdomain.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/platform_device.h> | ||
22 | #include <linux/reboot.h> | 23 | #include <linux/reboot.h> |
23 | #include <asm/bootinfo.h> | 24 | #include <asm/bootinfo.h> |
24 | #include <asm/reboot.h> | 25 | #include <asm/reboot.h> |
@@ -133,6 +134,10 @@ static void ar2315_irq_dispatch(void) | |||
133 | 134 | ||
134 | if (pending & CAUSEF_IP3) | 135 | if (pending & CAUSEF_IP3) |
135 | do_IRQ(AR2315_IRQ_WLAN0); | 136 | do_IRQ(AR2315_IRQ_WLAN0); |
137 | #ifdef CONFIG_PCI_AR2315 | ||
138 | else if (pending & CAUSEF_IP5) | ||
139 | do_IRQ(AR2315_IRQ_LCBUS_PCI); | ||
140 | #endif | ||
136 | else if (pending & CAUSEF_IP2) | 141 | else if (pending & CAUSEF_IP2) |
137 | do_IRQ(AR2315_IRQ_MISC); | 142 | do_IRQ(AR2315_IRQ_MISC); |
138 | else if (pending & CAUSEF_IP7) | 143 | else if (pending & CAUSEF_IP7) |
@@ -296,10 +301,62 @@ void __init ar2315_plat_mem_setup(void) | |||
296 | _machine_restart = ar2315_restart; | 301 | _machine_restart = ar2315_restart; |
297 | } | 302 | } |
298 | 303 | ||
304 | #ifdef CONFIG_PCI_AR2315 | ||
305 | static struct resource ar2315_pci_res[] = { | ||
306 | { | ||
307 | .name = "ar2315-pci-ctrl", | ||
308 | .flags = IORESOURCE_MEM, | ||
309 | .start = AR2315_PCI_BASE, | ||
310 | .end = AR2315_PCI_BASE + AR2315_PCI_SIZE - 1, | ||
311 | }, | ||
312 | { | ||
313 | .name = "ar2315-pci-ext", | ||
314 | .flags = IORESOURCE_MEM, | ||
315 | .start = AR2315_PCI_EXT_BASE, | ||
316 | .end = AR2315_PCI_EXT_BASE + AR2315_PCI_EXT_SIZE - 1, | ||
317 | }, | ||
318 | { | ||
319 | .name = "ar2315-pci", | ||
320 | .flags = IORESOURCE_IRQ, | ||
321 | .start = AR2315_IRQ_LCBUS_PCI, | ||
322 | .end = AR2315_IRQ_LCBUS_PCI, | ||
323 | }, | ||
324 | }; | ||
325 | #endif | ||
326 | |||
299 | void __init ar2315_arch_init(void) | 327 | void __init ar2315_arch_init(void) |
300 | { | 328 | { |
301 | unsigned irq = irq_create_mapping(ar2315_misc_irq_domain, | 329 | unsigned irq = irq_create_mapping(ar2315_misc_irq_domain, |
302 | AR2315_MISC_IRQ_UART0); | 330 | AR2315_MISC_IRQ_UART0); |
303 | 331 | ||
304 | ath25_serial_setup(AR2315_UART0_BASE, irq, ar2315_apb_frequency()); | 332 | ath25_serial_setup(AR2315_UART0_BASE, irq, ar2315_apb_frequency()); |
333 | |||
334 | #ifdef CONFIG_PCI_AR2315 | ||
335 | if (ath25_soc == ATH25_SOC_AR2315) { | ||
336 | /* Reset PCI DMA logic */ | ||
337 | ar2315_rst_reg_mask(AR2315_RESET, 0, AR2315_RESET_PCIDMA); | ||
338 | msleep(20); | ||
339 | ar2315_rst_reg_mask(AR2315_RESET, AR2315_RESET_PCIDMA, 0); | ||
340 | msleep(20); | ||
341 | |||
342 | /* Configure endians */ | ||
343 | ar2315_rst_reg_mask(AR2315_ENDIAN_CTL, 0, AR2315_CONFIG_PCIAHB | | ||
344 | AR2315_CONFIG_PCIAHB_BRIDGE); | ||
345 | |||
346 | /* Configure as PCI host with DMA */ | ||
347 | ar2315_rst_reg_write(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM | | ||
348 | (AR2315_PCICLK_IN_FREQ_DIV_6 << | ||
349 | AR2315_PCICLK_DIV_S)); | ||
350 | ar2315_rst_reg_mask(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI); | ||
351 | ar2315_rst_reg_mask(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | | ||
352 | AR2315_IF_MASK, AR2315_IF_PCI | | ||
353 | AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR | | ||
354 | (AR2315_IF_PCI_CLK_OUTPUT_CLK << | ||
355 | AR2315_IF_PCI_CLK_SHIFT)); | ||
356 | |||
357 | platform_device_register_simple("ar2315-pci", -1, | ||
358 | ar2315_pci_res, | ||
359 | ARRAY_SIZE(ar2315_pci_res)); | ||
360 | } | ||
361 | #endif | ||
305 | } | 362 | } |