aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/alchemy
diff options
context:
space:
mode:
authorManuel Lauss <manuel.lauss@googlemail.com>2009-08-22 12:09:27 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-09-17 14:07:50 -0400
commit2882b0c63ac6085fd5c18959240b6f7d6ffb8d5b (patch)
treea95571203336aaec43dd505c81ab7dc8e46efa78 /arch/mips/alchemy
parent9d24bafb0d1ecf636f71a56f9d6f071f5c7a882d (diff)
MIPS: Alchemy: get rid of allow_au1k_wait
Eliminate the 'allow_au1k_wait' variable. MIPS kernel installs the Alchemy-specific wait code before timer initialization; if the C0 timer must be used for timekeeping the wait function is set to NULL which means no wait implementation is available. As a sideeffect, the 'wait instruction available' output in /proc/cpuinfo now correctly indicates whether 'wait' is usable. Run-tested on DB1200. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy')
-rw-r--r--arch/mips/alchemy/common/time.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c
index 33fbae79af5e..f34ff8601942 100644
--- a/arch/mips/alchemy/common/time.c
+++ b/arch/mips/alchemy/common/time.c
@@ -36,14 +36,13 @@
36#include <linux/interrupt.h> 36#include <linux/interrupt.h>
37#include <linux/spinlock.h> 37#include <linux/spinlock.h>
38 38
39#include <asm/processor.h>
39#include <asm/time.h> 40#include <asm/time.h>
40#include <asm/mach-au1x00/au1000.h> 41#include <asm/mach-au1x00/au1000.h>
41 42
42/* 32kHz clock enabled and detected */ 43/* 32kHz clock enabled and detected */
43#define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S) 44#define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
44 45
45extern int allow_au1k_wait; /* default off for CP0 Counter */
46
47static cycle_t au1x_counter1_read(struct clocksource *cs) 46static cycle_t au1x_counter1_read(struct clocksource *cs)
48{ 47{
49 return au_readl(SYS_RTCREAD); 48 return au_readl(SYS_RTCREAD);
@@ -153,13 +152,17 @@ void __init plat_time_init(void)
153 152
154 printk(KERN_INFO "Alchemy clocksource installed\n"); 153 printk(KERN_INFO "Alchemy clocksource installed\n");
155 154
156 /* can now use 'wait' */
157 allow_au1k_wait = 1;
158 return; 155 return;
159 156
160cntr_err: 157cntr_err:
161 /* counters unusable, use C0 counter */ 158 /*
159 * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this
160 * function is called. Because the Alchemy counters are unusable
161 * the C0 timekeeping code is installed and use of the 'wait'
162 * instruction must be prohibited, which is done most easily by
163 * assigning NULL to cpu_wait.
164 */
165 cpu_wait = NULL;
162 r4k_clockevent_init(); 166 r4k_clockevent_init();
163 init_r4k_clocksource(); 167 init_r4k_clocksource();
164 allow_au1k_wait = 0;
165} 168}