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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-20 01:36:52 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-20 01:36:52 -0400
commit880102e78547c1db158a17e36cf0cdd98e7ad710 (patch)
tree3fff9cc54c44dafe275cfabefb96c589e08d971d /arch/mips/alchemy/common/platform.c
parent3d07f0e83d4323d2cd45cc583f7cf1957aca3cac (diff)
parent39ab05c8e0b519ff0a04a869f065746e6e8c3d95 (diff)
Merge remote branch 'origin/master' into merge
Manual merge of arch/powerpc/kernel/smp.c and add missing scheduler_ipi() call to arch/powerpc/platforms/cell/interrupt.c Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/mips/alchemy/common/platform.c')
-rw-r--r--arch/mips/alchemy/common/platform.c250
1 files changed, 155 insertions, 95 deletions
diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c
index 9e7814db3d03..3b2c18b14341 100644
--- a/arch/mips/alchemy/common/platform.c
+++ b/arch/mips/alchemy/common/platform.c
@@ -13,9 +13,10 @@
13 13
14#include <linux/dma-mapping.h> 14#include <linux/dma-mapping.h>
15#include <linux/etherdevice.h> 15#include <linux/etherdevice.h>
16#include <linux/init.h>
16#include <linux/platform_device.h> 17#include <linux/platform_device.h>
17#include <linux/serial_8250.h> 18#include <linux/serial_8250.h>
18#include <linux/init.h> 19#include <linux/slab.h>
19 20
20#include <asm/mach-au1x00/au1xxx.h> 21#include <asm/mach-au1x00/au1xxx.h>
21#include <asm/mach-au1x00/au1xxx_dbdma.h> 22#include <asm/mach-au1x00/au1xxx_dbdma.h>
@@ -30,21 +31,12 @@ static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
30#ifdef CONFIG_SERIAL_8250 31#ifdef CONFIG_SERIAL_8250
31 switch (state) { 32 switch (state) {
32 case 0: 33 case 0:
33 if ((__raw_readl(port->membase + UART_MOD_CNTRL) & 3) != 3) { 34 alchemy_uart_enable(CPHYSADDR(port->membase));
34 /* power-on sequence as suggested in the databooks */
35 __raw_writel(0, port->membase + UART_MOD_CNTRL);
36 wmb();
37 __raw_writel(1, port->membase + UART_MOD_CNTRL);
38 wmb();
39 }
40 __raw_writel(3, port->membase + UART_MOD_CNTRL); /* full on */
41 wmb();
42 serial8250_do_pm(port, state, old_state); 35 serial8250_do_pm(port, state, old_state);
43 break; 36 break;
44 case 3: /* power off */ 37 case 3: /* power off */
45 serial8250_do_pm(port, state, old_state); 38 serial8250_do_pm(port, state, old_state);
46 __raw_writel(0, port->membase + UART_MOD_CNTRL); 39 alchemy_uart_disable(CPHYSADDR(port->membase));
47 wmb();
48 break; 40 break;
49 default: 41 default:
50 serial8250_do_pm(port, state, old_state); 42 serial8250_do_pm(port, state, old_state);
@@ -65,38 +57,60 @@ static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
65 .pm = alchemy_8250_pm, \ 57 .pm = alchemy_8250_pm, \
66 } 58 }
67 59
68static struct plat_serial8250_port au1x00_uart_data[] = { 60static struct plat_serial8250_port au1x00_uart_data[][4] __initdata = {
69#if defined(CONFIG_SOC_AU1000) 61 [ALCHEMY_CPU_AU1000] = {
70 PORT(UART0_PHYS_ADDR, AU1000_UART0_INT), 62 PORT(AU1000_UART0_PHYS_ADDR, AU1000_UART0_INT),
71 PORT(UART1_PHYS_ADDR, AU1000_UART1_INT), 63 PORT(AU1000_UART1_PHYS_ADDR, AU1000_UART1_INT),
72 PORT(UART2_PHYS_ADDR, AU1000_UART2_INT), 64 PORT(AU1000_UART2_PHYS_ADDR, AU1000_UART2_INT),
73 PORT(UART3_PHYS_ADDR, AU1000_UART3_INT), 65 PORT(AU1000_UART3_PHYS_ADDR, AU1000_UART3_INT),
74#elif defined(CONFIG_SOC_AU1500) 66 },
75 PORT(UART0_PHYS_ADDR, AU1500_UART0_INT), 67 [ALCHEMY_CPU_AU1500] = {
76 PORT(UART3_PHYS_ADDR, AU1500_UART3_INT), 68 PORT(AU1000_UART0_PHYS_ADDR, AU1500_UART0_INT),
77#elif defined(CONFIG_SOC_AU1100) 69 PORT(AU1000_UART3_PHYS_ADDR, AU1500_UART3_INT),
78 PORT(UART0_PHYS_ADDR, AU1100_UART0_INT), 70 },
79 PORT(UART1_PHYS_ADDR, AU1100_UART1_INT), 71 [ALCHEMY_CPU_AU1100] = {
80 PORT(UART3_PHYS_ADDR, AU1100_UART3_INT), 72 PORT(AU1000_UART0_PHYS_ADDR, AU1100_UART0_INT),
81#elif defined(CONFIG_SOC_AU1550) 73 PORT(AU1000_UART1_PHYS_ADDR, AU1100_UART1_INT),
82 PORT(UART0_PHYS_ADDR, AU1550_UART0_INT), 74 PORT(AU1000_UART3_PHYS_ADDR, AU1100_UART3_INT),
83 PORT(UART1_PHYS_ADDR, AU1550_UART1_INT), 75 },
84 PORT(UART3_PHYS_ADDR, AU1550_UART3_INT), 76 [ALCHEMY_CPU_AU1550] = {
85#elif defined(CONFIG_SOC_AU1200) 77 PORT(AU1000_UART0_PHYS_ADDR, AU1550_UART0_INT),
86 PORT(UART0_PHYS_ADDR, AU1200_UART0_INT), 78 PORT(AU1000_UART1_PHYS_ADDR, AU1550_UART1_INT),
87 PORT(UART1_PHYS_ADDR, AU1200_UART1_INT), 79 PORT(AU1000_UART3_PHYS_ADDR, AU1550_UART3_INT),
88#endif 80 },
89 { }, 81 [ALCHEMY_CPU_AU1200] = {
82 PORT(AU1000_UART0_PHYS_ADDR, AU1200_UART0_INT),
83 PORT(AU1000_UART1_PHYS_ADDR, AU1200_UART1_INT),
84 },
90}; 85};
91 86
92static struct platform_device au1xx0_uart_device = { 87static struct platform_device au1xx0_uart_device = {
93 .name = "serial8250", 88 .name = "serial8250",
94 .id = PLAT8250_DEV_AU1X00, 89 .id = PLAT8250_DEV_AU1X00,
95 .dev = {
96 .platform_data = au1x00_uart_data,
97 },
98}; 90};
99 91
92static void __init alchemy_setup_uarts(int ctype)
93{
94 unsigned int uartclk = get_au1x00_uart_baud_base() * 16;
95 int s = sizeof(struct plat_serial8250_port);
96 int c = alchemy_get_uarts(ctype);
97 struct plat_serial8250_port *ports;
98
99 ports = kzalloc(s * (c + 1), GFP_KERNEL);
100 if (!ports) {
101 printk(KERN_INFO "Alchemy: no memory for UART data\n");
102 return;
103 }
104 memcpy(ports, au1x00_uart_data[ctype], s * c);
105 au1xx0_uart_device.dev.platform_data = ports;
106
107 /* Fill up uartclk. */
108 for (s = 0; s < c; s++)
109 ports[s].uartclk = uartclk;
110 if (platform_device_register(&au1xx0_uart_device))
111 printk(KERN_INFO "Alchemy: failed to register UARTs\n");
112}
113
100/* OHCI (USB full speed host controller) */ 114/* OHCI (USB full speed host controller) */
101static struct resource au1xxx_usb_ohci_resources[] = { 115static struct resource au1xxx_usb_ohci_resources[] = {
102 [0] = { 116 [0] = {
@@ -269,8 +283,8 @@ extern struct au1xmmc_platform_data au1xmmc_platdata[2];
269 283
270static struct resource au1200_mmc0_resources[] = { 284static struct resource au1200_mmc0_resources[] = {
271 [0] = { 285 [0] = {
272 .start = SD0_PHYS_ADDR, 286 .start = AU1100_SD0_PHYS_ADDR,
273 .end = SD0_PHYS_ADDR + 0x7ffff, 287 .end = AU1100_SD0_PHYS_ADDR + 0xfff,
274 .flags = IORESOURCE_MEM, 288 .flags = IORESOURCE_MEM,
275 }, 289 },
276 [1] = { 290 [1] = {
@@ -305,8 +319,8 @@ static struct platform_device au1200_mmc0_device = {
305#ifndef CONFIG_MIPS_DB1200 319#ifndef CONFIG_MIPS_DB1200
306static struct resource au1200_mmc1_resources[] = { 320static struct resource au1200_mmc1_resources[] = {
307 [0] = { 321 [0] = {
308 .start = SD1_PHYS_ADDR, 322 .start = AU1100_SD1_PHYS_ADDR,
309 .end = SD1_PHYS_ADDR + 0x7ffff, 323 .end = AU1100_SD1_PHYS_ADDR + 0xfff,
310 .flags = IORESOURCE_MEM, 324 .flags = IORESOURCE_MEM,
311 }, 325 },
312 [1] = { 326 [1] = {
@@ -359,15 +373,16 @@ static struct platform_device pbdb_smbus_device = {
359#endif 373#endif
360 374
361/* Macro to help defining the Ethernet MAC resources */ 375/* Macro to help defining the Ethernet MAC resources */
376#define MAC_RES_COUNT 3 /* MAC regs base, MAC enable reg, MAC INT */
362#define MAC_RES(_base, _enable, _irq) \ 377#define MAC_RES(_base, _enable, _irq) \
363 { \ 378 { \
364 .start = CPHYSADDR(_base), \ 379 .start = _base, \
365 .end = CPHYSADDR(_base + 0xffff), \ 380 .end = _base + 0xffff, \
366 .flags = IORESOURCE_MEM, \ 381 .flags = IORESOURCE_MEM, \
367 }, \ 382 }, \
368 { \ 383 { \
369 .start = CPHYSADDR(_enable), \ 384 .start = _enable, \
370 .end = CPHYSADDR(_enable + 0x3), \ 385 .end = _enable + 0x3, \
371 .flags = IORESOURCE_MEM, \ 386 .flags = IORESOURCE_MEM, \
372 }, \ 387 }, \
373 { \ 388 { \
@@ -376,19 +391,29 @@ static struct platform_device pbdb_smbus_device = {
376 .flags = IORESOURCE_IRQ \ 391 .flags = IORESOURCE_IRQ \
377 } 392 }
378 393
379static struct resource au1xxx_eth0_resources[] = { 394static struct resource au1xxx_eth0_resources[][MAC_RES_COUNT] __initdata = {
380#if defined(CONFIG_SOC_AU1000) 395 [ALCHEMY_CPU_AU1000] = {
381 MAC_RES(AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT), 396 MAC_RES(AU1000_MAC0_PHYS_ADDR,
382#elif defined(CONFIG_SOC_AU1100) 397 AU1000_MACEN_PHYS_ADDR,
383 MAC_RES(AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT), 398 AU1000_MAC0_DMA_INT)
384#elif defined(CONFIG_SOC_AU1550) 399 },
385 MAC_RES(AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT), 400 [ALCHEMY_CPU_AU1500] = {
386#elif defined(CONFIG_SOC_AU1500) 401 MAC_RES(AU1500_MAC0_PHYS_ADDR,
387 MAC_RES(AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT), 402 AU1500_MACEN_PHYS_ADDR,
388#endif 403 AU1500_MAC0_DMA_INT)
404 },
405 [ALCHEMY_CPU_AU1100] = {
406 MAC_RES(AU1000_MAC0_PHYS_ADDR,
407 AU1000_MACEN_PHYS_ADDR,
408 AU1100_MAC0_DMA_INT)
409 },
410 [ALCHEMY_CPU_AU1550] = {
411 MAC_RES(AU1000_MAC0_PHYS_ADDR,
412 AU1000_MACEN_PHYS_ADDR,
413 AU1550_MAC0_DMA_INT)
414 },
389}; 415};
390 416
391
392static struct au1000_eth_platform_data au1xxx_eth0_platform_data = { 417static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
393 .phy1_search_mac0 = 1, 418 .phy1_search_mac0 = 1,
394}; 419};
@@ -396,20 +421,26 @@ static struct au1000_eth_platform_data au1xxx_eth0_platform_data = {
396static struct platform_device au1xxx_eth0_device = { 421static struct platform_device au1xxx_eth0_device = {
397 .name = "au1000-eth", 422 .name = "au1000-eth",
398 .id = 0, 423 .id = 0,
399 .num_resources = ARRAY_SIZE(au1xxx_eth0_resources), 424 .num_resources = MAC_RES_COUNT,
400 .resource = au1xxx_eth0_resources,
401 .dev.platform_data = &au1xxx_eth0_platform_data, 425 .dev.platform_data = &au1xxx_eth0_platform_data,
402}; 426};
403 427
404#ifndef CONFIG_SOC_AU1100 428static struct resource au1xxx_eth1_resources[][MAC_RES_COUNT] __initdata = {
405static struct resource au1xxx_eth1_resources[] = { 429 [ALCHEMY_CPU_AU1000] = {
406#if defined(CONFIG_SOC_AU1000) 430 MAC_RES(AU1000_MAC1_PHYS_ADDR,
407 MAC_RES(AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT), 431 AU1000_MACEN_PHYS_ADDR + 4,
408#elif defined(CONFIG_SOC_AU1550) 432 AU1000_MAC1_DMA_INT)
409 MAC_RES(AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT), 433 },
410#elif defined(CONFIG_SOC_AU1500) 434 [ALCHEMY_CPU_AU1500] = {
411 MAC_RES(AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT), 435 MAC_RES(AU1500_MAC1_PHYS_ADDR,
412#endif 436 AU1500_MACEN_PHYS_ADDR + 4,
437 AU1500_MAC1_DMA_INT)
438 },
439 [ALCHEMY_CPU_AU1550] = {
440 MAC_RES(AU1000_MAC1_PHYS_ADDR,
441 AU1000_MACEN_PHYS_ADDR + 4,
442 AU1550_MAC1_DMA_INT)
443 },
413}; 444};
414 445
415static struct au1000_eth_platform_data au1xxx_eth1_platform_data = { 446static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
@@ -419,11 +450,9 @@ static struct au1000_eth_platform_data au1xxx_eth1_platform_data = {
419static struct platform_device au1xxx_eth1_device = { 450static struct platform_device au1xxx_eth1_device = {
420 .name = "au1000-eth", 451 .name = "au1000-eth",
421 .id = 1, 452 .id = 1,
422 .num_resources = ARRAY_SIZE(au1xxx_eth1_resources), 453 .num_resources = MAC_RES_COUNT,
423 .resource = au1xxx_eth1_resources,
424 .dev.platform_data = &au1xxx_eth1_platform_data, 454 .dev.platform_data = &au1xxx_eth1_platform_data,
425}; 455};
426#endif
427 456
428void __init au1xxx_override_eth_cfg(unsigned int port, 457void __init au1xxx_override_eth_cfg(unsigned int port,
429 struct au1000_eth_platform_data *eth_data) 458 struct au1000_eth_platform_data *eth_data)
@@ -434,15 +463,65 @@ void __init au1xxx_override_eth_cfg(unsigned int port,
434 if (port == 0) 463 if (port == 0)
435 memcpy(&au1xxx_eth0_platform_data, eth_data, 464 memcpy(&au1xxx_eth0_platform_data, eth_data,
436 sizeof(struct au1000_eth_platform_data)); 465 sizeof(struct au1000_eth_platform_data));
437#ifndef CONFIG_SOC_AU1100
438 else 466 else
439 memcpy(&au1xxx_eth1_platform_data, eth_data, 467 memcpy(&au1xxx_eth1_platform_data, eth_data,
440 sizeof(struct au1000_eth_platform_data)); 468 sizeof(struct au1000_eth_platform_data));
441#endif 469}
470
471static void __init alchemy_setup_macs(int ctype)
472{
473 int ret, i;
474 unsigned char ethaddr[6];
475 struct resource *macres;
476
477 /* Handle 1st MAC */
478 if (alchemy_get_macs(ctype) < 1)
479 return;
480
481 macres = kmalloc(sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
482 if (!macres) {
483 printk(KERN_INFO "Alchemy: no memory for MAC0 resources\n");
484 return;
485 }
486 memcpy(macres, au1xxx_eth0_resources[ctype],
487 sizeof(struct resource) * MAC_RES_COUNT);
488 au1xxx_eth0_device.resource = macres;
489
490 i = prom_get_ethernet_addr(ethaddr);
491 if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
492 memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
493
494 ret = platform_device_register(&au1xxx_eth0_device);
495 if (!ret)
496 printk(KERN_INFO "Alchemy: failed to register MAC0\n");
497
498
499 /* Handle 2nd MAC */
500 if (alchemy_get_macs(ctype) < 2)
501 return;
502
503 macres = kmalloc(sizeof(struct resource) * MAC_RES_COUNT, GFP_KERNEL);
504 if (!macres) {
505 printk(KERN_INFO "Alchemy: no memory for MAC1 resources\n");
506 return;
507 }
508 memcpy(macres, au1xxx_eth1_resources[ctype],
509 sizeof(struct resource) * MAC_RES_COUNT);
510 au1xxx_eth1_device.resource = macres;
511
512 ethaddr[5] += 1; /* next addr for 2nd MAC */
513 if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
514 memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
515
516 /* Register second MAC if enabled in pinfunc */
517 if (!(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2)) {
518 ret = platform_device_register(&au1xxx_eth1_device);
519 if (ret)
520 printk(KERN_INFO "Alchemy: failed to register MAC1\n");
521 }
442} 522}
443 523
444static struct platform_device *au1xxx_platform_devices[] __initdata = { 524static struct platform_device *au1xxx_platform_devices[] __initdata = {
445 &au1xx0_uart_device,
446 &au1xxx_usb_ohci_device, 525 &au1xxx_usb_ohci_device,
447#ifdef CONFIG_FB_AU1100 526#ifdef CONFIG_FB_AU1100
448 &au1100_lcd_device, 527 &au1100_lcd_device,
@@ -460,36 +539,17 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = {
460#ifdef SMBUS_PSC_BASE 539#ifdef SMBUS_PSC_BASE
461 &pbdb_smbus_device, 540 &pbdb_smbus_device,
462#endif 541#endif
463 &au1xxx_eth0_device,
464}; 542};
465 543
466static int __init au1xxx_platform_init(void) 544static int __init au1xxx_platform_init(void)
467{ 545{
468 unsigned int uartclk = get_au1x00_uart_baud_base() * 16; 546 int err, ctype = alchemy_get_cputype();
469 int err, i;
470 unsigned char ethaddr[6];
471 547
472 /* Fill up uartclk. */ 548 alchemy_setup_uarts(ctype);
473 for (i = 0; au1x00_uart_data[i].flags; i++) 549 alchemy_setup_macs(ctype);
474 au1x00_uart_data[i].uartclk = uartclk;
475
476 /* use firmware-provided mac addr if available and necessary */
477 i = prom_get_ethernet_addr(ethaddr);
478 if (!i && !is_valid_ether_addr(au1xxx_eth0_platform_data.mac))
479 memcpy(au1xxx_eth0_platform_data.mac, ethaddr, 6);
480 550
481 err = platform_add_devices(au1xxx_platform_devices, 551 err = platform_add_devices(au1xxx_platform_devices,
482 ARRAY_SIZE(au1xxx_platform_devices)); 552 ARRAY_SIZE(au1xxx_platform_devices));
483#ifndef CONFIG_SOC_AU1100
484 ethaddr[5] += 1; /* next addr for 2nd MAC */
485 if (!i && !is_valid_ether_addr(au1xxx_eth1_platform_data.mac))
486 memcpy(au1xxx_eth1_platform_data.mac, ethaddr, 6);
487
488 /* Register second MAC if enabled in pinfunc */
489 if (!err && !(au_readl(SYS_PINFUNC) & (u32)SYS_PF_NI2))
490 err = platform_device_register(&au1xxx_eth1_device);
491#endif
492
493 return err; 553 return err;
494} 554}
495 555