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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-03 16:28:14 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-03 16:28:14 -0400 |
commit | d6748066ad0e8b2514545998f8367ebb3906f299 (patch) | |
tree | f7a9bfd764a8fb781aeda0ef2249afbab42dddf7 /arch/mips/Kconfig | |
parent | f04c045f8ce69c22bda9d99eb927276b776135fc (diff) | |
parent | 3ba1e543ab4b02640d396098f2f6a199560d5f2d (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (37 commits)
MIPS: O32: Provide definition of registers ta0 .. ta3.
MIPS: perf: Add Octeon support for hardware perf.
MIPS: perf: Add support for 64-bit perf counters.
MIPS: perf: Reorganize contents of perf support files.
MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c
MIPS: Add accessor macros for 64-bit performance counter registers.
MIPS: Add probes for more Octeon II CPUs.
MIPS: Add more CPU identifiers for Octeon II CPUs.
MIPS: XLR, XLS: Add comment for smp setup
MIPS: JZ4740: GPIO: Check correct IRQ in demux handler
MIPS: JZ4740: GPIO: Simplify IRQ demuxer
MIPS: JZ4740: Use generic irq chip
MIPS: Alchemy: remove all CONFIG_SOC_AU1??? defines
MIPS: Alchemy: kill au1xxx.h header
MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? defines
MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep
MIPS: Alchemy: Redo PCI as platform driver
MIPS: Alchemy: more base address cleanup
MIPS: Alchemy: rewrite USB platform setup.
MIPS: Alchemy: abstract USB block control register access
...
Fix up trivial conflicts in:
arch/mips/alchemy/devboards/db1x00/platform.c
drivers/ide/Kconfig
drivers/mmc/host/au1xmmc.c
drivers/video/Kconfig
sound/mips/Kconfig
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r-- | arch/mips/Kconfig | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 4cbc6d8de210..62b9677c39a1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -47,6 +47,8 @@ config MIPS_ALCHEMY | |||
47 | select GENERIC_GPIO | 47 | select GENERIC_GPIO |
48 | select ARCH_WANT_OPTIONAL_GPIOLIB | 48 | select ARCH_WANT_OPTIONAL_GPIOLIB |
49 | select SYS_SUPPORTS_ZBOOT | 49 | select SYS_SUPPORTS_ZBOOT |
50 | select USB_ARCH_HAS_OHCI | ||
51 | select USB_ARCH_HAS_EHCI | ||
50 | 52 | ||
51 | config AR7 | 53 | config AR7 |
52 | bool "Texas Instruments AR7" | 54 | bool "Texas Instruments AR7" |
@@ -206,6 +208,7 @@ config MACH_JZ4740 | |||
206 | select SYS_HAS_EARLY_PRINTK | 208 | select SYS_HAS_EARLY_PRINTK |
207 | select HAVE_PWM | 209 | select HAVE_PWM |
208 | select HAVE_CLK | 210 | select HAVE_CLK |
211 | select GENERIC_IRQ_CHIP | ||
209 | 212 | ||
210 | config LANTIQ | 213 | config LANTIQ |
211 | bool "Lantiq based platforms" | 214 | bool "Lantiq based platforms" |
@@ -2092,7 +2095,7 @@ config NODES_SHIFT | |||
2092 | 2095 | ||
2093 | config HW_PERF_EVENTS | 2096 | config HW_PERF_EVENTS |
2094 | bool "Enable hardware performance counter support for perf events" | 2097 | bool "Enable hardware performance counter support for perf events" |
2095 | depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && CPU_MIPS32 | 2098 | depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON) |
2096 | default y | 2099 | default y |
2097 | help | 2100 | help |
2098 | Enable hardware performance counter support for perf events. If | 2101 | Enable hardware performance counter support for perf events. If |