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authorThomas Gleixner <tglx@linutronix.de>2011-02-06 14:36:30 -0500
committerMichal Simek <monstr@monstr.eu>2011-03-09 02:09:59 -0500
commit6f205a4c69037e4d8fdf33088a852b64500df012 (patch)
treea2bd344eea824789cbf6342970b3e7631d8d30a2 /arch/microblaze/kernel
parent208a34f55f1ba4964e5a06b6876a84dc454f1d92 (diff)
microblaze: Convert irq_chip to new functions
Use proper irq_desc wrappers while at it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/kernel')
-rw-r--r--arch/microblaze/kernel/intc.c38
-rw-r--r--arch/microblaze/kernel/irq.c12
2 files changed, 26 insertions, 24 deletions
diff --git a/arch/microblaze/kernel/intc.c b/arch/microblaze/kernel/intc.c
index bff99d1b749a..e4661285118e 100644
--- a/arch/microblaze/kernel/intc.c
+++ b/arch/microblaze/kernel/intc.c
@@ -40,46 +40,46 @@ unsigned int nr_irq;
40#define MER_ME (1<<0) 40#define MER_ME (1<<0)
41#define MER_HIE (1<<1) 41#define MER_HIE (1<<1)
42 42
43static void intc_enable_or_unmask(unsigned int irq) 43static void intc_enable_or_unmask(struct irq_data *d)
44{ 44{
45 unsigned long mask = 1 << irq; 45 unsigned long mask = 1 << d->irq;
46 pr_debug("enable_or_unmask: %d\n", irq); 46 pr_debug("enable_or_unmask: %d\n", d->irq);
47 out_be32(INTC_BASE + SIE, mask); 47 out_be32(INTC_BASE + SIE, mask);
48 48
49 /* ack level irqs because they can't be acked during 49 /* ack level irqs because they can't be acked during
50 * ack function since the handle_level_irq function 50 * ack function since the handle_level_irq function
51 * acks the irq before calling the interrupt handler 51 * acks the irq before calling the interrupt handler
52 */ 52 */
53 if (irq_desc[irq].status & IRQ_LEVEL) 53 if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
54 out_be32(INTC_BASE + IAR, mask); 54 out_be32(INTC_BASE + IAR, mask);
55} 55}
56 56
57static void intc_disable_or_mask(unsigned int irq) 57static void intc_disable_or_mask(struct irq_data *d)
58{ 58{
59 pr_debug("disable: %d\n", irq); 59 pr_debug("disable: %d\n", d->irq);
60 out_be32(INTC_BASE + CIE, 1 << irq); 60 out_be32(INTC_BASE + CIE, 1 << d->irq);
61} 61}
62 62
63static void intc_ack(unsigned int irq) 63static void intc_ack(struct irq_data *d)
64{ 64{
65 pr_debug("ack: %d\n", irq); 65 pr_debug("ack: %d\n", d->irq);
66 out_be32(INTC_BASE + IAR, 1 << irq); 66 out_be32(INTC_BASE + IAR, 1 << d->irq);
67} 67}
68 68
69static void intc_mask_ack(unsigned int irq) 69static void intc_mask_ack(struct irq_data *d)
70{ 70{
71 unsigned long mask = 1 << irq; 71 unsigned long mask = 1 << d->irq;
72 pr_debug("disable_and_ack: %d\n", irq); 72 pr_debug("disable_and_ack: %d\n", d->irq);
73 out_be32(INTC_BASE + CIE, mask); 73 out_be32(INTC_BASE + CIE, mask);
74 out_be32(INTC_BASE + IAR, mask); 74 out_be32(INTC_BASE + IAR, mask);
75} 75}
76 76
77static struct irq_chip intc_dev = { 77static struct irq_chip intc_dev = {
78 .name = "Xilinx INTC", 78 .name = "Xilinx INTC",
79 .unmask = intc_enable_or_unmask, 79 .irq_unmask = intc_enable_or_unmask,
80 .mask = intc_disable_or_mask, 80 .irq_mask = intc_disable_or_mask,
81 .ack = intc_ack, 81 .irq_ack = intc_ack,
82 .mask_ack = intc_mask_ack, 82 .irq_mask_ack = intc_mask_ack,
83}; 83};
84 84
85unsigned int get_irq(struct pt_regs *regs) 85unsigned int get_irq(struct pt_regs *regs)
@@ -159,11 +159,11 @@ void __init init_IRQ(void)
159 if (intr_type & (0x00000001 << i)) { 159 if (intr_type & (0x00000001 << i)) {
160 set_irq_chip_and_handler_name(i, &intc_dev, 160 set_irq_chip_and_handler_name(i, &intc_dev,
161 handle_edge_irq, intc_dev.name); 161 handle_edge_irq, intc_dev.name);
162 irq_desc[i].status &= ~IRQ_LEVEL; 162 irq_clear_status_flags(i, IRQ_LEVEL);
163 } else { 163 } else {
164 set_irq_chip_and_handler_name(i, &intc_dev, 164 set_irq_chip_and_handler_name(i, &intc_dev,
165 handle_level_irq, intc_dev.name); 165 handle_level_irq, intc_dev.name);
166 irq_desc[i].status |= IRQ_LEVEL; 166 irq_set_status_flags(i, IRQ_LEVEL);
167 } 167 }
168 } 168 }
169} 169}
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index a9345fb4906a..098822413729 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -50,6 +50,7 @@ next_irq:
50int show_interrupts(struct seq_file *p, void *v) 50int show_interrupts(struct seq_file *p, void *v)
51{ 51{
52 int i = *(loff_t *) v, j; 52 int i = *(loff_t *) v, j;
53 struct irq_desc *desc;
53 struct irqaction *action; 54 struct irqaction *action;
54 unsigned long flags; 55 unsigned long flags;
55 56
@@ -61,8 +62,9 @@ int show_interrupts(struct seq_file *p, void *v)
61 } 62 }
62 63
63 if (i < nr_irq) { 64 if (i < nr_irq) {
64 raw_spin_lock_irqsave(&irq_desc[i].lock, flags); 65 desc = irq_to_desc(i);
65 action = irq_desc[i].action; 66 raw_spin_lock_irqsave(&desc->lock, flags);
67 action = desc->action;
66 if (!action) 68 if (!action)
67 goto skip; 69 goto skip;
68 seq_printf(p, "%3d: ", i); 70 seq_printf(p, "%3d: ", i);
@@ -72,9 +74,9 @@ int show_interrupts(struct seq_file *p, void *v)
72 for_each_online_cpu(j) 74 for_each_online_cpu(j)
73 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 75 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
74#endif 76#endif
75 seq_printf(p, " %8s", irq_desc[i].status & 77 seq_printf(p, " %8s", desc->status &
76 IRQ_LEVEL ? "level" : "edge"); 78 IRQ_LEVEL ? "level" : "edge");
77 seq_printf(p, " %8s", irq_desc[i].chip->name); 79 seq_printf(p, " %8s", desc->irq_data.chip->name);
78 seq_printf(p, " %s", action->name); 80 seq_printf(p, " %s", action->name);
79 81
80 for (action = action->next; action; action = action->next) 82 for (action = action->next; action; action = action->next)
@@ -82,7 +84,7 @@ int show_interrupts(struct seq_file *p, void *v)
82 84
83 seq_putc(p, '\n'); 85 seq_putc(p, '\n');
84skip: 86skip:
85 raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); 87 raw_spin_unlock_irqrestore(&desc->lock, flags);
86 } 88 }
87 return 0; 89 return 0;
88} 90}