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| author | Olof Johansson <olof@lixom.net> | 2013-01-28 02:03:42 -0500 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-01-28 02:03:42 -0500 |
| commit | af70fdc947dbe835acc26c6ee9e8e930f38935f8 (patch) | |
| tree | 9924e9f2732e3cf3c7a882cb11377247729891ab /arch/microblaze/kernel/syscall_table.S | |
| parent | 66eae035dc59755c51ad3b3c718a5ed7535322e3 (diff) | |
| parent | 7f46a10724e0d31c83029436e54298be2cc558fa (diff) | |
Merge branch 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/soc
From Barry Song, this adds support for a new SoC from CSR; marco. It's
SMP, uses GIC instead of VIC and in general needs a bit of rework of
the platform code for setup, which this branch contains.
* 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
ARM: PRIMA2: rtciobg: it is also compatible with marco
ARM: PRIMA2: rstc: enable the support for Marco
ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
ARM: PRIMA2: initialize l2x0 according to mach from DT
ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
ARM: PRIMA2: add CSR SiRFmarco device tree .dts
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/microblaze/kernel/syscall_table.S')
0 files changed, 0 insertions, 0 deletions