aboutsummaryrefslogtreecommitdiffstats
path: root/arch/microblaze/include
diff options
context:
space:
mode:
authorMichal Simek <monstr@monstr.eu>2009-10-08 07:06:42 -0400
committerMichal Simek <monstr@monstr.eu>2009-12-14 02:44:57 -0500
commit44e4e196a9b3a703ebe273ffe3fb6cda326fe5d3 (patch)
tree1e9217c3af95f1843dbe499cd7022fd531ef4c38 /arch/microblaze/include
parent6cec713b1629228527fb8f813003522817f55da1 (diff)
microblaze: Fix cache_line_lenght
We used cache_line as cache_line_lenght. For this reason we did cache flushing 4 times longer than was necessary. Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/include')
-rw-r--r--arch/microblaze/include/asm/cpuinfo.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index 52f28f6dc4eb..aadf7a899d49 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -43,7 +43,7 @@ struct cpuinfo {
43 u32 use_icache; 43 u32 use_icache;
44 u32 icache_tagbits; 44 u32 icache_tagbits;
45 u32 icache_write; 45 u32 icache_write;
46 u32 icache_line; 46 u32 icache_line_length;
47 u32 icache_size; 47 u32 icache_size;
48 unsigned long icache_base; 48 unsigned long icache_base;
49 unsigned long icache_high; 49 unsigned long icache_high;
@@ -51,7 +51,7 @@ struct cpuinfo {
51 u32 use_dcache; 51 u32 use_dcache;
52 u32 dcache_tagbits; 52 u32 dcache_tagbits;
53 u32 dcache_write; 53 u32 dcache_write;
54 u32 dcache_line; 54 u32 dcache_line_length;
55 u32 dcache_size; 55 u32 dcache_size;
56 unsigned long dcache_base; 56 unsigned long dcache_base;
57 unsigned long dcache_high; 57 unsigned long dcache_high;