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authorMichal Simek <monstr@monstr.eu>2010-10-07 03:39:21 -0400
committerMichal Simek <monstr@monstr.eu>2010-10-21 01:52:00 -0400
commitccea0e6e49e4db8ee7968c183ecddb3e399c5f54 (patch)
tree387e07bf5e4eed3628c7361cdd7129cc0a31f250 /arch/microblaze/include/asm
parent02b08045a0306c38131c6d7155c4034a775d40b1 (diff)
microblaze: Support timer on AXI lite
New microblaze systems uses two buses. One for memories and flashes and the second for low-speed peripherals which can run on different CLK. This is the reason why the kernel is trying to read clock-frequency directly from node. If there is then the kernel will work with it. If not then cpu CLK is used. Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze/include/asm')
-rw-r--r--arch/microblaze/include/asm/cpuinfo.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index 7fab800496ae..cd257537ae54 100644
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -77,7 +77,6 @@ struct cpuinfo {
77 u32 num_rd_brk; 77 u32 num_rd_brk;
78 u32 num_wr_brk; 78 u32 num_wr_brk;
79 u32 cpu_clock_freq; /* store real freq of cpu */ 79 u32 cpu_clock_freq; /* store real freq of cpu */
80 u32 freq_div_hz; /* store freq/HZ */
81 80
82 /* FPGA family */ 81 /* FPGA family */
83 u32 fpga_family_code; 82 u32 fpga_family_code;